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From: Mathieu Poirier <mathieu.poirier@linaro.org>
To: Andrew Murray <andrew.murray@arm.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	linux-arm-kernel@lists.infradead.org,
	Suzuki K Poulose <suzuki.poulose@arm.com>
Subject: Re: [PATCH v1 2/5] coresight: etm4x: use explicit barriers on enable/disable
Date: Tue, 18 Jun 2019 16:34:02 -0600	[thread overview]
Message-ID: <20190618223402.GA24894@xps15> (raw)
In-Reply-To: <20190618125433.9739-3-andrew.murray@arm.com>

On Tue, Jun 18, 2019 at 01:54:30PM +0100, Andrew Murray wrote:
> Synchronization is recommended before disabling the trace registers
> to prevent any start or stop points being speculative at the point
> of disabling the unit (section 7.3.77 of ARM IHI 0064D).
> 
> Synchronization is also recommended after programming the trace
> registers to ensure all updates are committed prior to normal code
> resuming (section 4.3.7 of ARM IHI 0064D).
> 
> Let's ensure these syncronization points are present in the code
> and clearly commented.
> 
> Note that we could rely on the barriers in CS_LOCK and
> coresight_disclaim_device_unlocked or the context switch to user
> space - however coresight may be of use in the kernel.
> 
> Signed-off-by: Andrew Murray <andrew.murray@arm.com>
> ---
>  drivers/hwtracing/coresight/coresight-etm4x.c | 7 ++++++-
>  1 file changed, 6 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/hwtracing/coresight/coresight-etm4x.c b/drivers/hwtracing/coresight/coresight-etm4x.c
> index da7cf74d612b..ae623415c431 100644
> --- a/drivers/hwtracing/coresight/coresight-etm4x.c
> +++ b/drivers/hwtracing/coresight/coresight-etm4x.c
> @@ -187,6 +187,10 @@ static int etm4_enable_hw(struct etmv4_drvdata *drvdata)
>  		dev_err(drvdata->dev,
>  			"timeout while waiting for Idle Trace Status\n");
>  
> +	/* As recommended by 4.3.7 of ARM IHI 0064D */
> +	dsb(sy);
> +	isb();
> +
>  done:
>  	CS_LOCK(drvdata->base);
>  
> @@ -453,7 +457,8 @@ static void etm4_disable_hw(void *info)
>  	control &= ~0x1;
>  
>  	/* make sure everything completes before disabling */
> -	mb();
> +	/* As recommended by 7.3.77 of ARM IHI 0064D */
> +	dsb(sy);

As far as I can tell mb() is equal to dsb(sy).

>  	isb();
>  	writel_relaxed(control, drvdata->base + TRCPRGCTLR);
>  
> -- 
> 2.21.0
> 

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  reply	other threads:[~2019-06-18 22:34 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-06-18 12:54 [PATCH v1 0/5] coresight: etm4x: save/restore ETMv4 context across CPU low power states Andrew Murray
2019-06-18 12:54 ` [PATCH v1 1/5] coresight: etm4x: remove superfluous setting of os_unlock Andrew Murray
2019-06-19 10:42   ` Suzuki K Poulose
2019-06-18 12:54 ` [PATCH v1 2/5] coresight: etm4x: use explicit barriers on enable/disable Andrew Murray
2019-06-18 22:34   ` Mathieu Poirier [this message]
2019-06-19  8:32     ` Suzuki K Poulose
2019-06-20 10:25       ` Andrew Murray
2019-06-18 12:54 ` [PATCH v1 3/5] coresight: etm4x: use octal permissions for module_params Andrew Murray
2019-06-19 10:43   ` Suzuki K Poulose
2019-06-18 12:54 ` [PATCH v1 4/5] coresight: etm4x: improve clarity of etm4_os_unlock comment Andrew Murray
2019-06-19 10:46   ` Suzuki K Poulose
2019-06-20 10:29     ` Andrew Murray
2019-06-18 12:54 ` [PATCH v1 5/5] coresight: etm4x: save/restore state across CPU low power states Andrew Murray
2019-06-18 13:21   ` Sudeep Holla
2019-06-19 10:38     ` Suzuki K Poulose
2019-06-19 11:07       ` Sudeep Holla
2019-06-19 16:22         ` Mathieu Poirier
2019-06-20 11:41           ` Andrew Murray
2019-06-20 14:55             ` Mathieu Poirier
2019-06-20 15:41             ` Sudeep Holla
2019-06-20 16:14               ` Mathieu Poirier
2019-06-20 16:34                 ` Sudeep Holla
2019-06-20 16:47                   ` Mathieu Poirier
2019-06-20 16:52                     ` Sudeep Holla
2019-06-20 16:54                     ` Andrew Murray
2019-06-20 17:00                       ` Suzuki K Poulose
2019-06-20 17:10                         ` Mathieu Poirier
2019-06-21  9:29                           ` Andrew Murray
2019-06-21 15:30                             ` Mathieu Poirier
2019-06-20 17:11                         ` Sudeep Holla
2019-06-20 18:00                           ` Mathieu Poirier
2019-06-20 16:48       ` Sudeep Holla
2019-06-18 22:55   ` Mathieu Poirier
2019-06-20 11:07     ` Andrew Murray
2019-06-20 14:49       ` Mathieu Poirier
2019-06-20 15:11         ` Andrew Murray
2019-06-20 15:26           ` Mathieu Poirier
2019-06-25 10:07     ` Suzuki K Poulose
2019-06-25 19:57       ` Mathieu Poirier
2019-06-26 10:21         ` Mike Leach
2019-06-26 16:57           ` Mathieu Poirier
2019-06-27  8:12             ` Andrew Murray
2019-06-27  8:17           ` Andrew Murray
2019-06-20 16:45 ` [PATCH v1 0/5] coresight: etm4x: save/restore ETMv4 context " Suzuki K Poulose
2019-06-20 16:57   ` Andrew Murray

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