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From: Sudeep Holla <sudeep.holla@arm.com>
To: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Al Grant <Al.Grant@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Sudeep Holla <sudeep.holla@arm.com>,
	Andrew Murray <andrew.murray@arm.com>,
	linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
	Mike Leach <mike.leach@linaro.org>
Subject: Re: [PATCH v1 5/5] coresight: etm4x: save/restore state across CPU low power states
Date: Thu, 20 Jun 2019 17:52:18 +0100	[thread overview]
Message-ID: <20190620165218.GE25273@e107155-lin> (raw)
In-Reply-To: <CANLsYkymTnxRX61StUGvKGeiQV6P6YbCg81PSYeBpXLsX5tpiw@mail.gmail.com>

On Thu, Jun 20, 2019 at 10:47:38AM -0600, Mathieu Poirier wrote:
> On Thu, 20 Jun 2019 at 10:34, Sudeep Holla <sudeep.holla@arm.com> wrote:
> >
> > On Thu, Jun 20, 2019 at 10:14:04AM -0600, Mathieu Poirier wrote:
> > > On Thu, 20 Jun 2019 at 09:41, Sudeep Holla <sudeep.holla@arm.com> wrote:
> > > >
> >
> > [...]
> >
> > > > Sorry but even then I prefer it not to be default and force extra work
> > > > to the people who add support and constantly be reminded that it's
> > > > broken and they are deviating from default behaviour in the kernel
> > > > which may come and latency penalty.
> > > >
> > > > Making it default may hide the problem if Linux is used for some validation.
> > > >
> > > > Also we hardly have 3-4 platforms in upstream that support coresight,
> > > > and many are broken except Juno. But that doesn't imply all others
> > > > are broken and we just can't derive that unless we have more information.
> > >
> > > For now we have a clear trend.  To me it is not a matter of broken vs.
> > > non-broken but more about what people want to do or can
> > > (realistically) do.
> > >
> >
> > No disagreement there.
> >
> > > The coresight specification is broad and very permissive in terms of
> > > implementation defined choices.  It is not because the TRCPDCR.PU it
> > > not taken into account by a platform that it is automatically broken.
> > > This could be a design choice or a trade off.  We already have two
> > > ways of putting a CPU to sleep (architected or OS driven), we simply
> > > do the same here for coresight.
> > >
> >
> > Sure, if the term "broken" is inappropriate I am fine if anything else
> > is used. The point is we are adding an idle notifier that adds latency
> > and must be done if and only if necessary.
> >
> > How you identify that and implement doesn't bother me much, making
> > that default just based on the fact that more platforms need it
> > compared to others definitely does. So I am fine if this needs to be
> > advertised *not broken* but *by design*, sure go for it.
> >
>
> Then all we have to do is make the ACPI/DT property that indicate the
> method used to deal with tracer idling mandatory.  That way people are
> conscious of the choice they are making.  To be backward compatible
> with current systems we default to the TRCPDCR.PU method but print a
> warning message, just like we do for obsolete DT bindings.
>

If you are happy with kernel module/command line parameters, I am fine
by that too. I missed that earlier, sorry for the noise. But I still
need to keep the default disabled and platforms needing it must enable
it. If not architectural argument, I am still concerned with latency :)

--
Regards,
Sudeep

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  reply	other threads:[~2019-06-20 16:52 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-06-18 12:54 [PATCH v1 0/5] coresight: etm4x: save/restore ETMv4 context across CPU low power states Andrew Murray
2019-06-18 12:54 ` [PATCH v1 1/5] coresight: etm4x: remove superfluous setting of os_unlock Andrew Murray
2019-06-19 10:42   ` Suzuki K Poulose
2019-06-18 12:54 ` [PATCH v1 2/5] coresight: etm4x: use explicit barriers on enable/disable Andrew Murray
2019-06-18 22:34   ` Mathieu Poirier
2019-06-19  8:32     ` Suzuki K Poulose
2019-06-20 10:25       ` Andrew Murray
2019-06-18 12:54 ` [PATCH v1 3/5] coresight: etm4x: use octal permissions for module_params Andrew Murray
2019-06-19 10:43   ` Suzuki K Poulose
2019-06-18 12:54 ` [PATCH v1 4/5] coresight: etm4x: improve clarity of etm4_os_unlock comment Andrew Murray
2019-06-19 10:46   ` Suzuki K Poulose
2019-06-20 10:29     ` Andrew Murray
2019-06-18 12:54 ` [PATCH v1 5/5] coresight: etm4x: save/restore state across CPU low power states Andrew Murray
2019-06-18 13:21   ` Sudeep Holla
2019-06-19 10:38     ` Suzuki K Poulose
2019-06-19 11:07       ` Sudeep Holla
2019-06-19 16:22         ` Mathieu Poirier
2019-06-20 11:41           ` Andrew Murray
2019-06-20 14:55             ` Mathieu Poirier
2019-06-20 15:41             ` Sudeep Holla
2019-06-20 16:14               ` Mathieu Poirier
2019-06-20 16:34                 ` Sudeep Holla
2019-06-20 16:47                   ` Mathieu Poirier
2019-06-20 16:52                     ` Sudeep Holla [this message]
2019-06-20 16:54                     ` Andrew Murray
2019-06-20 17:00                       ` Suzuki K Poulose
2019-06-20 17:10                         ` Mathieu Poirier
2019-06-21  9:29                           ` Andrew Murray
2019-06-21 15:30                             ` Mathieu Poirier
2019-06-20 17:11                         ` Sudeep Holla
2019-06-20 18:00                           ` Mathieu Poirier
2019-06-20 16:48       ` Sudeep Holla
2019-06-18 22:55   ` Mathieu Poirier
2019-06-20 11:07     ` Andrew Murray
2019-06-20 14:49       ` Mathieu Poirier
2019-06-20 15:11         ` Andrew Murray
2019-06-20 15:26           ` Mathieu Poirier
2019-06-25 10:07     ` Suzuki K Poulose
2019-06-25 19:57       ` Mathieu Poirier
2019-06-26 10:21         ` Mike Leach
2019-06-26 16:57           ` Mathieu Poirier
2019-06-27  8:12             ` Andrew Murray
2019-06-27  8:17           ` Andrew Murray
2019-06-20 16:45 ` [PATCH v1 0/5] coresight: etm4x: save/restore ETMv4 context " Suzuki K Poulose
2019-06-20 16:57   ` Andrew Murray

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