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From: Joseph Lo <josephl@nvidia.com>
To: Dmitry Osipenko <digetx@gmail.com>,
	Thierry Reding <thierry.reding@gmail.com>,
	Peter De Schrijver <pdeschrijver@nvidia.com>,
	Jonathan Hunter <jonathanh@nvidia.com>
Cc: linux-tegra@vger.kernel.org,
	Viresh Kumar <viresh.kumar@linaro.org>,
	linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-pm@vger.kernel.org
Subject: Re: [PATCH 12/19] cpufreq: tegra124: extend to support Tegra210
Date: Wed, 5 Dec 2018 11:25:43 +0800	[thread overview]
Message-ID: <58e13709-79e6-66cc-2858-a51b393da05a@nvidia.com> (raw)
In-Reply-To: <c4f34e85-052b-f3a3-a6ea-715d1971335c@gmail.com>

On 12/4/18 7:22 PM, Dmitry Osipenko wrote:
> On 04.12.2018 12:25, Joseph Lo wrote:
>> Tegra210 uses the same methodology as Tegra124 for CPUFreq controlling
>> that based on DFLL clock. So extending this driver to support Tegra210.
>>
>> Cc: Viresh Kumar <viresh.kumar@linaro.org>
>> Cc: linux-pm@vger.kernel.org
>> Signed-off-by: Joseph Lo <josephl@nvidia.com>
>> ---
>>   drivers/cpufreq/tegra124-cpufreq.c | 3 ++-
>>   1 file changed, 2 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/cpufreq/tegra124-cpufreq.c b/drivers/cpufreq/tegra124-cpufreq.c
>> index 448d00763d00..1af955fb715c 100644
>> --- a/drivers/cpufreq/tegra124-cpufreq.c
>> +++ b/drivers/cpufreq/tegra124-cpufreq.c
>> @@ -159,7 +159,8 @@ static int __init tegra_cpufreq_init(void)
>>   	int ret;
>>   	struct platform_device *pdev;
>>   
>> -	if (!of_machine_is_compatible("nvidia,tegra124"))
>> +	if (!(of_machine_is_compatible("nvidia,tegra124") ||
>> +		of_machine_is_compatible("nvidia,tegra210")))
>>   		return -ENODEV;
>>   
>>   	/*
>>
> 
> Seems that's not enough, you also need to blacklist "nvidia,tegra210" in the drivers/cpufreq/cpufreq-dt-platdev.c

Hi Dmitry,

Thanks for reviewing. Actually it's "just" enough, I did check that 
driver for creating device data for cpufreq-dt driver. It needs to have 
both OPP v2 property and blacklist to create device data.

Because we don't use OPP v2, it will never be true. So it will "just" 
work in this case.

But you are right, add that to blacklist is more clear. I can add one 
more patch for that in next series.

Thanks,
Joseph

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  reply	other threads:[~2018-12-05  3:26 UTC|newest]

Thread overview: 73+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-12-04  9:25 [PATCH 00/19] Tegra210 DFLL support Joseph Lo
2018-12-04  9:25 ` [PATCH 01/19] dt-bindings: clock: tegra124-dfll: Update DFLL binding for PWM regulator Joseph Lo
2018-12-07 13:41   ` Jon Hunter
2018-12-10  8:49     ` Joseph Lo
2018-12-10  8:59       ` Jon Hunter
2018-12-10  9:31         ` Joseph Lo
2018-12-10  9:44           ` Jon Hunter
2018-12-11  1:28             ` Joseph Lo
2018-12-11  9:16         ` Peter De Schrijver
2018-12-11  9:36           ` Joseph Lo
2018-12-11  9:15     ` Peter De Schrijver
2018-12-11 11:52       ` Jon Hunter
2018-12-12  1:52         ` Joseph Lo
2018-12-04  9:25 ` [PATCH 02/19] dt-bindings: clock: tegra124-dfll: add Tegra210 support Joseph Lo
2018-12-07 13:50   ` Jon Hunter
2018-12-04  9:25 ` [PATCH 03/19] dt-bindings: cpufreq: tegra124: remove vdd-cpu-supply from required properties Joseph Lo
2018-12-04 15:36   ` Peter De Schrijver
2018-12-05  3:05     ` Joseph Lo
2018-12-05  9:37       ` Peter De Schrijver
2018-12-07 13:52   ` Jon Hunter
2018-12-04  9:25 ` [PATCH 04/19] dt-bindings: cpufreq: tegra124: remove cpu_lp clock " Joseph Lo
2018-12-04 15:37   ` Peter De Schrijver
2018-12-05  3:10     ` Joseph Lo
2018-12-07 13:53   ` Jon Hunter
2018-12-04  9:25 ` [PATCH 05/19] clk: tegra: dfll: registration for multiple SoCs Joseph Lo
2018-12-07 13:55   ` Jon Hunter
2018-12-04  9:25 ` [PATCH 06/19] clk: tegra: dfll: CVB calculation alignment with the regulator Joseph Lo
2018-12-07 14:10   ` Jon Hunter
2018-12-11  6:23     ` Joseph Lo
2018-12-04  9:25 ` [PATCH 07/19] clk: tegra: dfll: support PWM regulator control Joseph Lo
2018-12-04 15:53   ` Peter De Schrijver
2018-12-05  6:14     ` Joseph Lo
2018-12-07 14:26   ` Jon Hunter
2018-12-11  6:36     ` Joseph Lo
2018-12-07 15:09   ` Jon Hunter
2018-12-11  6:37     ` Joseph Lo
2018-12-04  9:25 ` [PATCH 08/19] clk: tegra: dfll: round down voltages based on alignment Joseph Lo
2018-12-04 15:46   ` Peter De Schrijver
2018-12-05  6:20     ` Joseph Lo
2018-12-05  6:51       ` Joseph Lo
2018-12-05  9:11         ` Peter De Schrijver
2018-12-05  9:30           ` Joseph Lo
2018-12-07 14:34   ` Jon Hunter
2018-12-04  9:25 ` [PATCH 09/19] clk: tegra: dfll: add CVB tables for Tegra210 Joseph Lo
2018-12-07 14:39   ` Jon Hunter
2018-12-11  7:34     ` Joseph Lo
2018-12-04  9:25 ` [PATCH 10/19] clk: tegra: dfll: build clk-dfll.c for Tegra124 and Tegra210 Joseph Lo
2018-12-07 14:40   ` Jon Hunter
2018-12-04  9:25 ` [PATCH 11/19] cpufreq: tegra124: do not handle the CPU rail Joseph Lo
2018-12-07 14:49   ` Jon Hunter
2018-12-11  8:48     ` Joseph Lo
2018-12-04  9:25 ` [PATCH 12/19] cpufreq: tegra124: extend to support Tegra210 Joseph Lo
2018-12-04  9:30   ` Viresh Kumar
2018-12-04 11:22   ` Dmitry Osipenko
2018-12-05  3:25     ` Joseph Lo [this message]
2018-12-07 14:50   ` Jon Hunter
2018-12-04  9:25 ` [PATCH 13/19] arm64: dts: tegra210: add DFLL clock Joseph Lo
2018-12-07 14:54   ` Jon Hunter
2018-12-04  9:25 ` [PATCH 14/19] arm64: dts: tegra210: add CPU clocks Joseph Lo
2018-12-07 14:54   ` Jon Hunter
2018-12-04  9:25 ` [PATCH 15/19] arm64: dts: tegra210-p2597: add pinmux for PWM-based DFLL support Joseph Lo
2018-12-07 14:55   ` Jon Hunter
2018-12-04  9:25 ` [PATCH 16/19] arm64: dts: tegra210-p2371-2180: enable DFLL clock Joseph Lo
2018-12-07 14:57   ` Jon Hunter
2018-12-11  8:52     ` Joseph Lo
2018-12-04  9:25 ` [PATCH 17/19] arm64: dts: tegra210-smaug: add CPU power rail regulator Joseph Lo
2018-12-07 15:03   ` Jon Hunter
2018-12-04  9:25 ` [PATCH 18/19] arm64: dts: tegra210-smaug: enable DFLL clock Joseph Lo
2018-12-07 15:03   ` Jon Hunter
2018-12-04  9:25 ` [PATCH 19/19] arm64: defconfig: Enable MAX8973 regulator Joseph Lo
2018-12-07 15:04   ` Jon Hunter
2018-12-04 15:10 ` [PATCH 00/19] Tegra210 DFLL support Thierry Reding
2018-12-05  6:11   ` Joseph Lo

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