From: Vinod Koul <vkoul@kernel.org>
To: Stephen Boyd <sboyd@kernel.org>
Cc: linux-arm-msm@vger.kernel.org,
Bjorn Andersson <bjorn.andersson@linaro.org>,
Vinod Koul <vkoul@kernel.org>, Andy Gross <agross@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Rob Herring <robh+dt@kernel.org>,
Taniya Das <tdas@codeaurora.org>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@somainline.org>,
linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: [PATCH v5 0/5] Add clock drivers for SM8350
Date: Wed, 27 Jan 2021 12:38:06 +0530 [thread overview]
Message-ID: <20210127070811.152690-1-vkoul@kernel.org> (raw)
This adds gcc clock controller drivers for the controller found
in SM8350 SoC
Changes in v5:
- Add r-b from AngeloGioacchino and Bjorn
- Removed unused clock indices
- Initialize variable before use in regmap read
Changes in v4:
- Add Ack from Rob on binding
- modularize alpha_pll_trion_set_rate()
Changes in v3:
- Drop rpmh clk patches applied
- Add a new patch to replace regval with val as suggested by Stephen
- Fix comments for new Lucid 5LPE PLL: sort new defines by BIT numbers, fix
comments, use alpha_pll_check_rate_margin(), rework
clk_lucid_5lpe_pll_postdiv_set_rate() logic
- Add power domains and optional clocks in bindings
- Fix comments for gcc sm8350 driver: clean includes used, use only
.fw_name for clocks defined in DT, use floor ops for sdcc clocks, remove
critical clocks and enable them in probe, add comments for clks using
BRANCH_HALT_SKIP and BRANCH_HALT_DELAY
Changes in v2:
- Add r-b from Bjorn
- Add the gcc_qupv3_wrap_1_{m|s}_ahb_clk and gcc_qupv3_wrap1_s5_clk
Vinod Koul (3):
clk: qcom: clk-alpha-pll: replace regval with val
clk: qcom: clk-alpha-pll: modularize alpha_pll_trion_set_rate()
dt-bindings: clock: Add SM8350 GCC clock bindings
Vivek Aknurwar (2):
clk: qcom: clk-alpha-pll: Add support for Lucid 5LPE PLL
clk: qcom: gcc: Add clock driver for SM8350
.../bindings/clock/qcom,gcc-sm8350.yaml | 96 +
drivers/clk/qcom/Kconfig | 8 +
drivers/clk/qcom/Makefile | 1 +
drivers/clk/qcom/clk-alpha-pll.c | 209 +-
drivers/clk/qcom/clk-alpha-pll.h | 4 +
drivers/clk/qcom/gcc-sm8350.c | 3790 +++++++++++++++++
include/dt-bindings/clock/qcom,gcc-sm8350.h | 254 ++
7 files changed, 4346 insertions(+), 16 deletions(-)
create mode 100644 Documentation/devicetree/bindings/clock/qcom,gcc-sm8350.yaml
create mode 100644 drivers/clk/qcom/gcc-sm8350.c
create mode 100644 include/dt-bindings/clock/qcom,gcc-sm8350.h
--
2.26.2
next reply other threads:[~2021-01-27 7:12 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-27 7:08 Vinod Koul [this message]
2021-01-27 7:08 ` [PATCH v5 1/5] clk: qcom: clk-alpha-pll: replace regval with val Vinod Koul
2021-02-08 18:07 ` Stephen Boyd
2021-01-27 7:08 ` [PATCH v5 2/5] clk: qcom: clk-alpha-pll: modularize alpha_pll_trion_set_rate() Vinod Koul
2021-02-08 18:06 ` Stephen Boyd
2021-01-27 7:08 ` [PATCH v5 3/5] clk: qcom: clk-alpha-pll: Add support for Lucid 5LPE PLL Vinod Koul
2021-02-08 18:06 ` Stephen Boyd
2021-01-27 7:08 ` [PATCH v5 4/5] dt-bindings: clock: Add SM8350 GCC clock bindings Vinod Koul
2021-02-08 18:07 ` Stephen Boyd
[not found] ` <20210127070811.152690-6-vkoul@kernel.org>
2021-02-08 18:07 ` [PATCH v5 5/5] clk: qcom: gcc: Add clock driver for SM8350 Stephen Boyd
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