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From: Ben Widawsky <ben.widawsky@intel.com>
To: linux-cxl@vger.kernel.org, Dan Williams <dan.j.williams@intel.com>
Cc: Ben Widawsky <ben.widawsky@intel.com>,
	Alison Schofield <alison.schofield@intel.com>,
	Ira Weiny <ira.weiny@intel.com>,
	Jonathan Cameron <Jonathan.Cameron@Huawei.com>,
	Vishal Verma <vishal.l.verma@intel.com>
Subject: [PATCH v2 1/6] cxl: Move cxl_core to new directory
Date: Tue, 20 Jul 2021 11:07:42 -0700	[thread overview]
Message-ID: <20210720180742.89992-1-ben.widawsky@intel.com> (raw)
In-Reply-To: <CAPcyv4gbiNyKtzKkp2FgM5+k=FuodP0wKdNgh4ohH=E8fxQXwA@mail.gmail.com>

CXL core is growing, and it's already arguably unmanageable. To support
future growth, move core functionality to a new directory and rename the
file to represent just bus support. Future work will remove non-bus
functionality.

Signed-off-by: Ben Widawsky <ben.widawsky@intel.com>
---
v2: Create new Makefile for core (Dan)

---
 Documentation/driver-api/cxl/memory-devices.rst | 2 +-
 drivers/cxl/Makefile                            | 4 +---
 drivers/cxl/core/Makefile                       | 5 +++++
 drivers/cxl/{core.c => core/bus.c}              | 4 ++--
 4 files changed, 9 insertions(+), 6 deletions(-)
 create mode 100644 drivers/cxl/core/Makefile
 rename drivers/cxl/{core.c => core/bus.c} (99%)

diff --git a/Documentation/driver-api/cxl/memory-devices.rst b/Documentation/driver-api/cxl/memory-devices.rst
index 487ce4f41d77..a86e2c7c551a 100644
--- a/Documentation/driver-api/cxl/memory-devices.rst
+++ b/Documentation/driver-api/cxl/memory-devices.rst
@@ -36,7 +36,7 @@ CXL Core
 .. kernel-doc:: drivers/cxl/cxl.h
    :internal:
 
-.. kernel-doc:: drivers/cxl/core.c
+.. kernel-doc:: drivers/cxl/core/bus.c
    :doc: cxl core
 
 External Interfaces
diff --git a/drivers/cxl/Makefile b/drivers/cxl/Makefile
index 32954059b37b..d1aaabc940f3 100644
--- a/drivers/cxl/Makefile
+++ b/drivers/cxl/Makefile
@@ -1,11 +1,9 @@
 # SPDX-License-Identifier: GPL-2.0
-obj-$(CONFIG_CXL_BUS) += cxl_core.o
+obj-$(CONFIG_CXL_BUS) += core/
 obj-$(CONFIG_CXL_MEM) += cxl_pci.o
 obj-$(CONFIG_CXL_ACPI) += cxl_acpi.o
 obj-$(CONFIG_CXL_PMEM) += cxl_pmem.o
 
-ccflags-y += -DDEFAULT_SYMBOL_NAMESPACE=CXL
-cxl_core-y := core.o
 cxl_pci-y := pci.o
 cxl_acpi-y := acpi.o
 cxl_pmem-y := pmem.o
diff --git a/drivers/cxl/core/Makefile b/drivers/cxl/core/Makefile
new file mode 100644
index 000000000000..c65e9f61abe9
--- /dev/null
+++ b/drivers/cxl/core/Makefile
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0
+obj-$(CONFIG_CXL_BUS) += cxl_core.o
+
+ccflags-y += -DDEFAULT_SYMBOL_NAMESPACE=CXL -I./drivers/cxl
+cxl_core-y := bus.o
diff --git a/drivers/cxl/core.c b/drivers/cxl/core/bus.c
similarity index 99%
rename from drivers/cxl/core.c
rename to drivers/cxl/core/bus.c
index a2e4d54fc7bc..6ce04e3976d2 100644
--- a/drivers/cxl/core.c
+++ b/drivers/cxl/core/bus.c
@@ -6,8 +6,8 @@
 #include <linux/pci.h>
 #include <linux/slab.h>
 #include <linux/idr.h>
-#include "cxl.h"
-#include "mem.h"
+#include <cxl.h>
+#include <mem.h>
 
 /**
  * DOC: cxl core
-- 
2.32.0


  reply	other threads:[~2021-07-20 18:08 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-15 19:41 [PATCH 0/6] CXL core reorganization Ben Widawsky
2021-07-15 19:41 ` [PATCH 1/6] cxl: Move cxl_core to new directory Ben Widawsky
2021-07-15 22:44   ` Dan Williams
2021-07-20 18:07     ` Ben Widawsky [this message]
2021-07-20 18:14       ` [PATCH v2 " Ben Widawsky
2021-07-15 19:41 ` [PATCH 2/6] cxl/core: Improve CXL core kernel docs Ben Widawsky
2021-07-15 23:46   ` Dan Williams
2021-07-15 19:41 ` [PATCH 3/6] cxl/core: Extract register and pmem functionality Ben Widawsky
2021-07-28 22:14   ` Dan Williams
2021-07-15 19:41 ` [PATCH 4/6] cxl/mem: Move character device region creation Ben Widawsky
2021-07-28 22:34   ` Dan Williams
2021-07-15 19:41 ` [PATCH 5/6] cxl: Pass fops and shutdown to memdev creation Ben Widawsky
2021-07-28 23:21   ` Dan Williams
2021-07-15 19:41 ` [PATCH 6/6] cxl/core: Move memdev management to core Ben Widawsky

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