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From: Dan Williams <dan.j.williams@intel.com>
To: Ben Widawsky <ben.widawsky@intel.com>
Cc: linux-cxl@vger.kernel.org,
	Alison Schofield <alison.schofield@intel.com>,
	Ira Weiny <ira.weiny@intel.com>,
	Jonathan Cameron <Jonathan.Cameron@huawei.com>,
	Vishal Verma <vishal.l.verma@intel.com>
Subject: Re: [PATCH 3/6] cxl/core: Extract register and pmem functionality
Date: Wed, 28 Jul 2021 15:14:42 -0700	[thread overview]
Message-ID: <CAPcyv4jeVsEOf8tohuKm62Uh0_esN5KAc2yVrdkL263qBXeV7Q@mail.gmail.com> (raw)
In-Reply-To: <20210715194125.898305-4-ben.widawsky@intel.com>

In general "and" in the patch title is a red flag that the patch can
be split. I'll go ahead and do that when folding in the collision
fixes.

On Thu, Jul 15, 2021 at 12:41 PM Ben Widawsky <ben.widawsky@intel.com> wrote:
>
> Register mapping and pmem/nvdimm integration are distinct enough from
> basic CXL bus functionality that it warrants being moved out of bus.c
> Additionally, this aims to modularize for the sake of reducing the size
> of bus.c
>
> pmem and register programming have very clear separation and are done
> together for that reason. Other parts of core, like ports and decoders
> should be pulled out as well, but those are more integrated with core
> and therefore saved for later.
>
> Signed-off-by: Ben Widawsky <ben.widawsky@intel.com>
> ---
>  .../driver-api/cxl/memory-devices.rst         |   6 +
>  drivers/cxl/Makefile                          |   2 +-
>  drivers/cxl/core/bus.c                        | 435 +-----------------
>  drivers/cxl/core/core.h                       |  20 +
>  drivers/cxl/core/pmem.c                       | 201 ++++++++
>  drivers/cxl/core/regs.c                       | 235 ++++++++++
>  6 files changed, 466 insertions(+), 433 deletions(-)
>  create mode 100644 drivers/cxl/core/core.h
>  create mode 100644 drivers/cxl/core/pmem.c
>  create mode 100644 drivers/cxl/core/regs.c
>
[..]
> diff --git a/drivers/cxl/core/core.h b/drivers/cxl/core/core.h
> new file mode 100644
> index 000000000000..74011c40801d
> --- /dev/null
> +++ b/drivers/cxl/core/core.h
> @@ -0,0 +1,20 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/* Copyright(c) 2020 Intel Corporation. */
> +
> +#ifndef __CXL_CORE_H__
> +#define __CXL_CORE_H__
> +
> +#include "../cxl.h"
> +#include "../mem.h"

This results in unnecessary includes. Each compilation unit should
only include the headers it absolutely needs. In this case, making
each compilation unit responsible for its own includes means that
bus.c does not need mem.h, and regs.c does not need either cxl.h or
core.h

  reply	other threads:[~2021-07-28 22:14 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-15 19:41 [PATCH 0/6] CXL core reorganization Ben Widawsky
2021-07-15 19:41 ` [PATCH 1/6] cxl: Move cxl_core to new directory Ben Widawsky
2021-07-15 22:44   ` Dan Williams
2021-07-20 18:07     ` [PATCH v2 " Ben Widawsky
2021-07-20 18:14       ` Ben Widawsky
2021-07-15 19:41 ` [PATCH 2/6] cxl/core: Improve CXL core kernel docs Ben Widawsky
2021-07-15 23:46   ` Dan Williams
2021-07-15 19:41 ` [PATCH 3/6] cxl/core: Extract register and pmem functionality Ben Widawsky
2021-07-28 22:14   ` Dan Williams [this message]
2021-07-15 19:41 ` [PATCH 4/6] cxl/mem: Move character device region creation Ben Widawsky
2021-07-28 22:34   ` Dan Williams
2021-07-15 19:41 ` [PATCH 5/6] cxl: Pass fops and shutdown to memdev creation Ben Widawsky
2021-07-28 23:21   ` Dan Williams
2021-07-15 19:41 ` [PATCH 6/6] cxl/core: Move memdev management to core Ben Widawsky

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