* [PATCH 0/3]Enable PM generic domain support
@ 2021-04-02 9:20 Nava kishore Manne
2021-04-02 9:20 ` [PATCH 1/3] dt-bindings: zynqmp: Add new PD_PL macro Nava kishore Manne
` (2 more replies)
0 siblings, 3 replies; 13+ messages in thread
From: Nava kishore Manne @ 2021-04-02 9:20 UTC (permalink / raw)
To: mdf, trix, robh+dt, michal.simek, nava.manne, linux-fpga,
devicetree, linux-kernel, linux-arm-kernel, git
Adds support to handle FPGA/PL power Domain to optimize the PL power
consumption.
Nava kishore Manne (3):
dt-bindings: zynqmp: Add new PD_PL macro
fpga: region: Add fpga-region property 'power-domains'
fpga: region: Adds runtime PM support
.../devicetree/bindings/fpga/fpga-region.txt | 14 ++++++++++++++
drivers/fpga/of-fpga-region.c | 18 +++++++++++++++++-
include/dt-bindings/power/xlnx-zynqmp-power.h | 1 +
3 files changed, 32 insertions(+), 1 deletion(-)
--
2.18.0
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH 1/3] dt-bindings: zynqmp: Add new PD_PL macro
2021-04-02 9:20 [PATCH 0/3]Enable PM generic domain support Nava kishore Manne
@ 2021-04-02 9:20 ` Nava kishore Manne
2021-04-09 14:47 ` Rob Herring
2021-04-02 9:20 ` [PATCH 2/3] fpga: region: Add fpga-region property 'power-domains' Nava kishore Manne
2021-04-02 9:20 ` [PATCH 3/3] fpga: region: Adds runtime PM support Nava kishore Manne
2 siblings, 1 reply; 13+ messages in thread
From: Nava kishore Manne @ 2021-04-02 9:20 UTC (permalink / raw)
To: mdf, trix, robh+dt, michal.simek, nava.manne, linux-fpga,
devicetree, linux-kernel, linux-arm-kernel, git
Add new power domain for PL region.
Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
---
include/dt-bindings/power/xlnx-zynqmp-power.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/dt-bindings/power/xlnx-zynqmp-power.h b/include/dt-bindings/power/xlnx-zynqmp-power.h
index 0d9a412fd5e0..5f718759c38f 100644
--- a/include/dt-bindings/power/xlnx-zynqmp-power.h
+++ b/include/dt-bindings/power/xlnx-zynqmp-power.h
@@ -35,5 +35,6 @@
#define PD_CAN_1 48
#define PD_GPU 58
#define PD_PCIE 59
+#define PD_PL 69
#endif
--
2.18.0
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH 2/3] fpga: region: Add fpga-region property 'power-domains'
2021-04-02 9:20 [PATCH 0/3]Enable PM generic domain support Nava kishore Manne
2021-04-02 9:20 ` [PATCH 1/3] dt-bindings: zynqmp: Add new PD_PL macro Nava kishore Manne
@ 2021-04-02 9:20 ` Nava kishore Manne
2021-04-02 17:15 ` Moritz Fischer
2021-04-09 14:50 ` Rob Herring
2021-04-02 9:20 ` [PATCH 3/3] fpga: region: Adds runtime PM support Nava kishore Manne
2 siblings, 2 replies; 13+ messages in thread
From: Nava kishore Manne @ 2021-04-02 9:20 UTC (permalink / raw)
To: mdf, trix, robh+dt, michal.simek, nava.manne, linux-fpga,
devicetree, linux-kernel, linux-arm-kernel, git
Add fpga-region property 'power-domains' to allow to handle
the FPGA/PL power domins.
dt-bindings: fpga: Enable PM generic domain support
Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
---
.../devicetree/bindings/fpga/fpga-region.txt | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/Documentation/devicetree/bindings/fpga/fpga-region.txt b/Documentation/devicetree/bindings/fpga/fpga-region.txt
index e811cf825019..969ca53bb65e 100644
--- a/Documentation/devicetree/bindings/fpga/fpga-region.txt
+++ b/Documentation/devicetree/bindings/fpga/fpga-region.txt
@@ -196,6 +196,20 @@ Optional properties:
- config-complete-timeout-us : The maximum time in microseconds time for the
FPGA to go to operating mode after the region has been programmed.
- child nodes : devices in the FPGA after programming.
+- power-domains : A phandle and PM domain specifier as defined by bindings of
+ the power controller specified by phandle.
+Example:
+ fpga_full: fpga-full {
+ compatible = "fpga-region";
+ fpga-mgr = <&zynqmp_pcap>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ power-domains = <&zynqmp_firmware PL_PD>;
+ };
+
+ The PL_PD power domain will be turned on before loading the bitstream
+and turned off while removing/unloading the bitstream using overlays.
In the example below, when an overlay is applied targeting fpga-region0,
fpga_mgr is used to program the FPGA. Two bridges are controlled during
--
2.18.0
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH 3/3] fpga: region: Adds runtime PM support
2021-04-02 9:20 [PATCH 0/3]Enable PM generic domain support Nava kishore Manne
2021-04-02 9:20 ` [PATCH 1/3] dt-bindings: zynqmp: Add new PD_PL macro Nava kishore Manne
2021-04-02 9:20 ` [PATCH 2/3] fpga: region: Add fpga-region property 'power-domains' Nava kishore Manne
@ 2021-04-02 9:20 ` Nava kishore Manne
2021-04-09 21:30 ` Moritz Fischer
2021-06-02 13:02 ` Johan Hovold
2 siblings, 2 replies; 13+ messages in thread
From: Nava kishore Manne @ 2021-04-02 9:20 UTC (permalink / raw)
To: mdf, trix, robh+dt, michal.simek, nava.manne, linux-fpga,
devicetree, linux-kernel, linux-arm-kernel, git
Adds support to handle FPGA/PL power domain. With this patch,
the PL power domain will be turned on before loading the bitstream
and turned off while removing/unloading the bitstream using overlays.
This can be achieved by adding the runtime PM support.
Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
---
drivers/fpga/of-fpga-region.c | 18 +++++++++++++++++-
1 file changed, 17 insertions(+), 1 deletion(-)
diff --git a/drivers/fpga/of-fpga-region.c b/drivers/fpga/of-fpga-region.c
index e405309baadc..35fc2f3d4bd8 100644
--- a/drivers/fpga/of-fpga-region.c
+++ b/drivers/fpga/of-fpga-region.c
@@ -15,6 +15,7 @@
#include <linux/of_platform.h>
#include <linux/slab.h>
#include <linux/spinlock.h>
+#include <linux/pm_runtime.h>
static const struct of_device_id fpga_region_of_match[] = {
{ .compatible = "fpga-region", },
@@ -302,6 +303,7 @@ static int of_fpga_region_notify_pre_apply(struct fpga_region *region,
}
region->info = info;
+ pm_runtime_get_sync(dev->parent);
ret = fpga_region_program_fpga(region);
if (ret) {
/* error; reject overlay */
@@ -324,10 +326,13 @@ static int of_fpga_region_notify_pre_apply(struct fpga_region *region,
static void of_fpga_region_notify_post_remove(struct fpga_region *region,
struct of_overlay_notify_data *nd)
{
+ struct device *dev = ®ion->dev;
+
fpga_bridges_disable(®ion->bridge_list);
fpga_bridges_put(®ion->bridge_list);
fpga_image_info_free(region->info);
region->info = NULL;
+ pm_runtime_put(dev->parent);
}
/**
@@ -411,9 +416,16 @@ static int of_fpga_region_probe(struct platform_device *pdev)
goto eprobe_mgr_put;
}
+ pm_runtime_enable(&pdev->dev);
+ ret = pm_runtime_get_sync(&pdev->dev);
+ if (ret < 0)
+ goto err_pm;
+
+ pm_runtime_put(&pdev->dev);
+
ret = fpga_region_register(region);
if (ret)
- goto eprobe_mgr_put;
+ goto err_pm;
of_platform_populate(np, fpga_region_of_match, NULL, ®ion->dev);
platform_set_drvdata(pdev, region);
@@ -422,6 +434,9 @@ static int of_fpga_region_probe(struct platform_device *pdev)
return 0;
+err_pm:
+ pm_runtime_put(&pdev->dev);
+ pm_runtime_disable(&pdev->dev);
eprobe_mgr_put:
fpga_mgr_put(mgr);
return ret;
@@ -434,6 +449,7 @@ static int of_fpga_region_remove(struct platform_device *pdev)
fpga_region_unregister(region);
fpga_mgr_put(mgr);
+ pm_runtime_disable(region->dev.parent);
return 0;
}
--
2.18.0
^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH 2/3] fpga: region: Add fpga-region property 'power-domains'
2021-04-02 9:20 ` [PATCH 2/3] fpga: region: Add fpga-region property 'power-domains' Nava kishore Manne
@ 2021-04-02 17:15 ` Moritz Fischer
2021-04-05 8:46 ` Nava kishore Manne
2021-04-09 14:50 ` Rob Herring
1 sibling, 1 reply; 13+ messages in thread
From: Moritz Fischer @ 2021-04-02 17:15 UTC (permalink / raw)
To: Nava kishore Manne
Cc: mdf, trix, robh+dt, michal.simek, linux-fpga, devicetree,
linux-kernel, linux-arm-kernel, git
On Fri, Apr 02, 2021 at 02:50:48PM +0530, Nava kishore Manne wrote:
> Add fpga-region property 'power-domains' to allow to handle
> the FPGA/PL power domins.
>
> dt-bindings: fpga: Enable PM generic domain support
>
> Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
> ---
> .../devicetree/bindings/fpga/fpga-region.txt | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/fpga/fpga-region.txt b/Documentation/devicetree/bindings/fpga/fpga-region.txt
> index e811cf825019..969ca53bb65e 100644
> --- a/Documentation/devicetree/bindings/fpga/fpga-region.txt
> +++ b/Documentation/devicetree/bindings/fpga/fpga-region.txt
> @@ -196,6 +196,20 @@ Optional properties:
> - config-complete-timeout-us : The maximum time in microseconds time for the
> FPGA to go to operating mode after the region has been programmed.
> - child nodes : devices in the FPGA after programming.
> +- power-domains : A phandle and PM domain specifier as defined by bindings of
> + the power controller specified by phandle.
> +Example:
> + fpga_full: fpga-full {
> + compatible = "fpga-region";
> + fpga-mgr = <&zynqmp_pcap>;
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> + power-domains = <&zynqmp_firmware PL_PD>;
> + };
> +
> + The PL_PD power domain will be turned on before loading the bitstream
> +and turned off while removing/unloading the bitstream using overlays.
Can multiple regions share a power-domain or is this specific to full
fpga reconfiguration?
- Moritz
^ permalink raw reply [flat|nested] 13+ messages in thread
* RE: [PATCH 2/3] fpga: region: Add fpga-region property 'power-domains'
2021-04-02 17:15 ` Moritz Fischer
@ 2021-04-05 8:46 ` Nava kishore Manne
0 siblings, 0 replies; 13+ messages in thread
From: Nava kishore Manne @ 2021-04-05 8:46 UTC (permalink / raw)
To: Moritz Fischer
Cc: trix, robh+dt, Michal Simek, linux-fpga, devicetree,
linux-kernel, linux-arm-kernel, git
Hi Moritz,
Thanks for the response.
Please find my response inline.
> -----Original Message-----
> From: Moritz Fischer <mdf@kernel.org>
> Sent: Friday, April 2, 2021 10:46 PM
> To: Nava kishore Manne <navam@xilinx.com>
> Cc: mdf@kernel.org; trix@redhat.com; robh+dt@kernel.org; Michal Simek
> <michals@xilinx.com>; linux-fpga@vger.kernel.org;
> devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; linux-arm-
> kernel@lists.infradead.org; git <git@xilinx.com>
> Subject: Re: [PATCH 2/3] fpga: region: Add fpga-region property 'power-
> domains'
>
> On Fri, Apr 02, 2021 at 02:50:48PM +0530, Nava kishore Manne wrote:
> > Add fpga-region property 'power-domains' to allow to handle the
> > FPGA/PL power domins.
> >
> > dt-bindings: fpga: Enable PM generic domain support
> >
> > Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
> > ---
> > .../devicetree/bindings/fpga/fpga-region.txt | 14 ++++++++++++++
> > 1 file changed, 14 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/fpga/fpga-region.txt
> > b/Documentation/devicetree/bindings/fpga/fpga-region.txt
> > index e811cf825019..969ca53bb65e 100644
> > --- a/Documentation/devicetree/bindings/fpga/fpga-region.txt
> > +++ b/Documentation/devicetree/bindings/fpga/fpga-region.txt
> > @@ -196,6 +196,20 @@ Optional properties:
> > - config-complete-timeout-us : The maximum time in microseconds time
> for the
> > FPGA to go to operating mode after the region has been
> programmed.
> > - child nodes : devices in the FPGA after programming.
> > +- power-domains : A phandle and PM domain specifier as defined by
> bindings of
> > + the power controller specified by phandle.
> > +Example:
> > + fpga_full: fpga-full {
> > + compatible = "fpga-region";
> > + fpga-mgr = <&zynqmp_pcap>;
> > + #address-cells = <2>;
> > + #size-cells = <2>;
> > + ranges;
> > + power-domains = <&zynqmp_firmware PL_PD>;
> > + };
> > +
> > + The PL_PD power domain will be turned on before loading the
> > +bitstream and turned off while removing/unloading the bitstream using
> overlays.
>
> Can multiple regions share a power-domain or is this specific to full fpga
> reconfiguration?
>
These are generic changes and not limited to full region. If H/W supports individual power domains to control the Partial reconfiguration regions we can control the individual Partial reconfiguration region power domains as well.
Regards,
Navakishore.
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 1/3] dt-bindings: zynqmp: Add new PD_PL macro
2021-04-02 9:20 ` [PATCH 1/3] dt-bindings: zynqmp: Add new PD_PL macro Nava kishore Manne
@ 2021-04-09 14:47 ` Rob Herring
0 siblings, 0 replies; 13+ messages in thread
From: Rob Herring @ 2021-04-09 14:47 UTC (permalink / raw)
To: Nava kishore Manne
Cc: linux-fpga, linux-kernel, mdf, devicetree, git, michal.simek,
robh+dt, trix, linux-arm-kernel
On Fri, 02 Apr 2021 14:50:47 +0530, Nava kishore Manne wrote:
> Add new power domain for PL region.
>
> Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
> ---
> include/dt-bindings/power/xlnx-zynqmp-power.h | 1 +
> 1 file changed, 1 insertion(+)
>
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 2/3] fpga: region: Add fpga-region property 'power-domains'
2021-04-02 9:20 ` [PATCH 2/3] fpga: region: Add fpga-region property 'power-domains' Nava kishore Manne
2021-04-02 17:15 ` Moritz Fischer
@ 2021-04-09 14:50 ` Rob Herring
1 sibling, 0 replies; 13+ messages in thread
From: Rob Herring @ 2021-04-09 14:50 UTC (permalink / raw)
To: Nava kishore Manne
Cc: linux-kernel, mdf, michal.simek, trix, linux-fpga, git,
linux-arm-kernel, robh+dt, devicetree
On Fri, 02 Apr 2021 14:50:48 +0530, Nava kishore Manne wrote:
> Add fpga-region property 'power-domains' to allow to handle
> the FPGA/PL power domins.
>
> dt-bindings: fpga: Enable PM generic domain support
>
> Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
> ---
> .../devicetree/bindings/fpga/fpga-region.txt | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
>
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 3/3] fpga: region: Adds runtime PM support
2021-04-02 9:20 ` [PATCH 3/3] fpga: region: Adds runtime PM support Nava kishore Manne
@ 2021-04-09 21:30 ` Moritz Fischer
2021-04-19 5:18 ` Nava kishore Manne
2021-06-02 13:02 ` Johan Hovold
1 sibling, 1 reply; 13+ messages in thread
From: Moritz Fischer @ 2021-04-09 21:30 UTC (permalink / raw)
To: Nava kishore Manne
Cc: mdf, trix, robh+dt, michal.simek, linux-fpga, devicetree,
linux-kernel, linux-arm-kernel, git
On Fri, Apr 02, 2021 at 02:50:49PM +0530, Nava kishore Manne wrote:
> Adds support to handle FPGA/PL power domain. With this patch,
> the PL power domain will be turned on before loading the bitstream
> and turned off while removing/unloading the bitstream using overlays.
> This can be achieved by adding the runtime PM support.
>
> Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
> ---
> drivers/fpga/of-fpga-region.c | 18 +++++++++++++++++-
> 1 file changed, 17 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/fpga/of-fpga-region.c b/drivers/fpga/of-fpga-region.c
> index e405309baadc..35fc2f3d4bd8 100644
> --- a/drivers/fpga/of-fpga-region.c
> +++ b/drivers/fpga/of-fpga-region.c
> @@ -15,6 +15,7 @@
> #include <linux/of_platform.h>
> #include <linux/slab.h>
> #include <linux/spinlock.h>
> +#include <linux/pm_runtime.h>
>
> static const struct of_device_id fpga_region_of_match[] = {
> { .compatible = "fpga-region", },
> @@ -302,6 +303,7 @@ static int of_fpga_region_notify_pre_apply(struct fpga_region *region,
> }
>
> region->info = info;
> + pm_runtime_get_sync(dev->parent);
> ret = fpga_region_program_fpga(region);
> if (ret) {
> /* error; reject overlay */
> @@ -324,10 +326,13 @@ static int of_fpga_region_notify_pre_apply(struct fpga_region *region,
> static void of_fpga_region_notify_post_remove(struct fpga_region *region,
> struct of_overlay_notify_data *nd)
> {
> + struct device *dev = ®ion->dev;
> +
> fpga_bridges_disable(®ion->bridge_list);
> fpga_bridges_put(®ion->bridge_list);
> fpga_image_info_free(region->info);
> region->info = NULL;
> + pm_runtime_put(dev->parent);
> }
>
> /**
> @@ -411,9 +416,16 @@ static int of_fpga_region_probe(struct platform_device *pdev)
> goto eprobe_mgr_put;
> }
>
> + pm_runtime_enable(&pdev->dev);
> + ret = pm_runtime_get_sync(&pdev->dev);
> + if (ret < 0)
> + goto err_pm;
> +
> + pm_runtime_put(&pdev->dev);
> +
> ret = fpga_region_register(region);
> if (ret)
> - goto eprobe_mgr_put;
> + goto err_pm;
>
> of_platform_populate(np, fpga_region_of_match, NULL, ®ion->dev);
> platform_set_drvdata(pdev, region);
> @@ -422,6 +434,9 @@ static int of_fpga_region_probe(struct platform_device *pdev)
>
> return 0;
>
> +err_pm:
> + pm_runtime_put(&pdev->dev);
> + pm_runtime_disable(&pdev->dev);
> eprobe_mgr_put:
> fpga_mgr_put(mgr);
> return ret;
> @@ -434,6 +449,7 @@ static int of_fpga_region_remove(struct platform_device *pdev)
>
> fpga_region_unregister(region);
> fpga_mgr_put(mgr);
> + pm_runtime_disable(region->dev.parent);
>
> return 0;
> }
> --
> 2.18.0
>
Does this add a dependency on CONFIG_PM?
Thanks,
Moritz
^ permalink raw reply [flat|nested] 13+ messages in thread
* RE: [PATCH 3/3] fpga: region: Adds runtime PM support
2021-04-09 21:30 ` Moritz Fischer
@ 2021-04-19 5:18 ` Nava kishore Manne
2021-06-02 10:48 ` Nava kishore Manne
0 siblings, 1 reply; 13+ messages in thread
From: Nava kishore Manne @ 2021-04-19 5:18 UTC (permalink / raw)
To: Moritz Fischer
Cc: trix, robh+dt, Michal Simek, linux-fpga, devicetree,
linux-kernel, linux-arm-kernel, git
Hi Moritz,
Please find my response inline.
> -----Original Message-----
> From: Moritz Fischer <mdf@kernel.org>
> Sent: Saturday, April 10, 2021 3:01 AM
> To: Nava kishore Manne <navam@xilinx.com>
> Cc: mdf@kernel.org; trix@redhat.com; robh+dt@kernel.org; Michal Simek
> <michals@xilinx.com>; linux-fpga@vger.kernel.org;
> devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; linux-arm-
> kernel@lists.infradead.org; git <git@xilinx.com>
> Subject: Re: [PATCH 3/3] fpga: region: Adds runtime PM support
>
> On Fri, Apr 02, 2021 at 02:50:49PM +0530, Nava kishore Manne wrote:
> > Adds support to handle FPGA/PL power domain. With this patch, the PL
> > power domain will be turned on before loading the bitstream and turned
> > off while removing/unloading the bitstream using overlays.
> > This can be achieved by adding the runtime PM support.
> >
> > Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
> > ---
> > drivers/fpga/of-fpga-region.c | 18 +++++++++++++++++-
> > 1 file changed, 17 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/fpga/of-fpga-region.c
> > b/drivers/fpga/of-fpga-region.c index e405309baadc..35fc2f3d4bd8
> > 100644
> > --- a/drivers/fpga/of-fpga-region.c
> > +++ b/drivers/fpga/of-fpga-region.c
> > @@ -15,6 +15,7 @@
> > #include <linux/of_platform.h>
> > #include <linux/slab.h>
> > #include <linux/spinlock.h>
> > +#include <linux/pm_runtime.h>
> >
> > static const struct of_device_id fpga_region_of_match[] = {
> > { .compatible = "fpga-region", },
> > @@ -302,6 +303,7 @@ static int of_fpga_region_notify_pre_apply(struct
> fpga_region *region,
> > }
> >
> > region->info = info;
> > + pm_runtime_get_sync(dev->parent);
> > ret = fpga_region_program_fpga(region);
> > if (ret) {
> > /* error; reject overlay */
> > @@ -324,10 +326,13 @@ static int
> > of_fpga_region_notify_pre_apply(struct fpga_region *region, static void
> of_fpga_region_notify_post_remove(struct fpga_region *region,
> > struct of_overlay_notify_data
> *nd) {
> > + struct device *dev = ®ion->dev;
> > +
> > fpga_bridges_disable(®ion->bridge_list);
> > fpga_bridges_put(®ion->bridge_list);
> > fpga_image_info_free(region->info);
> > region->info = NULL;
> > + pm_runtime_put(dev->parent);
> > }
> >
> > /**
> > @@ -411,9 +416,16 @@ static int of_fpga_region_probe(struct
> platform_device *pdev)
> > goto eprobe_mgr_put;
> > }
> >
> > + pm_runtime_enable(&pdev->dev);
> > + ret = pm_runtime_get_sync(&pdev->dev);
> > + if (ret < 0)
> > + goto err_pm;
> > +
> > + pm_runtime_put(&pdev->dev);
> > +
> > ret = fpga_region_register(region);
> > if (ret)
> > - goto eprobe_mgr_put;
> > + goto err_pm;
> >
> > of_platform_populate(np, fpga_region_of_match, NULL, ®ion-
> >dev);
> > platform_set_drvdata(pdev, region);
> > @@ -422,6 +434,9 @@ static int of_fpga_region_probe(struct
> > platform_device *pdev)
> >
> > return 0;
> >
> > +err_pm:
> > + pm_runtime_put(&pdev->dev);
> > + pm_runtime_disable(&pdev->dev);
> > eprobe_mgr_put:
> > fpga_mgr_put(mgr);
> > return ret;
> > @@ -434,6 +449,7 @@ static int of_fpga_region_remove(struct
> > platform_device *pdev)
> >
> > fpga_region_unregister(region);
> > fpga_mgr_put(mgr);
> > + pm_runtime_disable(region->dev.parent);
> >
> > return 0;
> > }
> > --
> > 2.18.0
> >
>
> Does this add a dependency on CONFIG_PM?
>
Yes, the newly added functionality has a dependency on CONFIG_PM if it's disabled the expected power domain (in our cases it's PL) will not powered ON/OFF dynamically at runtime and this is as an expected behavior. Other than this it will not impact the any of the driver existing functionality.
Regards,
Navakishore.
^ permalink raw reply [flat|nested] 13+ messages in thread
* RE: [PATCH 3/3] fpga: region: Adds runtime PM support
2021-04-19 5:18 ` Nava kishore Manne
@ 2021-06-02 10:48 ` Nava kishore Manne
2021-06-02 20:39 ` Tom Rix
0 siblings, 1 reply; 13+ messages in thread
From: Nava kishore Manne @ 2021-06-02 10:48 UTC (permalink / raw)
To: Moritz Fischer
Cc: trix, robh+dt, Michal Simek, linux-fpga, devicetree,
linux-kernel, linux-arm-kernel, git
Ping!
> -----Original Message-----
> From: Nava kishore Manne
> Sent: Monday, April 19, 2021 10:49 AM
> To: Moritz Fischer <mdf@kernel.org>
> Cc: trix@redhat.com; robh+dt@kernel.org; Michal Simek
> <michals@xilinx.com>; linux-fpga@vger.kernel.org;
> devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; linux-arm-
> kernel@lists.infradead.org; git <git@xilinx.com>
> Subject: RE: [PATCH 3/3] fpga: region: Adds runtime PM support
>
> Hi Moritz,
>
> Please find my response inline.
>
> > -----Original Message-----
> > From: Moritz Fischer <mdf@kernel.org>
> > Sent: Saturday, April 10, 2021 3:01 AM
> > To: Nava kishore Manne <navam@xilinx.com>
> > Cc: mdf@kernel.org; trix@redhat.com; robh+dt@kernel.org; Michal Simek
> > <michals@xilinx.com>; linux-fpga@vger.kernel.org;
> > devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; linux-arm-
> > kernel@lists.infradead.org; git <git@xilinx.com>
> > Subject: Re: [PATCH 3/3] fpga: region: Adds runtime PM support
> >
> > On Fri, Apr 02, 2021 at 02:50:49PM +0530, Nava kishore Manne wrote:
> > > Adds support to handle FPGA/PL power domain. With this patch, the PL
> > > power domain will be turned on before loading the bitstream and
> > > turned off while removing/unloading the bitstream using overlays.
> > > This can be achieved by adding the runtime PM support.
> > >
> > > Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
> > > ---
> > > drivers/fpga/of-fpga-region.c | 18 +++++++++++++++++-
> > > 1 file changed, 17 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/drivers/fpga/of-fpga-region.c
> > > b/drivers/fpga/of-fpga-region.c index e405309baadc..35fc2f3d4bd8
> > > 100644
> > > --- a/drivers/fpga/of-fpga-region.c
> > > +++ b/drivers/fpga/of-fpga-region.c
> > > @@ -15,6 +15,7 @@
> > > #include <linux/of_platform.h>
> > > #include <linux/slab.h>
> > > #include <linux/spinlock.h>
> > > +#include <linux/pm_runtime.h>
> > >
> > > static const struct of_device_id fpga_region_of_match[] = {
> > > { .compatible = "fpga-region", },
> > > @@ -302,6 +303,7 @@ static int
> > > of_fpga_region_notify_pre_apply(struct
> > fpga_region *region,
> > > }
> > >
> > > region->info = info;
> > > + pm_runtime_get_sync(dev->parent);
> > > ret = fpga_region_program_fpga(region);
> > > if (ret) {
> > > /* error; reject overlay */
> > > @@ -324,10 +326,13 @@ static int
> > > of_fpga_region_notify_pre_apply(struct fpga_region *region, static
> > > void
> > of_fpga_region_notify_post_remove(struct fpga_region *region,
> > > struct of_overlay_notify_data
> > *nd) {
> > > + struct device *dev = ®ion->dev;
> > > +
> > > fpga_bridges_disable(®ion->bridge_list);
> > > fpga_bridges_put(®ion->bridge_list);
> > > fpga_image_info_free(region->info);
> > > region->info = NULL;
> > > + pm_runtime_put(dev->parent);
> > > }
> > >
> > > /**
> > > @@ -411,9 +416,16 @@ static int of_fpga_region_probe(struct
> > platform_device *pdev)
> > > goto eprobe_mgr_put;
> > > }
> > >
> > > + pm_runtime_enable(&pdev->dev);
> > > + ret = pm_runtime_get_sync(&pdev->dev);
> > > + if (ret < 0)
> > > + goto err_pm;
> > > +
> > > + pm_runtime_put(&pdev->dev);
> > > +
> > > ret = fpga_region_register(region);
> > > if (ret)
> > > - goto eprobe_mgr_put;
> > > + goto err_pm;
> > >
> > > of_platform_populate(np, fpga_region_of_match, NULL, ®ion-
> > >dev);
> > > platform_set_drvdata(pdev, region); @@ -422,6 +434,9 @@ static
> > >int of_fpga_region_probe(struct platform_device *pdev)
> > >
> > > return 0;
> > >
> > > +err_pm:
> > > + pm_runtime_put(&pdev->dev);
> > > + pm_runtime_disable(&pdev->dev);
> > > eprobe_mgr_put:
> > > fpga_mgr_put(mgr);
> > > return ret;
> > > @@ -434,6 +449,7 @@ static int of_fpga_region_remove(struct
> > > platform_device *pdev)
> > >
> > > fpga_region_unregister(region);
> > > fpga_mgr_put(mgr);
> > > + pm_runtime_disable(region->dev.parent);
> > >
> > > return 0;
> > > }
> > > --
> > > 2.18.0
> > >
> >
> > Does this add a dependency on CONFIG_PM?
> >
> Yes, the newly added functionality has a dependency on CONFIG_PM if it's
> disabled the expected power domain (in our cases it's PL) will not powered
> ON/OFF dynamically at runtime and this is as an expected behavior. Other
> than this it will not impact the any of the driver existing functionality.
>
> Regards,
> Navakishore.
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 3/3] fpga: region: Adds runtime PM support
2021-04-02 9:20 ` [PATCH 3/3] fpga: region: Adds runtime PM support Nava kishore Manne
2021-04-09 21:30 ` Moritz Fischer
@ 2021-06-02 13:02 ` Johan Hovold
1 sibling, 0 replies; 13+ messages in thread
From: Johan Hovold @ 2021-06-02 13:02 UTC (permalink / raw)
To: Nava kishore Manne
Cc: mdf, trix, robh+dt, michal.simek, linux-fpga, devicetree,
linux-kernel, linux-arm-kernel, git
On Fri, Apr 02, 2021 at 02:50:49PM +0530, Nava kishore Manne wrote:
> Adds support to handle FPGA/PL power domain. With this patch,
> the PL power domain will be turned on before loading the bitstream
> and turned off while removing/unloading the bitstream using overlays.
> This can be achieved by adding the runtime PM support.
>
> Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
> ---
> drivers/fpga/of-fpga-region.c | 18 +++++++++++++++++-
> 1 file changed, 17 insertions(+), 1 deletion(-)
> /**
> @@ -411,9 +416,16 @@ static int of_fpga_region_probe(struct platform_device *pdev)
> goto eprobe_mgr_put;
> }
>
> + pm_runtime_enable(&pdev->dev);
> + ret = pm_runtime_get_sync(&pdev->dev);
> + if (ret < 0)
> + goto err_pm;
> +
> + pm_runtime_put(&pdev->dev);
> +
> ret = fpga_region_register(region);
> if (ret)
> - goto eprobe_mgr_put;
> + goto err_pm;
Just a drive-by comment: you have PM usage counter imbalance here
(double put).
> of_platform_populate(np, fpga_region_of_match, NULL, ®ion->dev);
> platform_set_drvdata(pdev, region);
> @@ -422,6 +434,9 @@ static int of_fpga_region_probe(struct platform_device *pdev)
>
> return 0;
>
> +err_pm:
> + pm_runtime_put(&pdev->dev);
> + pm_runtime_disable(&pdev->dev);
> eprobe_mgr_put:
> fpga_mgr_put(mgr);
> return ret;
Johan
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 3/3] fpga: region: Adds runtime PM support
2021-06-02 10:48 ` Nava kishore Manne
@ 2021-06-02 20:39 ` Tom Rix
0 siblings, 0 replies; 13+ messages in thread
From: Tom Rix @ 2021-06-02 20:39 UTC (permalink / raw)
To: Nava kishore Manne, Moritz Fischer
Cc: robh+dt, Michal Simek, linux-fpga, devicetree, linux-kernel,
linux-arm-kernel, git
On 6/2/21 3:48 AM, Nava kishore Manne wrote:
> Ping!
>
>> -----Original Message-----
>> From: Nava kishore Manne
>> Sent: Monday, April 19, 2021 10:49 AM
>> To: Moritz Fischer <mdf@kernel.org>
>> Cc: trix@redhat.com; robh+dt@kernel.org; Michal Simek
>> <michals@xilinx.com>; linux-fpga@vger.kernel.org;
>> devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; linux-arm-
>> kernel@lists.infradead.org; git <git@xilinx.com>
>> Subject: RE: [PATCH 3/3] fpga: region: Adds runtime PM support
>>
>> Hi Moritz,
>>
>> Please find my response inline.
>>
>>> -----Original Message-----
>>> From: Moritz Fischer <mdf@kernel.org>
>>> Sent: Saturday, April 10, 2021 3:01 AM
>>> To: Nava kishore Manne <navam@xilinx.com>
>>> Cc: mdf@kernel.org; trix@redhat.com; robh+dt@kernel.org; Michal Simek
>>> <michals@xilinx.com>; linux-fpga@vger.kernel.org;
>>> devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; linux-arm-
>>> kernel@lists.infradead.org; git <git@xilinx.com>
>>> Subject: Re: [PATCH 3/3] fpga: region: Adds runtime PM support
>>>
>>> On Fri, Apr 02, 2021 at 02:50:49PM +0530, Nava kishore Manne wrote:
>>>> Adds support to handle FPGA/PL power domain. With this patch, the PL
>>>> power domain will be turned on before loading the bitstream and
>>>> turned off while removing/unloading the bitstream using overlays.
>>>> This can be achieved by adding the runtime PM support.
>>>>
>>>> Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
>>>> ---
>>>> drivers/fpga/of-fpga-region.c | 18 +++++++++++++++++-
>>>> 1 file changed, 17 insertions(+), 1 deletion(-)
>>>>
>>>> diff --git a/drivers/fpga/of-fpga-region.c
>>>> b/drivers/fpga/of-fpga-region.c index e405309baadc..35fc2f3d4bd8
>>>> 100644
>>>> --- a/drivers/fpga/of-fpga-region.c
>>>> +++ b/drivers/fpga/of-fpga-region.c
>>>> @@ -15,6 +15,7 @@
>>>> #include <linux/of_platform.h>
>>>> #include <linux/slab.h>
>>>> #include <linux/spinlock.h>
>>>> +#include <linux/pm_runtime.h>
>>>>
>>>> static const struct of_device_id fpga_region_of_match[] = {
>>>> { .compatible = "fpga-region", },
>>>> @@ -302,6 +303,7 @@ static int
>>>> of_fpga_region_notify_pre_apply(struct
>>> fpga_region *region,
>>>> }
>>>>
>>>> region->info = info;
>>>> + pm_runtime_get_sync(dev->parent);
>>>> ret = fpga_region_program_fpga(region);
>>>> if (ret) {
>>>> /* error; reject overlay */
>>>> @@ -324,10 +326,13 @@ static int
>>>> of_fpga_region_notify_pre_apply(struct fpga_region *region, static
>>>> void
>>> of_fpga_region_notify_post_remove(struct fpga_region *region,
>>>> struct of_overlay_notify_data
>>> *nd) {
>>>> + struct device *dev = ®ion->dev;
>>>> +
>>>> fpga_bridges_disable(®ion->bridge_list);
>>>> fpga_bridges_put(®ion->bridge_list);
>>>> fpga_image_info_free(region->info);
>>>> region->info = NULL;
>>>> + pm_runtime_put(dev->parent);
>>>> }
>>>>
>>>> /**
>>>> @@ -411,9 +416,16 @@ static int of_fpga_region_probe(struct
>>> platform_device *pdev)
>>>> goto eprobe_mgr_put;
>>>> }
>>>>
>>>> + pm_runtime_enable(&pdev->dev);
>>>> + ret = pm_runtime_get_sync(&pdev->dev);
>>>> + if (ret < 0)
>>>> + goto err_pm;
>>>> +
>>>> + pm_runtime_put(&pdev->dev);
>>>> +
>>>> ret = fpga_region_register(region);
>>>> if (ret)
>>>> - goto eprobe_mgr_put;
>>>> + goto err_pm;
>>>>
>>>> of_platform_populate(np, fpga_region_of_match, NULL, ®ion-
>>>> dev);
>>>> platform_set_drvdata(pdev, region); @@ -422,6 +434,9 @@ static
>>>> int of_fpga_region_probe(struct platform_device *pdev)
>>>>
>>>> return 0;
>>>>
>>>> +err_pm:
>>>> + pm_runtime_put(&pdev->dev);
>>>> + pm_runtime_disable(&pdev->dev);
>>>> eprobe_mgr_put:
>>>> fpga_mgr_put(mgr);
>>>> return ret;
>>>> @@ -434,6 +449,7 @@ static int of_fpga_region_remove(struct
>>>> platform_device *pdev)
>>>>
>>>> fpga_region_unregister(region);
>>>> fpga_mgr_put(mgr);
>>>> + pm_runtime_disable(region->dev.parent);
>>>>
>>>> return 0;
>>>> }
>>>> --
>>>> 2.18.0
>>>>
>>> Does this add a dependency on CONFIG_PM?
>>>
>> Yes, the newly added functionality has a dependency on CONFIG_PM if it's
>> disabled the expected power domain (in our cases it's PL) will not powered
>> ON/OFF dynamically at runtime and this is as an expected behavior. Other
>> than this it will not impact the any of the driver existing functionality.
This looks like a general change for a specific board.
Why can't this be done at the board level ?
Tom
>>
>> Regards,
>> Navakishore.
^ permalink raw reply [flat|nested] 13+ messages in thread
end of thread, other threads:[~2021-06-02 20:39 UTC | newest]
Thread overview: 13+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-04-02 9:20 [PATCH 0/3]Enable PM generic domain support Nava kishore Manne
2021-04-02 9:20 ` [PATCH 1/3] dt-bindings: zynqmp: Add new PD_PL macro Nava kishore Manne
2021-04-09 14:47 ` Rob Herring
2021-04-02 9:20 ` [PATCH 2/3] fpga: region: Add fpga-region property 'power-domains' Nava kishore Manne
2021-04-02 17:15 ` Moritz Fischer
2021-04-05 8:46 ` Nava kishore Manne
2021-04-09 14:50 ` Rob Herring
2021-04-02 9:20 ` [PATCH 3/3] fpga: region: Adds runtime PM support Nava kishore Manne
2021-04-09 21:30 ` Moritz Fischer
2021-04-19 5:18 ` Nava kishore Manne
2021-06-02 10:48 ` Nava kishore Manne
2021-06-02 20:39 ` Tom Rix
2021-06-02 13:02 ` Johan Hovold
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