From: Wangseok Lee <wangseok.lee@samsung.com>
To: "robh+dt@kernel.org" <robh+dt@kernel.org>,
"krzk+dt@kernel.org" <krzk+dt@kernel.org>,
"kishon@ti.com" <kishon@ti.com>,
"vkoul@kernel.org" <vkoul@kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"jesper.nilsson@axis.com" <jesper.nilsson@axis.com>,
"lars.persson@axis.com" <lars.persson@axis.com>,
"bhelgaas@google.com" <bhelgaas@google.com>,
"linux-phy@lists.infradead.org" <linux-phy@lists.infradead.org>,
"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"lorenzo.pieralisi@arm.com" <lorenzo.pieralisi@arm.com>,
"kw@linux.com" <kw@linux.com>,
"linux-arm-kernel@axis.com" <linux-arm-kernel@axis.com>,
"kernel@axis.com" <kernel@axis.com>
Cc: Moon-Ki Jun <moonki.jun@samsung.com>,
Sang Min Kim <hypmean.kim@samsung.com>,
Dongjin Yang <dj76.yang@samsung.com>,
Yeeun Kim <yeeun119.kim@samsung.com>
Subject: [PATCH v3 2/5] dt-bindings: phy: Add ARTPEC-8 PCIe phy
Date: Tue, 14 Jun 2022 10:29:16 +0900 [thread overview]
Message-ID: <20220614012916epcms2p5cf8d55e7420dea10bb4a05d91aaf99dd@epcms2p5> (raw)
In-Reply-To: <20220614011616epcms2p7dcaa67c53b7df5802dd7a697e2d472d7@epcms2p7>
Add description to support Axis, ARTPEC-8 SoC.
ARTPEC-8 is the SoC platform of Axis Communications
and PCIe phy is designed based on SAMSUNG PHY.
Signed-off-by: Wangseok Lee <wangseok.lee@samsung.com>
---
v2->v3 :
-modify version history to fit the linux commit rule
-remove 'Device Tree Bindings' on title
-remove clock-names entries
-change node name to soc from artpec8 on excamples
v1->v2 :
-'make dt_binding_check' result improvement
-Add the missing property list
-Align the indentation of continued lines/entries
---
.../bindings/phy/axis,artpec8-pcie-phy.yaml | 73 ++++++++++++++++++++++
1 file changed, 73 insertions(+)
create mode 100644 Documentation/devicetree/bindings/phy/axis,artpec8-pcie-phy.yaml
diff --git a/Documentation/devicetree/bindings/phy/axis,artpec8-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/axis,artpec8-pcie-phy.yaml
new file mode 100644
index 0000000..316b774
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/axis,artpec8-pcie-phy.yaml
@@ -0,0 +1,73 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/axis,artpec8-pcie-phy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: ARTPEC-8 SoC PCIe PHY
+
+maintainers:
+ - Jesper Nilsson <jesper.nilsson@axis.com>
+
+properties:
+ compatible:
+ const: axis,artpec8-pcie-phy
+
+ reg:
+ items:
+ - description: PHY registers.
+ - description: PHY coding sublayer registers.
+
+ reg-names:
+ items:
+ - const: phy
+ - const: pcs
+
+ "#phy-cells":
+ const: 0
+
+ clocks:
+ items:
+ - description: PCIe PHY reference clock
+
+ num-lanes:
+ const: 2
+
+ lcpll-ref-clk:
+ const: 1
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - "#phy-cells"
+ - clocks
+ - clock-names
+ - samsung,fsys-sysreg
+ - num-lanes
+ - lcpll-ref-clk
+
+additionalProperties: true
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ pcie_phy: pcie-phy@16c80000 {
+ compatible = "axis,artpec8-pcie-phy";
+ reg = <0x0 0x16c80000 0x0 0x2000>,
+ <0x0 0x16c90000 0x0 0x1000>;
+ reg-names = "phy", "pcs";
+ #phy-cells = <0>;
+ clocks = <&clock_cmu_fsys 53>;
+ clock-names = "ref";
+ samsung,fsys-sysreg = <&syscon_fsys>;
+ num-lanes = <2>;
+ lcpll-ref-clk = <1>;
+ };
+ };
+...
--
2.9.5
next prev parent reply other threads:[~2022-06-14 1:29 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20220614011616epcms2p7dcaa67c53b7df5802dd7a697e2d472d7@epcms2p7>
2022-06-14 1:16 ` [PATCH v3 0/5] Add support for Axis, ARTPEC-8 PCIe driver Wangseok Lee
[not found] ` <CGME20220614011616epcms2p7dcaa67c53b7df5802dd7a697e2d472d7@epcms2p3>
2022-06-14 1:30 ` [PATCH v3 3/5] PCI: axis: Add ARTPEC-8 PCIe controller driver Wangseok Lee
2022-06-20 8:35 ` Krzysztof Kozlowski
[not found] ` <CGME20220614011616epcms2p7dcaa67c53b7df5802dd7a697e2d472d7@epcms2p8>
2022-06-14 1:27 ` [PATCH v3 1/5] dt-bindings: pci: Add ARTPEC-8 PCIe controller Wangseok Lee
2022-06-16 22:54 ` Krzysztof Kozlowski
2022-06-14 1:34 ` [PATCH v3 4/5] phy: Add ARTPEC-8 PCIe PHY driver Wangseok Lee
2022-07-05 6:21 ` Vinod Koul
[not found] ` <CGME20220614011616epcms2p7dcaa67c53b7df5802dd7a697e2d472d7@epcms2p6>
2022-06-14 1:36 ` [PATCH v3 5/5] MAINTAINERS: Add Axis ARTPEC-8 PCIe PHY maintainers Wangseok Lee
2022-06-20 7:55 ` [PATCH v3 1/5] dt-bindings: pci: Add ARTPEC-8 PCIe controller Wangseok Lee
2022-06-20 8:42 ` Krzysztof Kozlowski
[not found] ` <CGME20220614011616epcms2p7dcaa67c53b7df5802dd7a697e2d472d7@epcms2p2>
2022-06-21 7:42 ` Wangseok Lee
2022-06-21 12:44 ` Krzysztof Kozlowski
[not found] ` <CGME20220614011616epcms2p7dcaa67c53b7df5802dd7a697e2d472d7@epcms2p4>
2022-06-22 7:20 ` Wangseok Lee
2022-07-06 5:22 ` [PATCH v3 2/5] dt-bindings: phy: Add ARTPEC-8 PCIe phy Wangseok Lee
2022-07-06 6:28 ` Krzysztof Kozlowski
2022-06-29 7:18 ` Wangseok Lee
2022-07-05 10:56 ` Krzysztof Kozlowski
2022-07-06 8:10 ` [PATCH v3 4/5] phy: Add ARTPEC-8 PCIe PHY driver Wangseok Lee
2022-07-06 16:51 ` Vinod Koul
[not found] ` <CGME20220614011616epcms2p7dcaa67c53b7df5802dd7a697e2d472d7@epcms2p5>
2022-06-14 1:29 ` Wangseok Lee [this message]
2022-06-16 22:58 ` [PATCH v3 2/5] dt-bindings: phy: Add ARTPEC-8 PCIe phy Krzysztof Kozlowski
2022-06-20 8:38 ` Wangseok Lee
2022-06-21 21:13 ` Bjorn Helgaas
[not found] ` <CGME20220621212357epcas2p41ecf1ace5d207b154cc77dac79bc7e53@epcms2p2>
2022-06-22 7:06 ` Wangseok Lee
2022-06-22 7:21 ` [PATCH v3 1/5] dt-bindings: pci: Add ARTPEC-8 PCIe controller Wangseok Lee
2022-06-23 8:27 ` Krzysztof Kozlowski
2022-07-14 9:59 ` [PATCH v3 4/5] phy: Add ARTPEC-8 PCIe PHY driver Wangseok Lee
2022-07-15 11:33 ` Vinod Koul
2022-06-21 7:56 ` [PATCH v3 3/5] PCI: axis: Add ARTPEC-8 PCIe controller driver Wangseok Lee
2022-07-06 5:20 ` [PATCH v3 2/5] dt-bindings: phy: Add ARTPEC-8 PCIe phy Wangseok Lee
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