From: Jookia <contact@jookia.org>
To: linux-sunxi@lists.linux.dev
Cc: John Watts <contact@jookia.org>,
devicetree@vger.kernel.org, linux-can@vger.kernel.org,
linux-riscv@lists.infradead.org,
Fabien Poussin <fabien.poussin@gmail.com>,
Samuel Holland <samuel@sholland.org>,
Jernej Skrabec <jernej.skrabec@gmail.com>,
Chen-Yu Tsai <wens@csie.org>
Subject: [PATCH 2/4] riscv: dts: allwinner: d1: Add CAN controller nodes
Date: Sat, 15 Jul 2023 21:25:20 +1000 [thread overview]
Message-ID: <20230715112523.2533742-3-contact@jookia.org> (raw)
In-Reply-To: <20230715112523.2533742-1-contact@jookia.org>
From: John Watts <contact@jookia.org>
The Allwinner D1, T113 provide two CAN controllers that are variants
of the R40 controller.
I have tested support for these controllers on two boards:
- A Lichee Panel RV 86 Panel running a D1 chip
- A Mango Pi MQ Dual running a T113-s3 chip
Both of these fully support both CAN controllers.
Signed-off-by: John Watts <contact@jookia.org>
---
.../boot/dts/allwinner/sunxi-d1s-t113.dtsi | 30 +++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
index 1bb1e5cae602..b185398334be 100644
--- a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
+++ b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
@@ -131,6 +131,18 @@ uart3_pb_pins: uart3-pb-pins {
pins = "PB6", "PB7";
function = "uart3";
};
+
+ /omit-if-no-ref/
+ can0_pins: can0_pins {
+ pins = "PB2", "PB3";
+ function = "can0";
+ };
+
+ /omit-if-no-ref/
+ can1_pins: can1_pins {
+ pins = "PB4", "PB5";
+ function = "can1";
+ };
};
ccu: clock-controller@2001000 {
@@ -879,5 +891,23 @@ rtc: rtc@7090000 {
clock-names = "bus", "hosc", "ahb";
#clock-cells = <1>;
};
+
+ can0: can@2504000 {
+ compatible = "allwinner,sun20i-d1-can";
+ reg = <0x02504000 0x400>;
+ interrupts = <SOC_PERIPHERAL_IRQ(21) IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_CAN0>;
+ resets = <&ccu RST_BUS_CAN0>;
+ status = "disabled";
+ };
+
+ can1: can@2504400 {
+ compatible = "allwinner,sun20i-d1-can";
+ reg = <0x02504400 0x400>;
+ interrupts = <SOC_PERIPHERAL_IRQ(22) IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_CAN1>;
+ resets = <&ccu RST_BUS_CAN1>;
+ status = "disabled";
+ };
};
};
--
2.41.0
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next prev parent reply other threads:[~2023-07-15 11:26 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-15 11:25 [PATCH 0/4] Add support for Allwinner D1 CAN controllers Jookia
2023-07-15 11:25 ` [PATCH 1/4] dt-bindings: net: can: Add support for Allwinner D1 CAN controller Jookia
2023-07-15 11:25 ` Jookia [this message]
2023-07-16 16:35 ` [PATCH 2/4] riscv: dts: allwinner: d1: Add CAN controller nodes Krzysztof Kozlowski
2023-07-16 16:50 ` John Watts
2023-07-17 6:39 ` Krzysztof Kozlowski
2023-07-17 8:26 ` John Watts
2023-07-15 11:25 ` [PATCH 3/4] can: sun4i_can: Add send support for the Allwinner D1 Jookia
2023-07-16 16:36 ` Krzysztof Kozlowski
2023-07-16 16:52 ` John Watts
2023-07-17 6:41 ` Krzysztof Kozlowski
2023-07-17 7:03 ` Marc Kleine-Budde
2023-07-17 7:12 ` Krzysztof Kozlowski
2023-07-17 8:28 ` John Watts
2023-07-15 11:25 ` [PATCH 4/4] can: sun4i_can: Correctly set acceptance registers on the D1 Jookia
2023-07-16 16:45 ` Jernej Škrabec
2023-07-16 16:52 ` John Watts
2023-07-17 8:00 ` [PATCH 0/4] Add support for Allwinner D1 CAN controllers Ben Dooks
2023-07-17 8:27 ` John Watts
2023-07-18 22:15 ` Rob Herring
2023-07-18 22:38 ` Conor Dooley
2023-07-19 6:52 ` John Watts
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