* [PATCH v2 0/4] spi: dt-bindings: qcom: convert qcom,spi-qup to DT schema
@ 2022-03-31 15:53 Krzysztof Kozlowski
2022-03-31 15:54 ` [PATCH v2 1/4] ARM: dts: qcom: ipq4019: align dmas in SPI with " Krzysztof Kozlowski
` (4 more replies)
0 siblings, 5 replies; 8+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-31 15:53 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
Mark Brown, linux-arm-msm, devicetree, linux-kernel, linux-spi
Cc: Krzysztof Kozlowski, Kuldeep Singh
Hi,
Changes since v1
================
1. Fix path in com/qcom,gsbi.txt.
2. Merge clock-names in example, correct $ref path (Kuldeep).
Merging
=======
The DTS patches are independent and silence warnings pointed
out by schema.
Best regards,
Krzysztof
Cc: Kuldeep Singh <singh.kuldeep87k@gmail.com>
Krzysztof Kozlowski (4):
ARM: dts: qcom: ipq4019: align dmas in SPI with DT schema
arm64: dts: qcom: msm8916: align dmas in SPI with DT schema
arm64: dts: qcom: qcs404: align clocks in SPI with DT schema
spi: dt-bindings: qcom,spi-qup: convert to dtschema
.../bindings/soc/qcom/qcom,gsbi.txt | 2 +-
.../devicetree/bindings/spi/qcom,spi-qup.txt | 103 ------------------
.../devicetree/bindings/spi/qcom,spi-qup.yaml | 81 ++++++++++++++
arch/arm/boot/dts/qcom-ipq4019.dtsi | 8 +-
arch/arm64/boot/dts/qcom/msm8916.dtsi | 24 ++--
arch/arm64/boot/dts/qcom/qcs404.dtsi | 36 +++---
6 files changed, 116 insertions(+), 138 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/spi/qcom,spi-qup.txt
create mode 100644 Documentation/devicetree/bindings/spi/qcom,spi-qup.yaml
--
2.32.0
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v2 1/4] ARM: dts: qcom: ipq4019: align dmas in SPI with DT schema
2022-03-31 15:53 [PATCH v2 0/4] spi: dt-bindings: qcom: convert qcom,spi-qup to DT schema Krzysztof Kozlowski
@ 2022-03-31 15:54 ` Krzysztof Kozlowski
2022-03-31 15:54 ` [PATCH v2 2/4] arm64: dts: qcom: msm8916: " Krzysztof Kozlowski
` (3 subsequent siblings)
4 siblings, 0 replies; 8+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-31 15:54 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
Mark Brown, linux-arm-msm, devicetree, linux-kernel, linux-spi
Cc: Kuldeep Singh, Krzysztof Kozlowski
The DT schema expects dma channels in tx-rx order. No functional
change.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
arch/arm/boot/dts/qcom-ipq4019.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi
index a9d0566a3190..dc8260684aee 100644
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -253,8 +253,8 @@ blsp1_spi1: spi@78b5000 { /* BLSP1 QUP1 */
clock-names = "core", "iface";
#address-cells = <1>;
#size-cells = <0>;
- dmas = <&blsp_dma 5>, <&blsp_dma 4>;
- dma-names = "rx", "tx";
+ dmas = <&blsp_dma 4>, <&blsp_dma 5>;
+ dma-names = "tx", "rx";
status = "disabled";
};
@@ -267,8 +267,8 @@ blsp1_spi2: spi@78b6000 { /* BLSP1 QUP2 */
clock-names = "core", "iface";
#address-cells = <1>;
#size-cells = <0>;
- dmas = <&blsp_dma 7>, <&blsp_dma 6>;
- dma-names = "rx", "tx";
+ dmas = <&blsp_dma 6>, <&blsp_dma 7>;
+ dma-names = "tx", "rx";
status = "disabled";
};
--
2.32.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v2 2/4] arm64: dts: qcom: msm8916: align dmas in SPI with DT schema
2022-03-31 15:53 [PATCH v2 0/4] spi: dt-bindings: qcom: convert qcom,spi-qup to DT schema Krzysztof Kozlowski
2022-03-31 15:54 ` [PATCH v2 1/4] ARM: dts: qcom: ipq4019: align dmas in SPI with " Krzysztof Kozlowski
@ 2022-03-31 15:54 ` Krzysztof Kozlowski
2022-03-31 15:54 ` [PATCH v2 3/4] arm64: dts: qcom: qcs404: align clocks " Krzysztof Kozlowski
` (2 subsequent siblings)
4 siblings, 0 replies; 8+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-31 15:54 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
Mark Brown, linux-arm-msm, devicetree, linux-kernel, linux-spi
Cc: Kuldeep Singh, Krzysztof Kozlowski
The DT schema expects dma channels in tx-rx order. No functional
change.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
arch/arm64/boot/dts/qcom/msm8916.dtsi | 24 ++++++++++++------------
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index e34963505e07..6e5e7883c747 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -1529,8 +1529,8 @@ blsp_spi1: spi@78b5000 {
clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface";
- dmas = <&blsp_dma 5>, <&blsp_dma 4>;
- dma-names = "rx", "tx";
+ dmas = <&blsp_dma 4>, <&blsp_dma 5>;
+ dma-names = "tx", "rx";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&spi1_default>;
pinctrl-1 = <&spi1_sleep>;
@@ -1561,8 +1561,8 @@ blsp_spi2: spi@78b6000 {
clocks = <&gcc GCC_BLSP1_QUP2_SPI_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface";
- dmas = <&blsp_dma 7>, <&blsp_dma 6>;
- dma-names = "rx", "tx";
+ dmas = <&blsp_dma 6>, <&blsp_dma 7>;
+ dma-names = "tx", "rx";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&spi2_default>;
pinctrl-1 = <&spi2_sleep>;
@@ -1593,8 +1593,8 @@ blsp_spi3: spi@78b7000 {
clocks = <&gcc GCC_BLSP1_QUP3_SPI_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface";
- dmas = <&blsp_dma 9>, <&blsp_dma 8>;
- dma-names = "rx", "tx";
+ dmas = <&blsp_dma 8>, <&blsp_dma 9>;
+ dma-names = "tx", "rx";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&spi3_default>;
pinctrl-1 = <&spi3_sleep>;
@@ -1625,8 +1625,8 @@ blsp_spi4: spi@78b8000 {
clocks = <&gcc GCC_BLSP1_QUP4_SPI_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface";
- dmas = <&blsp_dma 11>, <&blsp_dma 10>;
- dma-names = "rx", "tx";
+ dmas = <&blsp_dma 10>, <&blsp_dma 11>;
+ dma-names = "tx", "rx";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&spi4_default>;
pinctrl-1 = <&spi4_sleep>;
@@ -1657,8 +1657,8 @@ blsp_spi5: spi@78b9000 {
clocks = <&gcc GCC_BLSP1_QUP5_SPI_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface";
- dmas = <&blsp_dma 13>, <&blsp_dma 12>;
- dma-names = "rx", "tx";
+ dmas = <&blsp_dma 12>, <&blsp_dma 13>;
+ dma-names = "tx", "rx";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&spi5_default>;
pinctrl-1 = <&spi5_sleep>;
@@ -1689,8 +1689,8 @@ blsp_spi6: spi@78ba000 {
clocks = <&gcc GCC_BLSP1_QUP6_SPI_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface";
- dmas = <&blsp_dma 15>, <&blsp_dma 14>;
- dma-names = "rx", "tx";
+ dmas = <&blsp_dma 14>, <&blsp_dma 15>;
+ dma-names = "tx", "rx";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&spi6_default>;
pinctrl-1 = <&spi6_sleep>;
--
2.32.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v2 3/4] arm64: dts: qcom: qcs404: align clocks in SPI with DT schema
2022-03-31 15:53 [PATCH v2 0/4] spi: dt-bindings: qcom: convert qcom,spi-qup to DT schema Krzysztof Kozlowski
2022-03-31 15:54 ` [PATCH v2 1/4] ARM: dts: qcom: ipq4019: align dmas in SPI with " Krzysztof Kozlowski
2022-03-31 15:54 ` [PATCH v2 2/4] arm64: dts: qcom: msm8916: " Krzysztof Kozlowski
@ 2022-03-31 15:54 ` Krzysztof Kozlowski
2022-03-31 15:54 ` [PATCH v2 4/4] spi: dt-bindings: qcom,spi-qup: convert to dtschema Krzysztof Kozlowski
2022-03-31 16:04 ` [PATCH v2 0/4] spi: dt-bindings: qcom: convert qcom,spi-qup to DT schema Krzysztof Kozlowski
4 siblings, 0 replies; 8+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-31 15:54 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
Mark Brown, linux-arm-msm, devicetree, linux-kernel, linux-spi
Cc: Kuldeep Singh, Krzysztof Kozlowski
The DT schema expects clocks core-iface order. No functional change.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
arch/arm64/boot/dts/qcom/qcs404.dtsi | 36 ++++++++++++++--------------
1 file changed, 18 insertions(+), 18 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi
index 3f06f7cd3cf2..4af5065e830b 100644
--- a/arch/arm64/boot/dts/qcom/qcs404.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi
@@ -928,9 +928,9 @@ blsp1_spi0: spi@78b5000 {
compatible = "qcom,spi-qup-v2.2.1";
reg = <0x078b5000 0x600>;
interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_BLSP1_AHB_CLK>,
- <&gcc GCC_BLSP1_QUP0_SPI_APPS_CLK>;
- clock-names = "iface", "core";
+ clocks = <&gcc GCC_BLSP1_QUP0_SPI_APPS_CLK>,
+ <&gcc GCC_BLSP1_AHB_CLK>;
+ clock-names = "core", "iface";
pinctrl-names = "default";
pinctrl-0 = <&blsp1_spi0_default>;
#address-cells = <1>;
@@ -956,9 +956,9 @@ blsp1_spi1: spi@78b6000 {
compatible = "qcom,spi-qup-v2.2.1";
reg = <0x078b6000 0x600>;
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_BLSP1_AHB_CLK>,
- <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>;
- clock-names = "iface", "core";
+ clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>,
+ <&gcc GCC_BLSP1_AHB_CLK>;
+ clock-names = "core", "iface";
pinctrl-names = "default";
pinctrl-0 = <&blsp1_spi1_default>;
#address-cells = <1>;
@@ -984,9 +984,9 @@ blsp1_spi2: spi@78b7000 {
compatible = "qcom,spi-qup-v2.2.1";
reg = <0x078b7000 0x600>;
interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_BLSP1_AHB_CLK>,
- <&gcc GCC_BLSP1_QUP2_SPI_APPS_CLK>;
- clock-names = "iface", "core";
+ clocks = <&gcc GCC_BLSP1_QUP2_SPI_APPS_CLK>,
+ <&gcc GCC_BLSP1_AHB_CLK>;
+ clock-names = "core", "iface";
pinctrl-names = "default";
pinctrl-0 = <&blsp1_spi2_default>;
#address-cells = <1>;
@@ -1012,9 +1012,9 @@ blsp1_spi3: spi@78b8000 {
compatible = "qcom,spi-qup-v2.2.1";
reg = <0x078b8000 0x600>;
interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_BLSP1_AHB_CLK>,
- <&gcc GCC_BLSP1_QUP3_SPI_APPS_CLK>;
- clock-names = "iface", "core";
+ clocks = <&gcc GCC_BLSP1_QUP3_SPI_APPS_CLK>,
+ <&gcc GCC_BLSP1_AHB_CLK>;
+ clock-names = "core", "iface";
pinctrl-names = "default";
pinctrl-0 = <&blsp1_spi3_default>;
#address-cells = <1>;
@@ -1040,9 +1040,9 @@ blsp1_spi4: spi@78b9000 {
compatible = "qcom,spi-qup-v2.2.1";
reg = <0x078b9000 0x600>;
interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_BLSP1_AHB_CLK>,
- <&gcc GCC_BLSP1_QUP4_SPI_APPS_CLK>;
- clock-names = "iface", "core";
+ clocks = <&gcc GCC_BLSP1_QUP4_SPI_APPS_CLK>,
+ <&gcc GCC_BLSP1_AHB_CLK>;
+ clock-names = "core", "iface";
pinctrl-names = "default";
pinctrl-0 = <&blsp1_spi4_default>;
#address-cells = <1>;
@@ -1092,9 +1092,9 @@ blsp2_spi0: spi@7af5000 {
compatible = "qcom,spi-qup-v2.2.1";
reg = <0x07af5000 0x600>;
interrupts = <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_BLSP2_AHB_CLK>,
- <&gcc GCC_BLSP2_QUP0_SPI_APPS_CLK>;
- clock-names = "iface", "core";
+ clocks = <&gcc GCC_BLSP2_QUP0_SPI_APPS_CLK>,
+ <&gcc GCC_BLSP2_AHB_CLK>;
+ clock-names = "core", "iface";
pinctrl-names = "default";
pinctrl-0 = <&blsp2_spi0_default>;
#address-cells = <1>;
--
2.32.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v2 4/4] spi: dt-bindings: qcom,spi-qup: convert to dtschema
2022-03-31 15:53 [PATCH v2 0/4] spi: dt-bindings: qcom: convert qcom,spi-qup to DT schema Krzysztof Kozlowski
` (2 preceding siblings ...)
2022-03-31 15:54 ` [PATCH v2 3/4] arm64: dts: qcom: qcs404: align clocks " Krzysztof Kozlowski
@ 2022-03-31 15:54 ` Krzysztof Kozlowski
2022-04-04 7:54 ` Mark Brown
2022-03-31 16:04 ` [PATCH v2 0/4] spi: dt-bindings: qcom: convert qcom,spi-qup to DT schema Krzysztof Kozlowski
4 siblings, 1 reply; 8+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-31 15:54 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
Mark Brown, linux-arm-msm, devicetree, linux-kernel, linux-spi
Cc: Kuldeep Singh, Krzysztof Kozlowski
Convert the Qualcomm Universal Peripheral (QUP) Serial Peripheral
Interface (SPI) bindings to DT Schema.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
.../bindings/soc/qcom/qcom,gsbi.txt | 2 +-
.../devicetree/bindings/spi/qcom,spi-qup.txt | 103 ------------------
.../devicetree/bindings/spi/qcom,spi-qup.yaml | 81 ++++++++++++++
3 files changed, 82 insertions(+), 104 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/spi/qcom,spi-qup.txt
create mode 100644 Documentation/devicetree/bindings/spi/qcom,spi-qup.yaml
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,gsbi.txt b/Documentation/devicetree/bindings/soc/qcom/qcom,gsbi.txt
index fe1855f09dcc..c443f1416a0a 100644
--- a/Documentation/devicetree/bindings/soc/qcom/qcom,gsbi.txt
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,gsbi.txt
@@ -33,7 +33,7 @@ controller, or some combination of aforementioned devices.
See the following for child node definitions:
Documentation/devicetree/bindings/i2c/qcom,i2c-qup.txt
-Documentation/devicetree/bindings/spi/qcom,spi-qup.txt
+Documentation/devicetree/bindings/spi/qcom,spi-qup.yaml
Documentation/devicetree/bindings/serial/qcom,msm-uartdm.txt
Example for APQ8064:
diff --git a/Documentation/devicetree/bindings/spi/qcom,spi-qup.txt b/Documentation/devicetree/bindings/spi/qcom,spi-qup.txt
deleted file mode 100644
index 5c090771c016..000000000000
--- a/Documentation/devicetree/bindings/spi/qcom,spi-qup.txt
+++ /dev/null
@@ -1,103 +0,0 @@
-Qualcomm Universal Peripheral (QUP) Serial Peripheral Interface (SPI)
-
-The QUP core is an AHB slave that provides a common data path (an output FIFO
-and an input FIFO) for serial peripheral interface (SPI) mini-core.
-
-SPI in master mode supports up to 50MHz, up to four chip selects, programmable
-data path from 4 bits to 32 bits and numerous protocol variants.
-
-Required properties:
-- compatible: Should contain:
- "qcom,spi-qup-v1.1.1" for 8660, 8960 and 8064.
- "qcom,spi-qup-v2.1.1" for 8974 and later
- "qcom,spi-qup-v2.2.1" for 8974 v2 and later.
-
-- reg: Should contain base register location and length
-- interrupts: Interrupt number used by this controller
-
-- clocks: Should contain the core clock and the AHB clock.
-- clock-names: Should be "core" for the core clock and "iface" for the
- AHB clock.
-
-- #address-cells: Number of cells required to define a chip select
- address on the SPI bus. Should be set to 1.
-- #size-cells: Should be zero.
-
-Optional properties:
-- spi-max-frequency: Specifies maximum SPI clock frequency,
- Units - Hz. Definition as per
- Documentation/devicetree/bindings/spi/spi-bus.txt
-- num-cs: total number of chipselects
-- cs-gpios: should specify GPIOs used for chipselects.
- The gpios will be referred to as reg = <index> in the SPI child
- nodes. If unspecified, a single SPI device without a chip
- select can be used.
-
-- dmas: Two DMA channel specifiers following the convention outlined
- in bindings/dma/dma.txt
-- dma-names: Names for the dma channels, if present. There must be at
- least one channel named "tx" for transmit and named "rx" for
- receive.
-
-SPI slave nodes must be children of the SPI master node and can contain
-properties described in Documentation/devicetree/bindings/spi/spi-bus.txt
-
-Example:
-
- spi_8: spi@f9964000 { /* BLSP2 QUP2 */
-
- compatible = "qcom,spi-qup-v2";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0xf9964000 0x1000>;
- interrupts = <0 102 0>;
- spi-max-frequency = <19200000>;
-
- clocks = <&gcc GCC_BLSP2_QUP2_SPI_APPS_CLK>, <&gcc GCC_BLSP2_AHB_CLK>;
- clock-names = "core", "iface";
-
- dmas = <&blsp1_bam 13>, <&blsp1_bam 12>;
- dma-names = "rx", "tx";
-
- pinctrl-names = "default";
- pinctrl-0 = <&spi8_default>;
-
- device@0 {
- compatible = "arm,pl022-dummy";
- #address-cells = <1>;
- #size-cells = <1>;
- reg = <0>; /* Chip select 0 */
- spi-max-frequency = <19200000>;
- spi-cpol;
- };
-
- device@1 {
- compatible = "arm,pl022-dummy";
- #address-cells = <1>;
- #size-cells = <1>;
- reg = <1>; /* Chip select 1 */
- spi-max-frequency = <9600000>;
- spi-cpha;
- };
-
- device@2 {
- compatible = "arm,pl022-dummy";
- #address-cells = <1>;
- #size-cells = <1>;
- reg = <2>; /* Chip select 2 */
- spi-max-frequency = <19200000>;
- spi-cpol;
- spi-cpha;
- };
-
- device@3 {
- compatible = "arm,pl022-dummy";
- #address-cells = <1>;
- #size-cells = <1>;
- reg = <3>; /* Chip select 3 */
- spi-max-frequency = <19200000>;
- spi-cpol;
- spi-cpha;
- spi-cs-high;
- };
- };
diff --git a/Documentation/devicetree/bindings/spi/qcom,spi-qup.yaml b/Documentation/devicetree/bindings/spi/qcom,spi-qup.yaml
new file mode 100644
index 000000000000..93f14dd01afc
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/qcom,spi-qup.yaml
@@ -0,0 +1,81 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spi/qcom,spi-qup.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Universal Peripheral (QUP) Serial Peripheral Interface (SPI)
+
+maintainers:
+ - Andy Gross <agross@kernel.org>
+ - Bjorn Andersson <bjorn.andersson@linaro.org>
+ - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+
+description:
+ The QUP core is an AHB slave that provides a common data path (an output FIFO
+ and an input FIFO) for serial peripheral interface (SPI) mini-core.
+
+ SPI in master mode supports up to 50MHz, up to four chip selects,
+ programmable data path from 4 bits to 32 bits and numerous protocol variants.
+
+allOf:
+ - $ref: /schemas/spi/spi-controller.yaml#
+
+properties:
+ compatible:
+ enum:
+ - qcom,spi-qup-v1.1.1 # for 8660, 8960 and 8064
+ - qcom,spi-qup-v2.1.1 # for 8974 and later
+ - qcom,spi-qup-v2.2.1 # for 8974 v2 and later
+
+ clocks:
+ maxItems: 2
+
+ clock-names:
+ items:
+ - const: core
+ - const: iface
+
+ dmas:
+ maxItems: 2
+
+ dma-names:
+ items:
+ - const: tx
+ - const: rx
+
+ interrupts:
+ maxItems: 1
+
+ reg:
+ maxItems: 1
+
+required:
+ - compatible
+ - clocks
+ - clock-names
+ - interrupts
+ - reg
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,gcc-msm8996.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ spi@7575000 {
+ compatible = "qcom,spi-qup-v2.2.1";
+ reg = <0x07575000 0x600>;
+ interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>,
+ <&gcc GCC_BLSP1_AHB_CLK>;
+ clock-names = "core", "iface";
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&blsp1_spi1_default>;
+ pinctrl-1 = <&blsp1_spi1_sleep>;
+ dmas = <&blsp1_dma 12>, <&blsp1_dma 13>;
+ dma-names = "tx", "rx";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
--
2.32.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH v2 0/4] spi: dt-bindings: qcom: convert qcom,spi-qup to DT schema
2022-03-31 15:53 [PATCH v2 0/4] spi: dt-bindings: qcom: convert qcom,spi-qup to DT schema Krzysztof Kozlowski
` (3 preceding siblings ...)
2022-03-31 15:54 ` [PATCH v2 4/4] spi: dt-bindings: qcom,spi-qup: convert to dtschema Krzysztof Kozlowski
@ 2022-03-31 16:04 ` Krzysztof Kozlowski
4 siblings, 0 replies; 8+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-31 16:04 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
Mark Brown, linux-arm-msm, devicetree, linux-kernel, linux-spi
Cc: Kuldeep Singh
On 31/03/2022 17:53, Krzysztof Kozlowski wrote:
> Hi,
>
> Changes since v1
> ================
> 1. Fix path in com/qcom,gsbi.txt.
> 2. Merge clock-names in example, correct $ref path (Kuldeep).
>
> Merging
> =======
> The DTS patches are independent and silence warnings pointed
> out by schema.
>
> Best regards,
> Krzysztof
>
> Cc: Kuldeep Singh <singh.kuldeep87k@gmail.com>
>
I forgot to add the ack from Kuldeep:
Acked-by: Kuldeep Singh <singh.kuldeep87k@gmail.com>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v2 4/4] spi: dt-bindings: qcom,spi-qup: convert to dtschema
2022-03-31 15:54 ` [PATCH v2 4/4] spi: dt-bindings: qcom,spi-qup: convert to dtschema Krzysztof Kozlowski
@ 2022-04-04 7:54 ` Mark Brown
2022-04-04 9:53 ` Krzysztof Kozlowski
0 siblings, 1 reply; 8+ messages in thread
From: Mark Brown @ 2022-04-04 7:54 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
linux-arm-msm, devicetree, linux-kernel, linux-spi,
Kuldeep Singh
[-- Attachment #1: Type: text/plain, Size: 245 bytes --]
On Thu, Mar 31, 2022 at 05:54:25PM +0200, Krzysztof Kozlowski wrote:
> Convert the Qualcomm Universal Peripheral (QUP) Serial Peripheral
> Interface (SPI) bindings to DT Schema.
This doesn't apply against current code, please check and resend.
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v2 4/4] spi: dt-bindings: qcom,spi-qup: convert to dtschema
2022-04-04 7:54 ` Mark Brown
@ 2022-04-04 9:53 ` Krzysztof Kozlowski
0 siblings, 0 replies; 8+ messages in thread
From: Krzysztof Kozlowski @ 2022-04-04 9:53 UTC (permalink / raw)
To: Mark Brown
Cc: Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
linux-arm-msm, devicetree, linux-kernel, linux-spi,
Kuldeep Singh
On 04/04/2022 09:54, Mark Brown wrote:
> On Thu, Mar 31, 2022 at 05:54:25PM +0200, Krzysztof Kozlowski wrote:
>> Convert the Qualcomm Universal Peripheral (QUP) Serial Peripheral
>> Interface (SPI) bindings to DT Schema.
>
> This doesn't apply against current code, please check and resend.
The v2 was superseded with:
https://lore.kernel.org/linux-devicetree/20220402184011.132465-1-krzysztof.kozlowski@linaro.org/
The v3 needs a fix (in different place, not v3), so I will send a v4.
The SPI patch is now dependency for final schema conversion, so I think
would be better if you ack/review it.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2022-04-04 9:53 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-03-31 15:53 [PATCH v2 0/4] spi: dt-bindings: qcom: convert qcom,spi-qup to DT schema Krzysztof Kozlowski
2022-03-31 15:54 ` [PATCH v2 1/4] ARM: dts: qcom: ipq4019: align dmas in SPI with " Krzysztof Kozlowski
2022-03-31 15:54 ` [PATCH v2 2/4] arm64: dts: qcom: msm8916: " Krzysztof Kozlowski
2022-03-31 15:54 ` [PATCH v2 3/4] arm64: dts: qcom: qcs404: align clocks " Krzysztof Kozlowski
2022-03-31 15:54 ` [PATCH v2 4/4] spi: dt-bindings: qcom,spi-qup: convert to dtschema Krzysztof Kozlowski
2022-04-04 7:54 ` Mark Brown
2022-04-04 9:53 ` Krzysztof Kozlowski
2022-03-31 16:04 ` [PATCH v2 0/4] spi: dt-bindings: qcom: convert qcom,spi-qup to DT schema Krzysztof Kozlowski
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).