From: Michael Neuling <mikey@neuling.org>
To: Athira Rajeev <atrajeev@linux.vnet.ibm.com>, mpe@ellerman.id.au
Cc: Paul Mackerras <paulus@samba.org>,
maddy@linux.vnet.ibm.com, linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH v2 02/10] KVM: PPC: Book3S HV: Save/restore new PMU registers
Date: Tue, 07 Jul 2020 16:13:17 +1000 [thread overview]
Message-ID: <9fbd0e9bb67bd71077c46e905338561c14c1e639.camel@neuling.org> (raw)
In-Reply-To: <1593595262-1433-3-git-send-email-atrajeev@linux.vnet.ibm.com>
@@ -637,12 +637,12 @@ struct kvm_vcpu_arch {
> u32 ccr1;
> u32 dbsr;
>
> - u64 mmcr[5];
> + u64 mmcr[6];
> u32 pmc[8];
> u32 spmc[2];
> u64 siar;
> + mfspr r5, SPRN_MMCR3
> + mfspr r6, SPRN_SIER2
> + mfspr r7, SPRN_SIER3
> + std r5, VCPU_MMCR + 40(r9)
> + std r6, VCPU_SIER + 8(r9)
> + std r7, VCPU_SIER + 16(r9)
This is looking pretty fragile now. vcpu mmcr[6] stores (in this strict order):
mmcr0, mmcr1, mmcra, mmcr2, mmcrs, mmmcr3.
Can we clean that up? Give mmcra and mmcrs their own entries in vcpu and then
have a flat array for mmcr0-3.
Mikey
next prev parent reply other threads:[~2020-07-07 6:14 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-01 9:20 [PATCH v2 00/10] powerpc/perf: Add support for power10 PMU Hardware Athira Rajeev
2020-07-01 9:20 ` [PATCH v2 01/10] powerpc/perf: Add support for ISA3.1 PMU SPRs Athira Rajeev
2020-07-08 11:02 ` Michael Ellerman
2020-07-09 1:53 ` Athira Rajeev
2020-07-13 12:50 ` Michael Ellerman
2020-07-15 6:07 ` Athira Rajeev
2020-07-01 9:20 ` [PATCH v2 02/10] KVM: PPC: Book3S HV: Save/restore new PMU registers Athira Rajeev
2020-07-01 11:11 ` Paul Mackerras
2020-07-02 6:22 ` Athira Rajeev
2020-07-07 6:13 ` Michael Neuling [this message]
2020-07-01 9:20 ` [PATCH v2 03/10] powerpc/xmon: Add PowerISA v3.1 PMU SPRs Athira Rajeev
2020-07-08 11:04 ` Michael Ellerman
2020-07-09 1:57 ` Athira Rajeev
2020-07-01 9:20 ` [PATCH v2 04/10] powerpc/perf: Add power10_feat to dt_cpu_ftrs Athira Rajeev
2020-07-07 6:22 ` Michael Neuling
2020-07-08 2:13 ` Athira Rajeev
2020-07-08 11:15 ` Michael Ellerman
2020-07-09 11:07 ` Athira Rajeev
2020-07-01 9:20 ` [PATCH v2 05/10] powerpc/perf: Update Power PMU cache_events to u64 type Athira Rajeev
2020-07-01 9:20 ` [PATCH v2 06/10] powerpc/perf: power10 Performance Monitoring support Athira Rajeev
2020-07-02 9:06 ` kernel test robot
2020-07-07 6:50 ` Michael Neuling
2020-07-08 10:56 ` Athira Rajeev
2020-07-01 9:20 ` [PATCH v2 07/10] powerpc/perf: support BHRB disable bit and new filtering modes Athira Rajeev
2020-07-07 7:17 ` Michael Neuling
2020-07-08 7:41 ` Athira Rajeev
2020-07-08 7:43 ` Gautham R Shenoy
2020-07-09 2:01 ` Athira Rajeev
2020-07-08 11:42 ` Michael Ellerman
2020-07-09 2:43 ` Athira Rajeev
2020-07-01 9:21 ` [PATCH v2 08/10] powerpc/perf: Add support for outputting extended regs in perf intr_regs Athira Rajeev
2020-07-01 9:21 ` [PATCH v2 09/10] tools/perf: Add perf tools support for extended register capability in powerpc Athira Rajeev
2020-07-08 12:04 ` Michael Ellerman
2020-07-09 3:10 ` Athira Rajeev
2020-07-13 12:47 ` Michael Ellerman
2020-07-13 2:36 ` Athira Rajeev
2020-07-01 9:21 ` [PATCH v2 10/10] powerpc/perf: Add extended regs support for power10 platform Athira Rajeev
2020-07-02 9:40 ` kernel test robot
2020-07-08 1:53 ` Athira Rajeev
2020-07-08 12:04 ` Michael Ellerman
2020-07-09 6:29 ` Athira Rajeev
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