From: Michael Neuling <mikey@neuling.org>
To: Athira Rajeev <atrajeev@linux.vnet.ibm.com>, mpe@ellerman.id.au
Cc: maddy@linux.vnet.ibm.com, linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH v2 04/10] powerpc/perf: Add power10_feat to dt_cpu_ftrs
Date: Tue, 07 Jul 2020 16:22:18 +1000 [thread overview]
Message-ID: <fbc244b88f9291e83b2eabedd73ec9672b1fa12d.camel@neuling.org> (raw)
In-Reply-To: <1593595262-1433-5-git-send-email-atrajeev@linux.vnet.ibm.com>
On Wed, 2020-07-01 at 05:20 -0400, Athira Rajeev wrote:
> From: Madhavan Srinivasan <maddy@linux.ibm.com>
>
> Add power10 feature function to dt_cpu_ftrs.c along
> with a power10 specific init() to initialize pmu sprs.
Can you say why you're doing this?
Can you add some text about what you're doing to the BHRB in this patch?
Mikey
>
> Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com>
> ---
> arch/powerpc/include/asm/reg.h | 3 +++
> arch/powerpc/kernel/cpu_setup_power.S | 7 +++++++
> arch/powerpc/kernel/dt_cpu_ftrs.c | 26 ++++++++++++++++++++++++++
> 3 files changed, 36 insertions(+)
>
> diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
> index 21a1b2d..900ada1 100644
> --- a/arch/powerpc/include/asm/reg.h
> +++ b/arch/powerpc/include/asm/reg.h
> @@ -1068,6 +1068,9 @@
> #define MMCR0_PMC2_LOADMISSTIME 0x5
> #endif
>
> +/* BHRB disable bit for PowerISA v3.10 */
> +#define MMCRA_BHRB_DISABLE 0x0000002000000000
> +
> /*
> * SPRG usage:
> *
> diff --git a/arch/powerpc/kernel/cpu_setup_power.S
> b/arch/powerpc/kernel/cpu_setup_power.S
> index efdcfa7..e8b3370c 100644
> --- a/arch/powerpc/kernel/cpu_setup_power.S
> +++ b/arch/powerpc/kernel/cpu_setup_power.S
> @@ -233,3 +233,10 @@ __init_PMU_ISA207:
> li r5,0
> mtspr SPRN_MMCRS,r5
> blr
> +
> +__init_PMU_ISA31:
> + li r5,0
> + mtspr SPRN_MMCR3,r5
> + LOAD_REG_IMMEDIATE(r5, MMCRA_BHRB_DISABLE)
> + mtspr SPRN_MMCRA,r5
> + blr
> diff --git a/arch/powerpc/kernel/dt_cpu_ftrs.c
> b/arch/powerpc/kernel/dt_cpu_ftrs.c
> index a0edeb3..14a513f 100644
> --- a/arch/powerpc/kernel/dt_cpu_ftrs.c
> +++ b/arch/powerpc/kernel/dt_cpu_ftrs.c
> @@ -449,6 +449,31 @@ static int __init feat_enable_pmu_power9(struct
> dt_cpu_feature *f)
> return 1;
> }
>
> +static void init_pmu_power10(void)
> +{
> + init_pmu_power9();
> +
> + mtspr(SPRN_MMCR3, 0);
> + mtspr(SPRN_MMCRA, MMCRA_BHRB_DISABLE);
> +}
> +
> +static int __init feat_enable_pmu_power10(struct dt_cpu_feature *f)
> +{
> + hfscr_pmu_enable();
> +
> + init_pmu_power10();
> + init_pmu_registers = init_pmu_power10;
> +
> + cur_cpu_spec->cpu_features |= CPU_FTR_MMCRA;
> + cur_cpu_spec->cpu_user_features |= PPC_FEATURE_PSERIES_PERFMON_COMPAT;
> +
> + cur_cpu_spec->num_pmcs = 6;
> + cur_cpu_spec->pmc_type = PPC_PMC_IBM;
> + cur_cpu_spec->oprofile_cpu_type = "ppc64/power10";
> +
> + return 1;
> +}
> +
> static int __init feat_enable_tm(struct dt_cpu_feature *f)
> {
> #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
> @@ -638,6 +663,7 @@ struct dt_cpu_feature_match {
> {"pc-relative-addressing", feat_enable, 0},
> {"machine-check-power9", feat_enable_mce_power9, 0},
> {"performance-monitor-power9", feat_enable_pmu_power9, 0},
> + {"performance-monitor-power10", feat_enable_pmu_power10, 0},
> {"event-based-branch-v3", feat_enable, 0},
> {"random-number-generator", feat_enable, 0},
> {"system-call-vectored", feat_disable, 0},
next prev parent reply other threads:[~2020-07-07 6:24 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-01 9:20 [PATCH v2 00/10] powerpc/perf: Add support for power10 PMU Hardware Athira Rajeev
2020-07-01 9:20 ` [PATCH v2 01/10] powerpc/perf: Add support for ISA3.1 PMU SPRs Athira Rajeev
2020-07-08 11:02 ` Michael Ellerman
2020-07-09 1:53 ` Athira Rajeev
2020-07-13 12:50 ` Michael Ellerman
2020-07-15 6:07 ` Athira Rajeev
2020-07-01 9:20 ` [PATCH v2 02/10] KVM: PPC: Book3S HV: Save/restore new PMU registers Athira Rajeev
2020-07-01 11:11 ` Paul Mackerras
2020-07-02 6:22 ` Athira Rajeev
2020-07-07 6:13 ` Michael Neuling
2020-07-01 9:20 ` [PATCH v2 03/10] powerpc/xmon: Add PowerISA v3.1 PMU SPRs Athira Rajeev
2020-07-08 11:04 ` Michael Ellerman
2020-07-09 1:57 ` Athira Rajeev
2020-07-01 9:20 ` [PATCH v2 04/10] powerpc/perf: Add power10_feat to dt_cpu_ftrs Athira Rajeev
2020-07-07 6:22 ` Michael Neuling [this message]
2020-07-08 2:13 ` Athira Rajeev
2020-07-08 11:15 ` Michael Ellerman
2020-07-09 11:07 ` Athira Rajeev
2020-07-01 9:20 ` [PATCH v2 05/10] powerpc/perf: Update Power PMU cache_events to u64 type Athira Rajeev
2020-07-01 9:20 ` [PATCH v2 06/10] powerpc/perf: power10 Performance Monitoring support Athira Rajeev
2020-07-02 9:06 ` kernel test robot
2020-07-07 6:50 ` Michael Neuling
2020-07-08 10:56 ` Athira Rajeev
2020-07-01 9:20 ` [PATCH v2 07/10] powerpc/perf: support BHRB disable bit and new filtering modes Athira Rajeev
2020-07-07 7:17 ` Michael Neuling
2020-07-08 7:41 ` Athira Rajeev
2020-07-08 7:43 ` Gautham R Shenoy
2020-07-09 2:01 ` Athira Rajeev
2020-07-08 11:42 ` Michael Ellerman
2020-07-09 2:43 ` Athira Rajeev
2020-07-01 9:21 ` [PATCH v2 08/10] powerpc/perf: Add support for outputting extended regs in perf intr_regs Athira Rajeev
2020-07-01 9:21 ` [PATCH v2 09/10] tools/perf: Add perf tools support for extended register capability in powerpc Athira Rajeev
2020-07-08 12:04 ` Michael Ellerman
2020-07-09 3:10 ` Athira Rajeev
2020-07-13 12:47 ` Michael Ellerman
2020-07-13 2:36 ` Athira Rajeev
2020-07-01 9:21 ` [PATCH v2 10/10] powerpc/perf: Add extended regs support for power10 platform Athira Rajeev
2020-07-02 9:40 ` kernel test robot
2020-07-08 1:53 ` Athira Rajeev
2020-07-08 12:04 ` Michael Ellerman
2020-07-09 6:29 ` Athira Rajeev
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