Re: [RFC] block layer support for DMA IOMMU bypass mode II

From: Grant Grundler <grundler@parisc-linux.org>
To: Andi Kleen <ak@suse.de>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>,
	Grant Grundler <grundler@parisc-linux.org>,
	James Bottomley <James.Bottomley@SteelEye.com>,
	axboe@suse.de, davem@redhat.com, suparna@in.ibm.com,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	alex_williamson@hp.com, bjorn_helgaas@hp.com
Subject: Re: [RFC] block layer support for DMA IOMMU bypass mode II
Date: Thu, 3 Jul 2003 16:19:27 -0600	[thread overview]
Message-ID: <20030703221927.GC12433@dsl2.external.hp.com> (raw)
In-Reply-To: <20030703212415.GA30277@wotan.suse.de>

On Thu, Jul 03, 2003 at 11:24:15PM +0200, Andi Kleen wrote:
...
> Also it's likely cheaper just submit more segments than to have the IOMMU
> overhead

It depends on the device. If using something like 8237A to master DMA cycles,
then CPU cost of merging is relatively cheap. If sending the SG list is
just a sequence of MMIO space writes, then passing the raw list is cheaper.
ZX1 and PARISC IOMMUs clearly add some overhead both in terms of CPU
utilization (manage IOMMU) and DMA latency (IOMMU TLB misses sometimes).

...
> (at least for sane devices, if not it may be worth to artificially limit the
> dma mask of the device to force IOMMU on IA64 and x86-64) 

Agreed. We are only doing that until BIO code and IOMMU code can
agree on how merging works without requiring the IOMMU.

thanks,
grant