From: Sibi Sankar <sibis@codeaurora.org>
To: bjorn.andersson@linaro.org, robh+dt@kernel.org,
andy.gross@linaro.org, david.brown@linaro.org,
dianders@chromium.org
Cc: linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
tsoni@codeaurora.org, clew@codeaurora.org,
akdwived@codeaurora.org, mark.rutland@arm.com,
linux-remoteproc@vger.kernel.org, evgreen@chromium.org,
briannorris@chromium.org, Sibi Sankar <sibis@codeaurora.org>
Subject: [PATCH v2 5/7] arm64: dts: qcom: sdm845: Add Q6V5 MSS node
Date: Mon, 17 Dec 2018 15:37:22 +0530 [thread overview]
Message-ID: <20181217100724.4593-5-sibis@codeaurora.org> (raw)
In-Reply-To: <20181217100724.4593-1-sibis@codeaurora.org>
This patch adds Q6V5 MSS remoteproc node for SDM845 SoCs.
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
---
v2:
* Fixed style changes
* Added missing clocks in the dt-bindings
* Split mss remoteproc node into a number of patches
This patch depends on the mpss and mba memory regions and pdc reset node.
https://patchwork.kernel.org/patch/10662089/
https://patchwork.kernel.org/patch/10657325/
arch/arm64/boot/dts/qcom/sdm845.dtsi | 52 ++++++++++++++++++++++++++++
1 file changed, 52 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 5da9fa1feb8a..33ff8668828f 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -1366,6 +1366,58 @@
};
};
+ remoteproc@4080000 {
+ compatible = "qcom,sdm845-mss-pil";
+ reg = <0x04080000 0x408>, <0x04180000 0x48>;
+ reg-names = "qdsp6", "rmb";
+
+ interrupts-extended =
+ <&intc GIC_SPI 266 IRQ_TYPE_EDGE_RISING>,
+ <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
+ <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
+ <&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
+ <&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "wdog", "fatal", "ready",
+ "handover", "stop-ack";
+
+ clocks = <&gcc GCC_MSS_CFG_AHB_CLK>,
+ <&gcc GCC_MSS_Q6_MEMNOC_AXI_CLK>,
+ <&gcc GCC_BOOT_ROM_AHB_CLK>,
+ <&gcc GCC_MSS_GPLL0_DIV_CLK_SRC>,
+ <&gcc GCC_MSS_SNOC_AXI_CLK>,
+ <&gcc GCC_MSS_MFAB_AXIS_CLK>,
+ <&gcc GCC_PRNG_AHB_CLK>,
+ <&rpmhcc RPMH_CXO_CLK>;
+ clock-names = "iface", "bus", "mem", "gpll0_mss",
+ "snoc_axi", "mnoc_axi", "prng", "xo";
+
+ qcom,smem-states = <&modem_smp2p_out 0>;
+ qcom,smem-state-names = "stop";
+
+ resets = <&aoss_reset AOSS_CC_MSS_RESTART>,
+ <&pdc_reset PDC_MODEM_SYNC_RESET>;
+ reset-names = "mss_restart", "pdc_reset";
+
+ qcom,halt-regs = <&tcsr_mutex_regs
+ 0x23000 0x25000 0x24000>;
+
+ mba {
+ memory-region = <&mba_region>;
+ };
+
+ mpss {
+ memory-region = <&mpss_region>;
+ };
+
+ glink-edge {
+ interrupts = <GIC_SPI 449 IRQ_TYPE_EDGE_RISING>;
+ label = "modem";
+ qcom,remote-pid = <1>;
+ mboxes = <&apss_shared 12>;
+ mbox-names = "mpss_smem";
+ };
+ };
+
usb_1_hsphy: phy@88e2000 {
compatible = "qcom,sdm845-qusb2-phy";
reg = <0x88e2000 0x400>;
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
next prev parent reply other threads:[~2018-12-17 10:08 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-17 10:07 [PATCH v2 1/7] dt-bindings: soc: qcom: Add remote-pid binding for GLINK SMEM Sibi Sankar
2018-12-17 10:07 ` [PATCH v2 2/7] dt-bindings: remoteproc: qcom: Add clock bindings for Q6V5 Sibi Sankar
2018-12-17 23:59 ` Doug Anderson
2018-12-18 5:52 ` Sibi Sankar
2018-12-18 16:07 ` Doug Anderson
2018-12-18 17:27 ` Rob Herring
2018-12-19 7:04 ` Sibi Sankar
2018-12-17 10:07 ` [PATCH v2 3/7] dt-bindings: remoteproc: qcom: Fixup regulator dependencies Sibi Sankar
2018-12-18 0:00 ` Doug Anderson
2018-12-18 6:50 ` Sibi Sankar
2018-12-17 10:07 ` [PATCH v2 4/7] dt-bindings: remoteproc: qcom: Add power-domain bindings for Q6V5 Sibi Sankar
2018-12-18 0:01 ` Doug Anderson
2018-12-18 6:30 ` Sibi Sankar
2018-12-17 10:07 ` Sibi Sankar [this message]
2018-12-18 0:02 ` [PATCH v2 5/7] arm64: dts: qcom: sdm845: Add Q6V5 MSS node Doug Anderson
2018-12-18 6:35 ` Sibi Sankar
2018-12-18 16:00 ` kbuild test robot
2018-12-17 10:07 ` [PATCH v2 6/7] arm64: dts: qcom: sdm845: Add power-domain for " Sibi Sankar
2018-12-18 0:02 ` Doug Anderson
2018-12-18 6:38 ` Sibi Sankar
2018-12-17 10:07 ` [PATCH v2 7/7] arm64: dts: qcom: sdm845: Add shutdown-ack " Sibi Sankar
2018-12-18 0:02 ` Doug Anderson
2018-12-17 23:59 ` [PATCH v2 1/7] dt-bindings: soc: qcom: Add remote-pid binding for GLINK SMEM Doug Anderson
2018-12-18 5:16 ` Sibi Sankar
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20181217100724.4593-5-sibis@codeaurora.org \
--to=sibis@codeaurora.org \
--cc=akdwived@codeaurora.org \
--cc=andy.gross@linaro.org \
--cc=bjorn.andersson@linaro.org \
--cc=briannorris@chromium.org \
--cc=clew@codeaurora.org \
--cc=david.brown@linaro.org \
--cc=devicetree@vger.kernel.org \
--cc=dianders@chromium.org \
--cc=evgreen@chromium.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-remoteproc@vger.kernel.org \
--cc=linux-soc@vger.kernel.org \
--cc=mark.rutland@arm.com \
--cc=robh+dt@kernel.org \
--cc=tsoni@codeaurora.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).