From: Andre Przywara <andre.przywara@arm.com>
To: Rob Herring <robh@kernel.org>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Cc: Maxime Ripard <mripard@kernel.org>,
Robert Richter <rric@kernel.org>,
soc@kernel.org, Jon Loeliger <jdl@jdl.com>,
Mark Langsdorf <mlangsdo@redhat.com>,
Eric Auger <eric.auger@redhat.com>, Will Deacon <will@kernel.org>,
Catalin Marinas <catalin.marinas@arm.com>
Subject: [PATCH v2 02/13] arm: dts: calxeda: Provide UART clock
Date: Thu, 27 Feb 2020 18:21:59 +0000 [thread overview]
Message-ID: <20200227182210.89512-3-andre.przywara@arm.com> (raw)
In-Reply-To: <20200227182210.89512-1-andre.przywara@arm.com>
The PL011 UART binding requires two clocks to be named in a node.
Add the second clock, which is the bus gate, that just gets enabled.
Since this is a fixed clock anyway, it doesn't make any difference.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
arch/arm/boot/dts/ecx-common.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/ecx-common.dtsi b/arch/arm/boot/dts/ecx-common.dtsi
index 66ee1d34f72b..f819e3328a9e 100644
--- a/arch/arm/boot/dts/ecx-common.dtsi
+++ b/arch/arm/boot/dts/ecx-common.dtsi
@@ -114,8 +114,8 @@
compatible = "arm,pl011", "arm,primecell";
reg = <0xfff36000 0x1000>;
interrupts = <0 20 4>;
- clocks = <&pclk>;
- clock-names = "apb_pclk";
+ clocks = <&pclk>, <&pclk>;
+ clock-names = "uartclk", "apb_pclk";
};
smic@fff3a000 {
--
2.17.1
next prev parent reply other threads:[~2020-02-27 18:22 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-27 18:21 [PATCH v2 00/13] arm: calxeda: update DTS, bindings and MAINTAINERS Andre Przywara
2020-02-27 18:21 ` [PATCH v2 01/13] arm: dts: calxeda: Basic DT file fixes Andre Przywara
2020-02-27 21:42 ` Rob Herring
2020-02-27 18:21 ` Andre Przywara [this message]
2020-02-27 21:43 ` [PATCH v2 02/13] arm: dts: calxeda: Provide UART clock Rob Herring
2020-02-27 18:22 ` [PATCH v2 03/13] arm: dts: calxeda: Fix interrupt grouping Andre Przywara
2020-02-27 21:45 ` Rob Herring
2020-02-27 18:22 ` [PATCH v2 04/13] arm: dts: calxeda: Group port-phys and sgpio-gpio items Andre Przywara
2020-02-27 21:45 ` Rob Herring
2020-02-27 18:22 ` [PATCH v2 05/13] dt-bindings: clock: Convert Calxeda clock bindings to json-schema Andre Przywara
2020-02-27 18:22 ` [PATCH v2 06/13] dt-bindings: sata: Convert Calxeda SATA controller " Andre Przywara
2020-02-27 22:05 ` Rob Herring
2020-02-27 18:22 ` [PATCH v2 07/13] dt-bindings: net: Convert Calxeda Ethernet binding " Andre Przywara
2020-02-27 18:22 ` [PATCH v2 08/13] dt-bindings: phy: Convert Calxeda ComboPHY " Andre Przywara
2020-02-27 18:22 ` [PATCH v2 09/13] dt-bindings: arm: Convert Calxeda L2 cache controller " Andre Przywara
2020-02-27 18:22 ` [PATCH v2 10/13] dt-bindings: memory-controllers: Convert Calxeda DDR " Andre Przywara
2020-02-27 18:22 ` [PATCH v2 11/13] dt-bindings: ipmi: Convert IPMI-SMIC bindings " Andre Przywara
2020-02-27 22:21 ` Rob Herring
2020-02-28 0:21 ` André Przywara
2020-02-27 18:22 ` [PATCH v2 12/13] dt-bindings: arm: Add Calxeda system registers json-schema binding Andre Przywara
2020-02-27 22:22 ` Rob Herring
2020-02-27 18:22 ` [PATCH v2 13/13] MAINTAINERS: Update Calxeda Highbank maintainership Andre Przywara
2020-02-27 22:35 ` Rob Herring
2020-02-28 0:39 ` Olof Johansson
2020-02-28 11:53 ` Andre Przywara
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