From: Alexandre Belloni <alexandre.belloni@bootlin.com>
To: Claudiu Beznea <claudiu.beznea@microchip.com>
Cc: mturquette@baylibre.com, sboyd@kernel.org,
nicolas.ferre@microchip.com, ludovic.desroches@microchip.com,
bbrezillon@kernel.org, linux-kernel@vger.kernel.org,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 10/19] clk: at91: replace conditional operator with double logical not
Date: Fri, 17 Jul 2020 17:07:44 +0200 [thread overview]
Message-ID: <20200717150744.GU3428@piout.net> (raw)
In-Reply-To: <1594812267-6697-11-git-send-email-claudiu.beznea@microchip.com>
Hi,
On 15/07/2020 14:24:18+0300, Claudiu Beznea wrote:
> Replace conditional operator with double logical not.
I think you need to elaborate why you do it as the generated
instructions are exactly the same.
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
> ---
> drivers/clk/at91/clk-generated.c | 2 +-
> drivers/clk/at91/clk-main.c | 6 +++---
> drivers/clk/at91/clk-master.c | 2 +-
> drivers/clk/at91/clk-peripheral.c | 2 +-
> drivers/clk/at91/clk-system.c | 4 ++--
> 5 files changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/clk/at91/clk-generated.c b/drivers/clk/at91/clk-generated.c
> index f8e557e0e1b8..2448bdc63425 100644
> --- a/drivers/clk/at91/clk-generated.c
> +++ b/drivers/clk/at91/clk-generated.c
> @@ -83,7 +83,7 @@ static int clk_generated_is_enabled(struct clk_hw *hw)
> regmap_read(gck->regmap, gck->layout->offset, &status);
> spin_unlock_irqrestore(gck->lock, flags);
>
> - return status & AT91_PMC_PCR_GCKEN ? 1 : 0;
> + return !!(status & AT91_PMC_PCR_GCKEN);
> }
>
> static unsigned long
> diff --git a/drivers/clk/at91/clk-main.c b/drivers/clk/at91/clk-main.c
> index 37c22667e831..5c83e899084f 100644
> --- a/drivers/clk/at91/clk-main.c
> +++ b/drivers/clk/at91/clk-main.c
> @@ -175,7 +175,7 @@ static bool clk_main_rc_osc_ready(struct regmap *regmap)
>
> regmap_read(regmap, AT91_PMC_SR, &status);
>
> - return status & AT91_PMC_MOSCRCS;
> + return !!(status & AT91_PMC_MOSCRCS);
> }
>
> static int clk_main_rc_osc_prepare(struct clk_hw *hw)
> @@ -336,7 +336,7 @@ static int clk_rm9200_main_is_prepared(struct clk_hw *hw)
>
> regmap_read(clkmain->regmap, AT91_CKGR_MCFR, &status);
>
> - return status & AT91_PMC_MAINRDY ? 1 : 0;
> + return !!(status & AT91_PMC_MAINRDY);
> }
>
> static unsigned long clk_rm9200_main_recalc_rate(struct clk_hw *hw,
> @@ -398,7 +398,7 @@ static inline bool clk_sam9x5_main_ready(struct regmap *regmap)
>
> regmap_read(regmap, AT91_PMC_SR, &status);
>
> - return status & AT91_PMC_MOSCSELS ? 1 : 0;
> + return !!(status & AT91_PMC_MOSCSELS);
> }
>
> static int clk_sam9x5_main_prepare(struct clk_hw *hw)
> diff --git a/drivers/clk/at91/clk-master.c b/drivers/clk/at91/clk-master.c
> index e7e0ba652de1..88d545b1698c 100644
> --- a/drivers/clk/at91/clk-master.c
> +++ b/drivers/clk/at91/clk-master.c
> @@ -33,7 +33,7 @@ static inline bool clk_master_ready(struct regmap *regmap)
>
> regmap_read(regmap, AT91_PMC_SR, &status);
>
> - return status & AT91_PMC_MCKRDY ? 1 : 0;
> + return !!(status & AT91_PMC_MCKRDY);
> }
>
> static int clk_master_prepare(struct clk_hw *hw)
> diff --git a/drivers/clk/at91/clk-peripheral.c b/drivers/clk/at91/clk-peripheral.c
> index c2ab4860a2bf..4c9a4147dfe5 100644
> --- a/drivers/clk/at91/clk-peripheral.c
> +++ b/drivers/clk/at91/clk-peripheral.c
> @@ -208,7 +208,7 @@ static int clk_sam9x5_peripheral_is_enabled(struct clk_hw *hw)
> regmap_read(periph->regmap, periph->layout->offset, &status);
> spin_unlock_irqrestore(periph->lock, flags);
>
> - return status & AT91_PMC_PCR_EN ? 1 : 0;
> + return !!(status & AT91_PMC_PCR_EN);
> }
>
> static unsigned long
> diff --git a/drivers/clk/at91/clk-system.c b/drivers/clk/at91/clk-system.c
> index c4b3877aa445..f83ec0de86c3 100644
> --- a/drivers/clk/at91/clk-system.c
> +++ b/drivers/clk/at91/clk-system.c
> @@ -34,7 +34,7 @@ static inline bool clk_system_ready(struct regmap *regmap, int id)
>
> regmap_read(regmap, AT91_PMC_SR, &status);
>
> - return status & (1 << id) ? 1 : 0;
> + return !!(status & (1 << id));
> }
>
> static int clk_system_prepare(struct clk_hw *hw)
> @@ -74,7 +74,7 @@ static int clk_system_is_prepared(struct clk_hw *hw)
>
> regmap_read(sys->regmap, AT91_PMC_SR, &status);
>
> - return status & (1 << sys->id) ? 1 : 0;
> + return !!(status & (1 << sys->id));
> }
>
> static const struct clk_ops system_ops = {
> --
> 2.7.4
>
--
Alexandre Belloni, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
next prev parent reply other threads:[~2020-07-17 15:07 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-15 11:24 [PATCH 00/19] clk: at91: add sama7g5 clock support Claudiu Beznea
2020-07-15 11:24 ` [PATCH 01/19] clk: at91: clk-generated: continue if __clk_determine_rate() returns error Claudiu Beznea
2020-07-17 9:09 ` Alexandre Belloni
2020-07-15 11:24 ` [PATCH 02/19] clk: at91: clk-generated: check best_rate against ranges Claudiu Beznea
2020-07-17 9:10 ` Alexandre Belloni
2020-07-15 11:24 ` [PATCH 03/19] clk: at91: clk-sam9x60-pll: fix mul mask Claudiu Beznea
2020-07-17 9:11 ` Alexandre Belloni
2020-07-15 11:24 ` [PATCH 04/19] clk: at91: sam9x60-pll: use frac when computing pll frequency Claudiu Beznea
2020-07-15 11:24 ` [PATCH 05/19] clk: at91: sam9x60-pll: use logical or for range check Claudiu Beznea
2020-07-17 9:13 ` Alexandre Belloni
2020-07-15 11:24 ` [PATCH 06/19] clk: at91: sam9x60-pll: check fcore against ranges Claudiu Beznea
2020-07-17 9:23 ` Alexandre Belloni
2020-07-15 11:24 ` [PATCH 07/19] clk: at91: sam9x60-pll: use frac when setting frequency Claudiu Beznea
2020-07-17 9:12 ` Alexandre Belloni
2020-07-20 10:34 ` Claudiu.Beznea
2020-07-15 11:24 ` [PATCH 08/19] clk: at91: sam9x60: fix main rc oscillator frequency Claudiu Beznea
2020-07-17 9:17 ` Alexandre Belloni
2020-07-15 11:24 ` [PATCH 09/19] clk: at91: sckc: register slow_rc with accuracy option Claudiu Beznea
2020-07-15 15:39 ` Claudiu.Beznea
2020-07-15 11:24 ` [PATCH 10/19] clk: at91: replace conditional operator with double logical not Claudiu Beznea
2020-07-17 15:07 ` Alexandre Belloni [this message]
2020-07-20 10:36 ` Claudiu.Beznea
2020-07-15 11:24 ` [PATCH 11/19] clk: at91: clk-generated: pass the id of changeable parent at registration Claudiu Beznea
2020-07-16 16:57 ` Codrin.Ciubotariu
2020-07-15 11:24 ` [PATCH 12/19] clk: at91: clk-generated: add mux_table option Claudiu Beznea
2020-07-15 11:24 ` [PATCH 13/19] clk: at91: clk-master: add master clock support for SAMA7G5 Claudiu Beznea
2020-07-15 11:24 ` [PATCH 14/19] clk: at91: clk-peripheral: add support for changeable parent rate Claudiu Beznea
2020-07-15 11:24 ` [PATCH 15/19] clk: at91: clk-programmable: add mux_table option Claudiu Beznea
2020-07-15 11:24 ` [PATCH 16/19] clk: at91: add macro for pll ids mask Claudiu Beznea
2020-07-15 11:24 ` [PATCH 17/19] clk: at91: clk-sam9x60-pll: re-factor to support plls with multiple outputs Claudiu Beznea
2020-07-15 11:24 ` [PATCH 18/19] clk: at91: clk-utmi: add utmi support for sama7g5 Claudiu Beznea
2020-07-15 11:24 ` [PATCH 19/19] clk: at91: sama7g5: add clock " Claudiu Beznea
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