From: Jon Lin <jon.lin@rock-chips.com>
To: broonie@kernel.org
Cc: heiko@sntech.de, linux-spi@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org,
Jon Lin <jon.lin@rock-chips.com>
Subject: [PATCH v10 6/6] spi: rockchip: Support SPI_CS_HIGH
Date: Fri, 11 Feb 2022 11:43:44 +0800 [thread overview]
Message-ID: <20220211034344.4130-8-jon.lin@rock-chips.com> (raw)
In-Reply-To: <20220211034344.4130-1-jon.lin@rock-chips.com>
1.Add standard spi-cs-high support
2.Refer to spi-controller.yaml for details
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
---
Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
drivers/spi/spi-rockchip.c | 14 +++++++++++++-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/drivers/spi/spi-rockchip.c b/drivers/spi/spi-rockchip.c
index fbd750b1d28e..540861ca2ba3 100644
--- a/drivers/spi/spi-rockchip.c
+++ b/drivers/spi/spi-rockchip.c
@@ -107,6 +107,8 @@
#define CR0_OPM_MASTER 0x0
#define CR0_OPM_SLAVE 0x1
+#define CR0_SOI_OFFSET 23
+
#define CR0_MTM_OFFSET 0x21
/* Bit fields in SER, 2bit */
@@ -236,7 +238,7 @@ static void rockchip_spi_set_cs(struct spi_device *spi, bool enable)
{
struct spi_controller *ctlr = spi->controller;
struct rockchip_spi *rs = spi_controller_get_devdata(ctlr);
- bool cs_asserted = !enable;
+ bool cs_asserted = spi->mode & SPI_CS_HIGH ? enable : !enable;
/* Return immediately for no-op */
if (cs_asserted == rs->cs_asserted[spi->chip_select])
@@ -507,6 +509,8 @@ static int rockchip_spi_config(struct rockchip_spi *rs,
cr0 |= (spi->mode & 0x3U) << CR0_SCPH_OFFSET;
if (spi->mode & SPI_LSB_FIRST)
cr0 |= CR0_FBM_LSB << CR0_FBM_OFFSET;
+ if (spi->mode & SPI_CS_HIGH)
+ cr0 |= BIT(spi->chip_select) << CR0_SOI_OFFSET;
if (xfer->rx_buf && xfer->tx_buf)
cr0 |= CR0_XFM_TR << CR0_XFM_OFFSET;
@@ -795,6 +799,14 @@ static int rockchip_spi_probe(struct platform_device *pdev)
ctlr->can_dma = rockchip_spi_can_dma;
}
+ switch (readl_relaxed(rs->regs + ROCKCHIP_SPI_VERSION)) {
+ case ROCKCHIP_SPI_VER2_TYPE2:
+ ctlr->mode_bits |= SPI_CS_HIGH;
+ break;
+ default:
+ break;
+ }
+
ret = devm_spi_register_controller(&pdev->dev, ctlr);
if (ret < 0) {
dev_err(&pdev->dev, "Failed to register controller\n");
--
2.17.1
next prev parent reply other threads:[~2022-02-11 3:53 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-11 3:43 [PATCH 1/6] spi: rockchip: Stop spi slave dma receiver when cs inactive Jon Lin
2022-02-11 3:43 ` [PATCH 2/6] spi: rockchip: Preset cs-high and clk polarity in setup progress Jon Lin
2022-02-11 11:24 ` Mark Brown
[not found] ` <4222ce7d-a1e3-1728-fec2-976946b06ba9@rock-chips.com>
2022-02-14 12:49 ` Mark Brown
[not found] ` <e0f0ca0d-40df-cf86-9471-9272bcc171f9@rock-chips.com>
2022-02-15 12:36 ` Mark Brown
2022-02-16 1:23 ` Jon Lin
2022-02-11 3:43 ` [PATCH 3/6] spi: rockchip: Fix error in getting num-cs property Jon Lin
2022-02-11 11:25 ` Mark Brown
2022-02-11 3:43 ` [PATCH 4/6] spi: rockchip: Suspend and resume the bus during NOIRQ_SYSTEM_SLEEP_PM ops Jon Lin
2022-02-11 3:43 ` [PATCH v10 5/6] spi: rockchip: Support cs-gpio Jon Lin
2022-02-11 11:48 ` Mark Brown
2022-02-11 3:43 ` [PATCH 5/6] spi: rockchip: terminate dma transmission when slave abort Jon Lin
2022-02-11 11:49 ` Mark Brown
2022-02-11 3:43 ` [PATCH 6/6] spi: rockchip: clear interrupt status in error handler Jon Lin
2022-02-11 3:43 ` Jon Lin [this message]
-- strict thread matches above, loose matches on Subject: below --
2021-06-21 10:47 [PATCH v10 0/6] Support ROCKCHIP SPI new feature Jon Lin
2021-06-21 10:48 ` [PATCH v10 5/6] spi: rockchip: Support cs-gpio Jon Lin
2021-06-21 10:48 ` [PATCH v10 6/6] spi: rockchip: Support SPI_CS_HIGH Jon Lin
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