From: Ansuel Smith <ansuelsmth@gmail.com>
To: Andy Gross <agross@kernel.org>,
Bjorn Andersson <bjorn.andersson@linaro.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
Taniya Das <tdas@codeaurora.org>,
Ansuel Smith <ansuelsmth@gmail.com>,
linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH v5 07/15] clk: qcom: gcc-ipq806x: add additional freq nss cores
Date: Thu, 24 Feb 2022 17:48:23 +0100 [thread overview]
Message-ID: <20220224164831.21475-8-ansuelsmth@gmail.com> (raw)
In-Reply-To: <20220224164831.21475-1-ansuelsmth@gmail.com>
Ipq8065 SoC (an evolution of ipq8064 SoC) contains nss cores that can be
clocked to 800MHz. Add these missing freq to the gcc driver.
Set the freq_tbl for the ubi32_cores to the correct values based on the
machine compatible.
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
---
drivers/clk/qcom/gcc-ipq806x.c | 24 +++++++++++++++++++++---
1 file changed, 21 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/qcom/gcc-ipq806x.c b/drivers/clk/qcom/gcc-ipq806x.c
index 3a9001830f0c..0a3ba3480de8 100644
--- a/drivers/clk/qcom/gcc-ipq806x.c
+++ b/drivers/clk/qcom/gcc-ipq806x.c
@@ -233,7 +233,9 @@ static struct clk_regmap pll14_vote = {
static struct pll_freq_tbl pll18_freq_tbl[] = {
NSS_PLL_RATE(550000000, 44, 0, 1, 0x01495625),
+ NSS_PLL_RATE(600000000, 48, 0, 1, 0x01495625),
NSS_PLL_RATE(733000000, 58, 16, 25, 0x014b5625),
+ NSS_PLL_RATE(800000000, 64, 0, 1, 0x01495625),
};
static struct clk_pll pll18 = {
@@ -2705,7 +2707,7 @@ static struct clk_branch nss_tcm_clk = {
},
};
-static const struct freq_tbl clk_tbl_nss[] = {
+static const struct freq_tbl clk_tbl_nss_ipq8064[] = {
{ 110000000, P_PLL18, 1, 1, 5 },
{ 275000000, P_PLL18, 2, 0, 0 },
{ 550000000, P_PLL18, 1, 0, 0 },
@@ -2713,6 +2715,14 @@ static const struct freq_tbl clk_tbl_nss[] = {
{ }
};
+static const struct freq_tbl clk_tbl_nss_ipq8065[] = {
+ { 110000000, P_PLL18, 1, 1, 5 },
+ { 275000000, P_PLL18, 2, 0, 0 },
+ { 600000000, P_PLL18, 1, 0, 0 },
+ { 800000000, P_PLL18, 1, 0, 0 },
+ { }
+};
+
static struct clk_dyn_rcg ubi32_core1_src_clk = {
.ns_reg[0] = 0x3d2c,
.ns_reg[1] = 0x3d30,
@@ -2752,7 +2762,7 @@ static struct clk_dyn_rcg ubi32_core1_src_clk = {
.pre_div_width = 2,
},
.mux_sel_bit = 0,
- .freq_tbl = clk_tbl_nss,
+ /* nss freq table is selected based on the SoC compatible */
.clkr = {
.enable_reg = 0x3d20,
.enable_mask = BIT(1),
@@ -2805,7 +2815,7 @@ static struct clk_dyn_rcg ubi32_core2_src_clk = {
.pre_div_width = 2,
},
.mux_sel_bit = 0,
- .freq_tbl = clk_tbl_nss,
+ /* nss freq table is selected based on the SoC compatible */
.clkr = {
.enable_reg = 0x3d40,
.enable_mask = BIT(1),
@@ -3138,6 +3148,14 @@ static int gcc_ipq806x_probe(struct platform_device *pdev)
if (ret)
return ret;
+ if (of_machine_is_compatible("qcom,ipq8065")) {
+ ubi32_core1_src_clk.freq_tbl = clk_tbl_nss_ipq8065;
+ ubi32_core2_src_clk.freq_tbl = clk_tbl_nss_ipq8065;
+ } else {
+ ubi32_core1_src_clk.freq_tbl = clk_tbl_nss_ipq8064;
+ ubi32_core2_src_clk.freq_tbl = clk_tbl_nss_ipq8064;
+ }
+
ret = qcom_cc_probe(pdev, &gcc_ipq806x_desc);
if (ret)
return ret;
--
2.34.1
next prev parent reply other threads:[~2022-02-24 16:49 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-24 16:48 [PATCH v5 00/15] Multiple addition and improvement to ipq8064 gcc Ansuel Smith
2022-02-24 16:48 ` [PATCH v5 01/15] dt-bindings: clock: split qcom,gcc.yaml to common and specific schema Ansuel Smith
2022-02-24 18:43 ` Rob Herring
2022-02-24 22:04 ` Stephen Boyd
2022-03-23 13:55 ` Rob Herring
2022-03-23 19:47 ` Ansuel Smith
2022-03-24 13:16 ` Rob Herring
2022-02-24 16:48 ` [PATCH v5 02/15] dt-bindings: clock: simplify qcom,gcc-apq8064 Documentation Ansuel Smith
2022-02-24 18:46 ` Rob Herring
2022-02-24 18:50 ` Ansuel Smith
2022-02-24 16:48 ` [PATCH v5 03/15] dt-bindings: clock: document qcom,gcc-ipq8064 binding Ansuel Smith
2022-02-24 19:09 ` Rob Herring
2022-02-24 22:07 ` Stephen Boyd
2022-02-24 16:48 ` [PATCH v5 04/15] clk: qcom: gcc-ipq806x: fix wrong naming for gcc_pxo_pll8_pll0 Ansuel Smith
2022-02-24 22:07 ` Stephen Boyd
2022-02-24 16:48 ` [PATCH v5 05/15] clk: qcom: gcc-ipq806x: convert parent_names to parent_data Ansuel Smith
2022-02-24 22:09 ` Stephen Boyd
2022-02-24 16:48 ` [PATCH v5 06/15] clk: qcom: gcc-ipq806x: use ARRAY_SIZE for num_parents Ansuel Smith
2022-02-24 22:09 ` Stephen Boyd
2022-02-24 16:48 ` Ansuel Smith [this message]
2022-02-24 22:10 ` [PATCH v5 07/15] clk: qcom: gcc-ipq806x: add additional freq nss cores Stephen Boyd
2022-02-24 16:48 ` [PATCH v5 08/15] clk: qcom: gcc-ipq806x: add unusued flag for critical clock Ansuel Smith
2022-02-24 16:48 ` [PATCH v5 09/15] clk: qcom: clk-rcg: add clk_rcg_floor_ops ops Ansuel Smith
2022-02-24 22:11 ` Stephen Boyd
2022-02-24 16:48 ` [PATCH v5 10/15] clk: qcom: gcc-ipq806x: add additional freq for sdc table Ansuel Smith
2022-02-24 22:11 ` Stephen Boyd
2022-02-24 16:48 ` [PATCH v5 11/15] dt-bindings: clock: add ipq8064 ce5 clk define Ansuel Smith
2022-02-24 19:09 ` Rob Herring
2022-02-24 22:12 ` Stephen Boyd
2022-02-24 16:48 ` [PATCH v5 12/15] clk: qcom: gcc-ipq806x: add CryptoEngine clocks Ansuel Smith
2022-02-24 22:13 ` Stephen Boyd
2022-02-24 16:48 ` [PATCH v5 13/15] dt-bindings: reset: add ipq8064 ce5 resets Ansuel Smith
2022-02-24 19:10 ` Rob Herring
2022-02-24 22:13 ` Stephen Boyd
2022-02-24 16:48 ` [PATCH v5 14/15] clk: qcom: gcc-ipq806x: add CryptoEngine resets Ansuel Smith
2022-02-24 22:13 ` Stephen Boyd
2022-02-24 16:48 ` [PATCH v5 15/15] ARM: dts: qcom: add syscon and cxo/pxo clock to gcc node for ipq8064 Ansuel Smith
2022-02-24 22:14 ` Stephen Boyd
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