From: David Carrillo-Cisneros <davidcc@google.com>
To: "Luck, Tony" <tony.luck@intel.com>, Nilay Vaish <nilayvaish@gmail.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>,
Thomas Gleixner <tglx@linutronix.de>, Ingo Molnar <mingo@elte.hu>,
"H. Peter Anvin" <h.peter.anvin@intel.com>,
Tejun Heo <tj@kernel.org>, Borislav Petkov <bp@suse.de>,
Stephane Eranian <eranian@google.com>,
Peter Zijlstra <peterz@infradead.org>,
Marcelo Tosatti <mtosatti@redhat.com>,
Ravi V Shankar <ravi.v.shankar@intel.com>,
Vikas Shivappa <vikas.shivappa@linux.intel.com>,
Sai Prakhya <sai.praneeth.prakhya@intel.com>,
linux-kernel <linux-kernel@vger.kernel.org>, x86 <x86@kernel.org>
Subject: Re: [PATCH 05/32] x86/intel_rdt: Implement scheduling support for Intel RDT
Date: Mon, 25 Jul 2016 15:47:54 -0700 [thread overview]
Message-ID: <CALcN6mid=SBG9DL-ZYW5OZNUuo8D9fXGnxwqgkQdD-R_XuPKKw@mail.gmail.com> (raw)
In-Reply-To: <20160725180531.GA4116@intel.com>
On Mon, Jul 25, 2016 at 11:05 AM Luck, Tony <tony.luck@intel.com> wrote:
>
> On Mon, Jul 25, 2016 at 11:31:24AM -0500, Nilay Vaish wrote:
> > I was thinking more about this software caching of CLOSids. How
> > likely do you think these CLOSids would be found cached? I think the
> > software cache would be very infrequently accessed, so it seems you
> > are likely to miss these in all levels of cache hierarchy and more
> > likely to have to fetch these from the main memory, which itself might
> > cost ~250 cycles.
>
> We need to avoid reading the PQR_ASSOC MSR (which would cost far
> more than 250 cycles). Life is complicated here because this
> MSR contains the CLOSID in the upper half, and the RMID (owned
> by the perf code to measure cache occupancy and memory bandwidth)
> in the lower half.
On my Haswell machine, writing PQR_ASSOC_MSR takes about 380 cycles.
As Tony said, CQM/CMT writes to the same register, and it does it
twice (once to delete the old event, once to add the new one).
So, if a CQM/CMT or MBM is used with CAT, there will be 3 writes to
PQR_ASSOC_MSR per context switch and it's quite likely that the
software cache's cache line will be there for the 2 last writes.
next prev parent reply other threads:[~2016-07-25 22:48 UTC|newest]
Thread overview: 81+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-07-13 1:02 [PATCH 00/32] Enable Intel Resource Allocation in Resource Director Technology Fenghua Yu
2016-07-13 1:02 ` [PATCH 01/32] x86/intel_rdt: Cache Allocation documentation Fenghua Yu
2016-07-13 1:02 ` [PATCH 02/32] x86/intel_rdt: Add support for Cache Allocation detection Fenghua Yu
2016-07-26 19:00 ` Nilay Vaish
2016-07-13 1:02 ` [PATCH 03/32] x86/intel_rdt: Add Class of service management Fenghua Yu
2016-07-13 1:02 ` [PATCH 04/32] x86/intel_rdt: Add L3 cache capacity bitmask management Fenghua Yu
2016-07-22 7:12 ` Marcelo Tosatti
2016-07-22 21:43 ` Luck, Tony
2016-07-23 4:31 ` Marcelo Tosatti
2016-07-26 3:18 ` Luck, Tony
2016-07-26 17:10 ` Shivappa Vikas
2016-07-13 1:02 ` [PATCH 05/32] x86/intel_rdt: Implement scheduling support for Intel RDT Fenghua Yu
2016-07-25 16:25 ` Nilay Vaish
2016-07-25 16:31 ` Nilay Vaish
2016-07-25 18:05 ` Luck, Tony
2016-07-25 22:47 ` David Carrillo-Cisneros [this message]
2016-07-13 1:02 ` [PATCH 06/32] x86/intel_rdt: Hot cpu support for Cache Allocation Fenghua Yu
2016-07-13 9:19 ` Thomas Gleixner
2016-07-21 19:46 ` Shivappa Vikas
2016-07-14 0:40 ` David Carrillo-Cisneros
2016-07-14 22:58 ` Yu, Fenghua
2016-07-13 1:02 ` [PATCH 07/32] x86/intel_rdt: Intel haswell Cache Allocation enumeration Fenghua Yu
2016-07-13 1:02 ` [PATCH 08/32] Define CONFIG_INTEL_RDT Fenghua Yu
2016-07-13 10:25 ` Thomas Gleixner
2016-07-13 18:05 ` Yu, Fenghua
2016-07-13 21:09 ` Thomas Gleixner
2016-07-13 21:18 ` Yu, Fenghua
2016-07-13 1:02 ` [PATCH 09/32] x86/intel_rdt: Intel Code Data Prioritization detection Fenghua Yu
2016-07-13 1:02 ` [PATCH 10/32] x86/intel_rdt: Adds support to enable Code Data Prioritization Fenghua Yu
2016-07-26 19:23 ` Nilay Vaish
2016-07-26 20:32 ` Shivappa Vikas
2016-07-13 1:02 ` [PATCH 11/32] x86/intel_rdt: Class of service and capacity bitmask management for CDP Fenghua Yu
2016-07-13 1:02 ` [PATCH 12/32] x86/intel_rdt: Hot cpu update for code data prioritization Fenghua Yu
2016-07-13 1:02 ` [PATCH 13/32] Documentation, x86: Documentation for Intel resource allocation user interface Fenghua Yu
2016-07-13 12:47 ` Thomas Gleixner
2016-07-13 17:13 ` Luck, Tony
2016-07-14 6:53 ` Thomas Gleixner
2016-07-14 17:16 ` Luck, Tony
2016-07-19 12:32 ` Thomas Gleixner
2016-08-04 23:38 ` Yu, Fenghua
2016-07-27 16:20 ` Nilay Vaish
2016-07-27 16:57 ` Luck, Tony
2016-08-03 22:15 ` Marcelo Tosatti
2016-07-13 1:02 ` [PATCH 14/32] x86/cpufeatures: Get max closid and max cbm len and clean feature comments and code Fenghua Yu
2016-07-27 16:49 ` Nilay Vaish
2016-07-13 1:02 ` [PATCH 15/32] cacheinfo: Introduce cache id Fenghua Yu
2016-07-27 17:04 ` Nilay Vaish
2016-07-13 1:02 ` [PATCH 16/32] Documentation, ABI: Add a document entry for " Fenghua Yu
2016-07-13 1:02 ` [PATCH 17/32] x86, intel_cacheinfo: Enable cache id in x86 Fenghua Yu
2016-07-28 5:41 ` Nilay Vaish
2016-07-13 1:02 ` [PATCH 18/32] drivers/base/cacheinfo.c: Export some cacheinfo functions for others to use Fenghua Yu
2016-07-13 1:02 ` [PATCH 19/32] sched.h: Add rg_list and rdtgroup in task_struct Fenghua Yu
2016-07-13 12:56 ` Thomas Gleixner
2016-07-13 17:50 ` Yu, Fenghua
2016-07-28 5:53 ` Nilay Vaish
2016-07-13 1:02 ` [PATCH 20/32] magic number for rscctrl file system Fenghua Yu
2016-07-28 5:57 ` Nilay Vaish
2016-07-13 1:02 ` [PATCH 21/32] x86/intel_rdt.h: Header for inter_rdt.c Fenghua Yu
2016-07-28 14:07 ` Nilay Vaish
2016-07-13 1:02 ` [PATCH 22/32] x86/intel_rdt_rdtgroup.h: Header for user interface Fenghua Yu
2016-07-13 1:02 ` [PATCH 23/32] x86/intel_rdt.c: Extend RDT to per cache and per resources Fenghua Yu
2016-07-13 13:07 ` Thomas Gleixner
2016-07-13 17:40 ` Yu, Fenghua
2016-07-13 1:02 ` [PATCH 24/32] Task fork and exit for rdtgroup Fenghua Yu
2016-07-13 13:14 ` Thomas Gleixner
2016-07-13 17:32 ` Yu, Fenghua
2016-07-13 21:02 ` Thomas Gleixner
2016-07-13 21:22 ` Yu, Fenghua
2016-07-13 1:02 ` [PATCH 25/32] x86/intel_rdt_rdtgroup.c: User interface for RDT Fenghua Yu
2016-07-14 12:30 ` Thomas Gleixner
2016-07-13 1:02 ` [PATCH 26/32] x86/intel_rdt_rdtgroup.c: Create info directory Fenghua Yu
2016-07-13 1:03 ` [PATCH 27/32] x86/intel_rdt_rdtgroup.c: Implement rscctrl file system commands Fenghua Yu
2016-07-13 1:03 ` [PATCH 28/32] x86/intel_rdt_rdtgroup.c: Read and write cpus Fenghua Yu
2016-07-13 1:03 ` [PATCH 29/32] x86/intel_rdt_rdtgroup.c: Tasks iterator and write Fenghua Yu
2016-07-13 1:03 ` [PATCH 30/32] x86/intel_rdt_rdtgroup.c: Process schemas input from rscctrl interface Fenghua Yu
2016-07-14 0:41 ` David Carrillo-Cisneros
2016-07-14 6:11 ` Thomas Gleixner
2016-07-14 6:16 ` Yu, Fenghua
2016-07-14 6:32 ` Yu, Fenghua
2016-07-13 1:03 ` [PATCH 31/32] MAINTAINERS: Add maintainer for Intel RDT resource allocation Fenghua Yu
2016-07-13 1:03 ` [PATCH 32/32] x86/Makefile: Build intel_rdt_rdtgroup.c Fenghua Yu
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