linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Sean Christopherson <seanjc@google.com>
To: David Matlack <dmatlack@google.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>,
	linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
	vkuznets@redhat.com
Subject: Re: [PATCH 01/23] KVM: MMU: pass uses_nx directly to reset_shadow_zero_bits_mask
Date: Thu, 10 Feb 2022 00:30:08 +0000	[thread overview]
Message-ID: <YgRckLixnxa7hLqB@google.com> (raw)
In-Reply-To: <Yf1pk1EEBXj0O0/p@google.com>

On Fri, Feb 04, 2022, David Matlack wrote:
> On Fri, Feb 04, 2022 at 06:56:56AM -0500, Paolo Bonzini wrote:
> > reset_shadow_zero_bits_mask has a very unintuitive way of deciding
> > whether the shadow pages will use the NX bit.  The function is used in
> > two cases, shadow paging and shadow NPT; shadow paging has a use for
> > EFER.NX and needs to force it enabled, while shadow NPT only needs it
> > depending on L1's setting.
> > 
> > The actual root problem here is that is_efer_nx, despite being part
> > of the "base" role, only matches the format of the shadow pages in the
> > NPT case.  For now, just remove the ugly variable initialization and move
> > the call to reset_shadow_zero_bits_mask out of shadow_mmu_init_context.
> > The parameter can then be removed after the root problem in the role
> > is fixed.
> > 
> > Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
> 
> Reviewed-by: David Matlack <dmatlack@google.com>
> 
> (I agree this commit makes no functional change.)

There may not be a functional change, but it drops an optimization and contributes
to making future code/patches more fragile due to making it harder to understand
the relationship between shadow_mmu_init_context() and __kvm_mmu_new_pgd().

> > @@ -4829,8 +4820,6 @@ static void shadow_mmu_init_context(struct kvm_vcpu *vcpu, struct kvm_mmu *conte
> >  
> >  	reset_guest_paging_metadata(vcpu, context);
> >  	context->shadow_root_level = new_role.base.level;
> > -
> > -	reset_shadow_zero_bits_mask(vcpu, context);

This is guarded by:

	if (new_role.as_u64 == context->mmu_role.as_u64)
		return;

> >  }
> >  
> >  static void kvm_init_shadow_mmu(struct kvm_vcpu *vcpu,
> > @@ -4841,6 +4830,16 @@ static void kvm_init_shadow_mmu(struct kvm_vcpu *vcpu,
> >  		kvm_calc_shadow_mmu_root_page_role(vcpu, regs, false);
> >  
> >  	shadow_mmu_init_context(vcpu, context, regs, new_role);
> > +
> > +	/*
> > +	 * KVM uses NX when TDP is disabled to handle a variety of scenarios,
> > +	 * notably for huge SPTEs if iTLB multi-hit mitigation is enabled and
> > +	 * to generate correct permissions for CR0.WP=0/CR4.SMEP=1/EFER.NX=0.
> > +	 * The iTLB multi-hit workaround can be toggled at any time, so assume
> > +	 * NX can be used by any non-nested shadow MMU to avoid having to reset
> > +	 * MMU contexts.  Note, KVM forces EFER.NX=1 when TDP is disabled.
> > +	 */
> > +	reset_shadow_zero_bits_mask(vcpu, context, true);

Whereas this will compute the mask even if the role doesn't change.  I say that
matters later on because then this sequence:

	shadow_mmu_init_context(vcpu, context, &regs, new_role);
	reset_shadow_zero_bits_mask(vcpu, context, is_efer_nx(context));
	__kvm_mmu_new_pgd(vcpu, nested_cr3, new_role.base);

becomes even more difficult to untangle.

And looking at where this series ends up, I don't understand the purpose of this
change.  Patch 18 essentially reverts this patch, and I see nothing in between
that will break without the temporary change.   That patch becomes:

diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c
index 02e6d256805d..f9c96de1189d 100644
--- a/arch/x86/kvm/mmu/mmu.c
+++ b/arch/x86/kvm/mmu/mmu.c
@@ -4408,7 +4408,7 @@ static void reset_shadow_zero_bits_mask(struct kvm_vcpu *vcpu,
         * NX can be used by any non-nested shadow MMU to avoid having to reset
         * MMU contexts.  Note, KVM forces EFER.NX=1 when TDP is disabled.
         */
-       bool uses_nx = is_efer_nx(context) || !tdp_enabled;
+       bool uses_nx = context->mmu_role.efer_nx;

        /* @amd adds a check on bit of SPTEs, which KVM shouldn't use anyways. */
        bool is_amd = true;

though it needs to update the comment as well.

> >  }
> >  
> >  static union kvm_mmu_role
> > @@ -4872,6 +4871,7 @@ void kvm_init_shadow_npt_mmu(struct kvm_vcpu *vcpu, unsigned long cr0,
> >  	__kvm_mmu_new_pgd(vcpu, nested_cr3, new_role.base);
> >  
> >  	shadow_mmu_init_context(vcpu, context, &regs, new_role);
> > +	reset_shadow_zero_bits_mask(vcpu, context, is_efer_nx(context));
> 
> Out of curiousity, how does KVM mitigate iTLB multi-hit when shadowing
> NPT and the guest has not enabled EFER.NX?
> 
> >  }
> >  EXPORT_SYMBOL_GPL(kvm_init_shadow_npt_mmu);
> >  
> > -- 
> > 2.31.1
> > 
> > 

  parent reply	other threads:[~2022-02-10  1:32 UTC|newest]

Thread overview: 72+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-04 11:56 [PATCH 00/23] KVM: MMU: MMU role refactoring Paolo Bonzini
2022-02-04 11:56 ` [PATCH 01/23] KVM: MMU: pass uses_nx directly to reset_shadow_zero_bits_mask Paolo Bonzini
2022-02-04 17:59   ` David Matlack
2022-02-05 14:52     ` Paolo Bonzini
2022-02-07 16:09       ` Sean Christopherson
2022-02-07 21:50         ` David Matlack
2022-02-10  0:30     ` Sean Christopherson [this message]
2022-02-10 16:38       ` Paolo Bonzini
2022-02-04 11:56 ` [PATCH 02/23] KVM: MMU: nested EPT cannot be used in SMM Paolo Bonzini
2022-02-04 18:16   ` David Matlack
2022-02-09 22:43     ` Sean Christopherson
2022-02-04 11:56 ` [PATCH 03/23] KVM: MMU: remove valid from extended role Paolo Bonzini
2022-02-04 18:32   ` David Matlack
2022-02-05 14:50     ` Paolo Bonzini
2022-02-09 22:54   ` Sean Christopherson
2022-02-10  9:53     ` Paolo Bonzini
2022-02-04 11:56 ` [PATCH 04/23] KVM: MMU: constify uses of struct kvm_mmu_role_regs Paolo Bonzini
2022-02-04 18:41   ` David Matlack
2022-02-09 22:57   ` Sean Christopherson
2022-02-04 11:57 ` [PATCH 05/23] KVM: MMU: pull computation of kvm_mmu_role_regs to kvm_init_mmu Paolo Bonzini
2022-02-04 18:45   ` David Matlack
2022-02-04 11:57 ` [PATCH 06/23] KVM: MMU: load new PGD once nested two-dimensional paging is initialized Paolo Bonzini
2022-02-04 19:18   ` David Matlack
2022-02-07 13:50     ` Paolo Bonzini
2022-02-07 14:35       ` Paolo Bonzini
2022-02-09 12:34     ` Paolo Bonzini
2022-02-04 11:57 ` [PATCH 07/23] KVM: MMU: remove kvm_mmu_calc_root_page_role Paolo Bonzini
2022-02-04 19:32   ` David Matlack
2022-02-05 14:46     ` Paolo Bonzini
2022-02-10  0:47   ` Sean Christopherson
2022-02-10  9:52     ` Paolo Bonzini
2022-02-10 17:29       ` Sean Christopherson
2022-02-10 17:43         ` Paolo Bonzini
2022-02-04 11:57 ` [PATCH 08/23] KVM: MMU: rephrase unclear comment Paolo Bonzini
2022-02-04 19:38   ` David Matlack
2022-02-04 11:57 ` [PATCH 09/23] KVM: MMU: remove "bool base_only" arguments Paolo Bonzini
2022-02-04 19:41   ` David Matlack
2022-02-04 11:57 ` [PATCH 10/23] KVM: MMU: split cpu_role from mmu_role Paolo Bonzini
2022-02-04 21:57   ` David Matlack
2022-02-05 14:49     ` Paolo Bonzini
2022-02-07 21:38       ` David Matlack
2022-02-04 11:57 ` [PATCH 11/23] KVM: MMU: do not recompute root level from kvm_mmu_role_regs Paolo Bonzini
2022-02-07 22:10   ` David Matlack
2022-02-07 22:17     ` David Matlack
2022-02-04 11:57 ` [PATCH 12/23] KVM: MMU: remove ept_ad field Paolo Bonzini
2022-02-04 11:57 ` [PATCH 13/23] KVM: MMU: remove kvm_calc_shadow_root_page_role_common Paolo Bonzini
2022-02-07 22:25   ` David Matlack
2022-02-04 11:57 ` [PATCH 14/23] KVM: MMU: cleanup computation of MMU roles for two-dimensional paging Paolo Bonzini
2022-02-04 11:57 ` [PATCH 15/23] KVM: MMU: cleanup computation of MMU roles for shadow paging Paolo Bonzini
2022-02-04 11:57 ` [PATCH 16/23] KVM: MMU: remove extended bits from mmu_role Paolo Bonzini
2022-02-04 11:57 ` [PATCH 17/23] KVM: MMU: remove redundant bits from extended role Paolo Bonzini
2022-02-04 11:57 ` [PATCH 18/23] KVM: MMU: fetch shadow EFER.NX from MMU role Paolo Bonzini
2022-02-04 11:57 ` [PATCH 19/23] KVM: MMU: simplify and/or inline computation of shadow MMU roles Paolo Bonzini
2022-02-04 11:57 ` [PATCH 20/23] KVM: MMU: pull CPU role computation to kvm_init_mmu Paolo Bonzini
2022-02-07 22:42   ` David Matlack
2022-02-04 11:57 ` [PATCH 21/23] KVM: MMU: store shadow_root_level into mmu_role Paolo Bonzini
2022-02-07 23:00   ` David Matlack
2022-02-04 11:57 ` [PATCH 22/23] KVM: MMU: use cpu_role for root_level Paolo Bonzini
2022-02-07 23:01   ` David Matlack
2022-02-04 11:57 ` [PATCH 23/23] KVM: MMU: replace direct_map with mmu_role.direct Paolo Bonzini
2022-02-07 23:02   ` David Matlack
2022-02-07 23:08 ` [PATCH 00/23] KVM: MMU: MMU role refactoring David Matlack
2022-02-07 23:27   ` Sean Christopherson
2022-02-07 23:53     ` David Matlack
2022-02-10  1:11       ` Sean Christopherson
2022-02-10 11:58         ` Paolo Bonzini
2022-02-10 16:55           ` Sean Christopherson
2022-02-10 17:30             ` Paolo Bonzini
2022-02-10 19:28               ` Sean Christopherson
2022-02-09 22:31 ` Sean Christopherson
2022-02-10  9:54   ` Paolo Bonzini
2022-02-14 18:14   ` David Matlack

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=YgRckLixnxa7hLqB@google.com \
    --to=seanjc@google.com \
    --cc=dmatlack@google.com \
    --cc=kvm@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=pbonzini@redhat.com \
    --cc=vkuznets@redhat.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).