Re: [PATCH RFC 1/1] genirq: Make threaded handler use irq affinity for managed interrupt

From: Marc Zyngier <maz@kernel.org>
To: John Garry <john.garry@huawei.com>
Cc: Ming Lei <ming.lei@redhat.com>, <tglx@linutronix.de>,
	"chenxiang (M)" <chenxiang66@hisilicon.com>,
	<bigeasy@linutronix.de>, <linux-kernel@vger.kernel.org>,
	<hare@suse.com>, <hch@lst.de>, <axboe@kernel.dk>,
	<bvanassche@acm.org>, <peterz@infradead.org>, <mingo@redhat.com>
Subject: Re: [PATCH RFC 1/1] genirq: Make threaded handler use irq affinity  for managed interrupt
Date: Mon, 23 Dec 2019 10:47:07 +0000	[thread overview]
Message-ID: <e815b5451ea86e99d42045f7067f455a@www.loen.fr> (raw)
In-Reply-To: <d5774e2f-bb60-c27c-bf00-267b88400a12@huawei.com>

On 2019-12-23 10:26, John Garry wrote:
>>>> > I've also managed to trigger some of them now that I have access 
>>>> to
>>>> > a decent box with nvme storage.
>>>>
>>>> I only have 2x NVMe SSDs when this occurs - I should not be 
>>>> hitting this...
>>>>
>>>> Out of curiosity, have you tried
>>>> > with the SMMU disabled? I'm wondering whether we hit some 
>>>> livelock
>>>> > condition on unmapping buffers...
>>>>
>>>> No, but I can give it a try. Doing that should lower the CPU 
>>>> usage, though,
>>>> so maybe masks the issue - probably not.
>>>
>>> Lots of CPU lockup can is performance issue if there isn't obvious 
>>> bug.
>>>
>>> I am wondering if you may explain it a bit why enabling SMMU may 
>>> save
>>> CPU a it?
>> The other way around. mapping/unmapping IOVAs doesn't comes for 
>> free.
>> I'm trying to find out whether the NVMe map/unmap patterns trigger
>> something unexpected in the SMMU driver, but that's a very long 
>> shot.
>
> So I tested v5.5-rc3 with and without the SMMU enabled, and without
> the SMMU enabled I don't get the lockup.

OK, so my hunch wasn't completely off... At least we have something
to look into.

[...]

> Obviously this is not conclusive, especially with such limited
> testing - 5 minute runs each. The CPU load goes up when disabling the
> SMMU, but that could be attributed to extra throughput (1183K ->
> 1539K) loading.
>
> I do notice that since we complete the NVMe request in irq context,
> we also do the DMA unmap, i.e. talk to the SMMU, in the same context,
> which is less than ideal.

It depends on how much overhead invalidating the TLB adds to the
equation, but we should be able to do some tracing and find out.

> I need to finish for the Christmas break today, so can't check this
> much further ATM.

No worries. May I suggest creating a new thread in the new year, maybe
involving Robin and Will as well?

Thanks,

         M.
-- 
Jazz is not dead. It just smells funny...