From: Daniel Lustig <dlustig@nvidia.com>
To: Alan Stern <stern@rowland.harvard.edu>,
"Paul E. McKenney" <paulmck@linux.vnet.ibm.com>
Cc: LKMM Maintainers -- Akira Yokosawa <akiyks@gmail.com>,
Andrea Parri <andrea.parri@amarulasolutions.com>,
Boqun Feng <boqun.feng@gmail.com>,
David Howells <dhowells@redhat.com>,
Jade Alglave <j.alglave@ucl.ac.uk>,
Luc Maranget <luc.maranget@inria.fr>,
Nicholas Piggin <npiggin@gmail.com>,
Peter Zijlstra <peterz@infradead.org>,
Will Deacon <will.deacon@arm.com>,
Kernel development list <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v2] tools/memory-model: Add extra ordering for locks and remove it for ordinary release/acquire
Date: Tue, 10 Jul 2018 09:56:14 -0700 [thread overview]
Message-ID: <e8e62634-0b5b-faa9-ac43-557a59b16100@nvidia.com> (raw)
In-Reply-To: <Pine.LNX.4.44L0.1807091519180.2462-100000@iolanthe.rowland.org>
On 7/9/2018 1:01 PM, Alan Stern wrote:
> More than one kernel developer has expressed the opinion that the LKMM
> should enforce ordering of writes by locking. In other words, given
> the following code:
>
> WRITE_ONCE(x, 1);
> spin_unlock(&s):
> spin_lock(&s);
> WRITE_ONCE(y, 1);
>
> the stores to x and y should be propagated in order to all other CPUs,
> even though those other CPUs might not access the lock s. In terms of
> the memory model, this means expanding the cumul-fence relation.
>
> Locks should also provide read-read (and read-write) ordering in a
> similar way. Given:
>
> READ_ONCE(x);
> spin_unlock(&s);
> spin_lock(&s);
> READ_ONCE(y); // or WRITE_ONCE(y, 1);
>
> the load of x should be executed before the load of (or store to) y.
> The LKMM already provides this ordering, but it provides it even in
> the case where the two accesses are separated by a release/acquire
> pair of fences rather than unlock/lock. This would prevent
> architectures from using weakly ordered implementations of release and
> acquire, which seems like an unnecessary restriction. The patch
> therefore removes the ordering requirement from the LKMM for that
> case.
>
> All the architectures supported by the Linux kernel (including RISC-V)
> do provide this ordering for locks, albeit for varying reasons.
> Therefore this patch changes the model in accordance with the
> developers' wishes.
>
> Signed-off-by: Alan Stern <stern@rowland.harvard.edu>
>
> ---
>
> v.2: Restrict the ordering to lock operations, not general release
> and acquire fences.
>
> [as1871b]
>
>
> tools/memory-model/Documentation/explanation.txt | 186 +++++++---
> tools/memory-model/linux-kernel.cat | 8
> tools/memory-model/litmus-tests/ISA2+pooncelock+pooncelock+pombonce.litmus | 5
> 3 files changed, 149 insertions(+), 50 deletions(-)
>
> Index: usb-4.x/tools/memory-model/linux-kernel.cat
> ===================================================================
> --- usb-4.x.orig/tools/memory-model/linux-kernel.cat
> +++ usb-4.x/tools/memory-model/linux-kernel.cat
> @@ -38,7 +38,7 @@ let strong-fence = mb | gp
> (* Release Acquire *)
> let acq-po = [Acquire] ; po ; [M]
> let po-rel = [M] ; po ; [Release]
> -let rfi-rel-acq = [Release] ; rfi ; [Acquire]
> +let unlock-rf-lock-po = [UL] ; rf ; [LKR] ; po
It feels slightly weird that unlock-rf-lock-po is asymmetrical. And in
fact, I think the current RISC-V solution we've been discussing (namely,
putting a fence.tso instead of a fence rw,w in front of the release)
may not even technically respect that particular sequence. The
fence.tso solution really enforces "po; [UL]; rf; [LKR]", right?
Does something like "po; [UL]; rf; [LKR]; po" fit in with the rest
of the model? If so, maybe that solves the asymmetry and also
legalizes the approach of putting fence.tso in front?
Or, other suggestions?
Dan
> (**********************************)
> (* Fundamental coherence ordering *)
> @@ -60,13 +60,13 @@ let dep = addr | data
> let rwdep = (dep | ctrl) ; [W]
> let overwrite = co | fr
> let to-w = rwdep | (overwrite & int)
> -let to-r = addr | (dep ; rfi) | rfi-rel-acq
> +let to-r = addr | (dep ; rfi)
> let fence = strong-fence | wmb | po-rel | rmb | acq-po
> -let ppo = to-r | to-w | fence
> +let ppo = to-r | to-w | fence | (unlock-rf-lock-po & int)
>
> (* Propagation: Ordering from release operations and strong fences. *)
> let A-cumul(r) = rfe? ; r
> -let cumul-fence = A-cumul(strong-fence | po-rel) | wmb
> +let cumul-fence = A-cumul(strong-fence | po-rel) | wmb | unlock-rf-lock-po
> let prop = (overwrite & ext)? ; cumul-fence* ; rfe?
next prev parent reply other threads:[~2018-07-10 16:56 UTC|newest]
Thread overview: 84+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-09 20:01 [PATCH v2] tools/memory-model: Add extra ordering for locks and remove it for ordinary release/acquire Alan Stern
2018-07-09 21:45 ` Paul E. McKenney
2018-07-10 13:57 ` Alan Stern
2018-07-10 16:25 ` Paul E. McKenney
[not found] ` <Pine.LNX.4.44L0.1807101416390.1449-100000@iolanthe.rowland.org>
2018-07-10 19:58 ` [PATCH v3] " Paul E. McKenney
2018-07-10 20:24 ` Alan Stern
2018-07-10 20:31 ` Paul E. McKenney
2018-07-11 9:43 ` Will Deacon
2018-07-11 15:42 ` Paul E. McKenney
2018-07-11 16:17 ` Andrea Parri
2018-07-11 18:03 ` Paul E. McKenney
2018-07-11 16:34 ` Peter Zijlstra
2018-07-11 18:10 ` Paul E. McKenney
2018-07-10 9:38 ` [PATCH v2] " Andrea Parri
2018-07-10 14:48 ` Alan Stern
2018-07-10 15:24 ` Andrea Parri
2018-07-10 15:34 ` Alan Stern
2018-07-10 23:14 ` Andrea Parri
2018-07-11 9:43 ` Will Deacon
2018-07-11 12:34 ` Andrea Parri
2018-07-11 12:54 ` Andrea Parri
2018-07-11 15:57 ` Will Deacon
2018-07-11 16:28 ` Andrea Parri
2018-07-11 17:00 ` Peter Zijlstra
2018-07-11 17:50 ` Daniel Lustig
2018-07-12 8:34 ` Andrea Parri
2018-07-12 9:29 ` Peter Zijlstra
2018-07-12 7:40 ` Peter Zijlstra
2018-07-12 9:34 ` Peter Zijlstra
2018-07-12 9:45 ` Will Deacon
2018-07-13 2:17 ` Daniel Lustig
2018-07-12 11:52 ` Andrea Parri
2018-07-12 12:01 ` Andrea Parri
2018-07-12 12:11 ` Peter Zijlstra
2018-07-12 13:48 ` Peter Zijlstra
2018-07-12 16:19 ` Paul E. McKenney
2018-07-12 17:04 ` Alan Stern
2018-07-12 17:14 ` Will Deacon
2018-07-12 17:28 ` Paul E. McKenney
2018-07-12 18:05 ` Peter Zijlstra
2018-07-12 18:10 ` Linus Torvalds
2018-07-12 19:52 ` Andrea Parri
2018-07-12 20:24 ` Andrea Parri
2018-07-13 2:05 ` Daniel Lustig
2018-07-13 4:03 ` Paul E. McKenney
2018-07-13 9:07 ` Andrea Parri
2018-07-13 9:35 ` Will Deacon
2018-07-13 17:16 ` Linus Torvalds
2018-07-13 19:06 ` Andrea Parri
2018-07-14 1:51 ` Alan Stern
2018-07-14 2:58 ` Linus Torvalds
2018-07-16 2:31 ` Paul E. McKenney
2018-07-13 11:08 ` Peter Zijlstra
2018-07-13 13:15 ` Michael Ellerman
2018-07-13 16:42 ` Peter Zijlstra
2018-07-13 19:56 ` Andrea Parri
2018-07-16 14:40 ` Michael Ellerman
2018-07-16 19:01 ` Peter Zijlstra
2018-07-16 19:30 ` Linus Torvalds
2018-07-17 14:45 ` Michael Ellerman
2018-07-17 16:19 ` Linus Torvalds
2018-07-17 18:33 ` Paul E. McKenney
2018-07-17 18:42 ` Peter Zijlstra
2018-07-17 19:40 ` Paul E. McKenney
2018-07-17 19:47 ` Alan Stern
2018-07-17 18:44 ` Linus Torvalds
2018-07-17 18:49 ` Linus Torvalds
2018-07-17 19:42 ` Paul E. McKenney
2018-07-17 19:37 ` Alan Stern
2018-07-17 20:13 ` Linus Torvalds
2018-07-17 19:38 ` Paul E. McKenney
2018-07-17 19:40 ` Andrea Parri
2018-07-17 19:52 ` Paul E. McKenney
2018-07-18 12:31 ` Michael Ellerman
2018-07-18 13:16 ` Michael Ellerman
2018-07-12 17:52 ` Andrea Parri
2018-07-12 20:43 ` Alan Stern
2018-07-12 21:13 ` Andrea Parri
2018-07-12 21:23 ` Andrea Parri
2018-07-12 18:33 ` Peter Zijlstra
2018-07-12 17:45 ` Andrea Parri
2018-07-10 16:56 ` Daniel Lustig [this message]
[not found] ` <Pine.LNX.4.44L0.1807101315140.1449-100000@iolanthe.rowland.org>
2018-07-10 23:31 ` Andrea Parri
2018-07-11 14:19 ` Alan Stern
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