[PATCH] ARM64: dts: marvell: cn9310: Add missing phy-mode

[PATCH] ARM64: dts: marvell: cn9310: Add missing phy-mode

[Andrew Lunn]

The DSA framework has got more picky about always having a phy-mode
for the CPU port. The SoC Ethernet is being configured to
10gbase-r. Set the switch phy-mode based on this. Additionally, the
SoC Ethernet is using in-band signalling to determine the link speed,
so add same parameter to the switch.

Additionally, the cpu label has never actually been used in the
binding, so remove it.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
---
 arch/arm64/boot/dts/marvell/cn9130-crb.dtsi | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi b/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi
index 8e4ec243fb8f..32cfb3e2efc3 100644
--- a/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi
+++ b/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi
@@ -282,8 +282,9 @@ port@9 {
 
 			port@a {
 				reg = <10>;
-				label = "cpu";
 				ethernet = <&cp0_eth0>;
+				phy-mode = "10gbase-r";
+				managed = "in-band-status";
 			};
 
 		};
-- 
2.40.0

Re: [PATCH] ARM64: dts: marvell: cn9310: Add missing phy-mode

[Gregory CLEMENT]

Andrew Lunn <andrew@lunn.ch> writes:

> The DSA framework has got more picky about always having a phy-mode
> for the CPU port. The SoC Ethernet is being configured to
> 10gbase-r. Set the switch phy-mode based on this. Additionally, the
> SoC Ethernet is using in-band signalling to determine the link speed,
> so add same parameter to the switch.
>
> Additionally, the cpu label has never actually been used in the
> binding, so remove it.
>
> Signed-off-by: Andrew Lunn <andrew@lunn.ch>

Applied on mvebu/dt64

Thanks,

Gregory
> ---
>  arch/arm64/boot/dts/marvell/cn9130-crb.dtsi | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi b/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi
> index 8e4ec243fb8f..32cfb3e2efc3 100644
> --- a/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi
> +++ b/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi
> @@ -282,8 +282,9 @@ port@9 {
>  
>  			port@a {
>  				reg = <10>;
> -				label = "cpu";
>  				ethernet = <&cp0_eth0>;
> +				phy-mode = "10gbase-r";
> +				managed = "in-band-status";
>  			};
>  
>  		};
> -- 
> 2.40.0
>

-- 
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com