From: "Matheus K. Ferst" <matheus.ferst@eldorado.org.br>
To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org
Cc: richard.henderson@linaro.org, f4bug@amsat.org,
luis.pires@eldorado.org.br, lagarcia@br.ibm.com,
bruno.larsen@eldorado.org.br, david@gibson.dropbear.id.au
Subject: Re: [PATCH v4 10/31] target/ppc: Introduce gen_icount_io_start
Date: Wed, 12 May 2021 16:21:13 -0300 [thread overview]
Message-ID: <18ff1d20-264e-125c-42ed-596f455ec5ad@eldorado.org.br> (raw)
In-Reply-To: <20210512185441.3619828-11-matheus.ferst@eldorado.org.br>
On 12/05/2021 15:54, matheus.ferst@eldorado.org.br wrote:
> From: Matheus Ferst <matheus.ferst@eldorado.org.br>
>
> Create a function to handle the details for interacting with icount.
>
> Force the exit from the tb via DISAS_TOO_MANY, which allows chaining
> to the next tb, where the code emitted for gen_tb_start() will
> determine if we must exit. We can thus remove any matching
> conditional call to gen_stop_exception.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
> ---
> target/ppc/translate.c | 174 +++++++++--------------------------------
> 1 file changed, 39 insertions(+), 135 deletions(-)
>
> diff --git a/target/ppc/translate.c b/target/ppc/translate.c
> index 1c02e21a56..f6410dc76c 100644
> --- a/target/ppc/translate.c
> +++ b/target/ppc/translate.c
> @@ -301,6 +301,20 @@ static void gen_exception_nip(DisasContext *ctx, uint32_t excp,
> ctx->base.is_jmp = DISAS_NORETURN;
> }
>
> +static void gen_icount_io_start(DisasContext *ctx)
> +{
> + if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
> + gen_io_start();
> + /*
> + * An I/O instruction must be last in the TB.
> + * Chain to the next TB, and let the code from gen_tb_start
> + * decide if we need to return to the main loop.
> + * Doing this first also allows this value to be overridden.
> + */
> + ctx->base.is_jmp = DISAS_TOO_MANY;
> + }
> +}
> +
> /*
> * Tells the caller what is the appropriate exception to generate and prepares
> * SPR registers for this exception.
> @@ -538,24 +552,14 @@ static void spr_write_ureg(DisasContext *ctx, int sprn, int gprn)
> #if !defined(CONFIG_USER_ONLY)
> static void spr_read_decr(DisasContext *ctx, int gprn, int sprn)
> {
> - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
> - gen_io_start();
> - }
> + gen_icount_io_start(ctx);
> gen_helper_load_decr(cpu_gpr[gprn], cpu_env);
> - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
> - gen_stop_exception(ctx);
> - }
> }
>
> static void spr_write_decr(DisasContext *ctx, int sprn, int gprn)
> {
> - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
> - gen_io_start();
> - }
> + gen_icount_io_start(ctx);
> gen_helper_store_decr(cpu_env, cpu_gpr[gprn]);
> - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
> - gen_stop_exception(ctx);
> - }
> }
> #endif
>
> @@ -563,24 +567,14 @@ static void spr_write_decr(DisasContext *ctx, int sprn, int gprn)
> /* Time base */
> static void spr_read_tbl(DisasContext *ctx, int gprn, int sprn)
> {
> - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
> - gen_io_start();
> - }
> + gen_icount_io_start(ctx);
> gen_helper_load_tbl(cpu_gpr[gprn], cpu_env);
> - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
> - gen_stop_exception(ctx);
> - }
> }
>
> static void spr_read_tbu(DisasContext *ctx, int gprn, int sprn)
> {
> - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
> - gen_io_start();
> - }
> + gen_icount_io_start(ctx);
> gen_helper_load_tbu(cpu_gpr[gprn], cpu_env);
> - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
> - gen_stop_exception(ctx);
> - }
> }
>
> ATTRIBUTE_UNUSED
> @@ -598,24 +592,14 @@ static void spr_read_atbu(DisasContext *ctx, int gprn, int sprn)
> #if !defined(CONFIG_USER_ONLY)
> static void spr_write_tbl(DisasContext *ctx, int sprn, int gprn)
> {
> - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
> - gen_io_start();
> - }
> + gen_icount_io_start(ctx);
> gen_helper_store_tbl(cpu_env, cpu_gpr[gprn]);
> - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
> - gen_stop_exception(ctx);
> - }
> }
>
> static void spr_write_tbu(DisasContext *ctx, int sprn, int gprn)
> {
> - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
> - gen_io_start();
> - }
> + gen_icount_io_start(ctx);
> gen_helper_store_tbu(cpu_env, cpu_gpr[gprn]);
> - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
> - gen_stop_exception(ctx);
> - }
> }
>
> ATTRIBUTE_UNUSED
> @@ -634,80 +618,45 @@ static void spr_write_atbu(DisasContext *ctx, int sprn, int gprn)
> ATTRIBUTE_UNUSED
> static void spr_read_purr(DisasContext *ctx, int gprn, int sprn)
> {
> - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
> - gen_io_start();
> - }
> + gen_icount_io_start(ctx);
> gen_helper_load_purr(cpu_gpr[gprn], cpu_env);
> - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
> - gen_stop_exception(ctx);
> - }
> }
>
> static void spr_write_purr(DisasContext *ctx, int sprn, int gprn)
> {
> - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
> - gen_io_start();
> - }
> + gen_icount_io_start(ctx);
> gen_helper_store_purr(cpu_env, cpu_gpr[gprn]);
> - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
> - gen_stop_exception(ctx);
> - }
> }
>
> /* HDECR */
> static void spr_read_hdecr(DisasContext *ctx, int gprn, int sprn)
> {
> - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
> - gen_io_start();
> - }
> + gen_icount_io_start(ctx);
> gen_helper_load_hdecr(cpu_gpr[gprn], cpu_env);
> - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
> - gen_stop_exception(ctx);
> - }
> }
>
> static void spr_write_hdecr(DisasContext *ctx, int sprn, int gprn)
> {
> - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
> - gen_io_start();
> - }
> + gen_icount_io_start(ctx);
> gen_helper_store_hdecr(cpu_env, cpu_gpr[gprn]);
> - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
> - gen_stop_exception(ctx);
> - }
> }
>
> static void spr_read_vtb(DisasContext *ctx, int gprn, int sprn)
> {
> - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
> - gen_io_start();
> - }
> + gen_icount_io_start(ctx);
> gen_helper_load_vtb(cpu_gpr[gprn], cpu_env);
> - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
> - gen_stop_exception(ctx);
> - }
> }
>
> static void spr_write_vtb(DisasContext *ctx, int sprn, int gprn)
> {
> - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
> - gen_io_start();
> - }
> + gen_icount_io_start(ctx);
> gen_helper_store_vtb(cpu_env, cpu_gpr[gprn]);
> - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
> - gen_stop_exception(ctx);
> - }
> }
>
> static void spr_write_tbu40(DisasContext *ctx, int sprn, int gprn)
> {
> - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
> - gen_io_start();
> - }
> + gen_icount_io_start(ctx);
> gen_helper_store_tbu40(cpu_env, cpu_gpr[gprn]);
> - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
> - gen_stop_exception(ctx);
> - }
> }
>
> #endif
> @@ -915,71 +864,41 @@ static void spr_write_601_ubatl(DisasContext *ctx, int sprn, int gprn)
> #if !defined(CONFIG_USER_ONLY)
> static void spr_read_40x_pit(DisasContext *ctx, int gprn, int sprn)
> {
> - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
> - gen_io_start();
> - }
> + gen_icount_io_start(ctx);
> gen_helper_load_40x_pit(cpu_gpr[gprn], cpu_env);
> - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
> - gen_stop_exception(ctx);
> - }
> }
>
> static void spr_write_40x_pit(DisasContext *ctx, int sprn, int gprn)
> {
> - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
> - gen_io_start();
> - }
> + gen_icount_io_start(ctx);
> gen_helper_store_40x_pit(cpu_env, cpu_gpr[gprn]);
> - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
> - gen_stop_exception(ctx);
> - }
> }
>
> static void spr_write_40x_dbcr0(DisasContext *ctx, int sprn, int gprn)
> {
> - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
> - gen_io_start();
> - }
> + gen_icount_io_start(ctx);
> gen_store_spr(sprn, cpu_gpr[gprn]);
> gen_helper_store_40x_dbcr0(cpu_env, cpu_gpr[gprn]);
> /* We must stop translation as we may have rebooted */
> gen_stop_exception(ctx);
> - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
> - gen_stop_exception(ctx);
> - }
> }
>
> static void spr_write_40x_sler(DisasContext *ctx, int sprn, int gprn)
> {
> - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
> - gen_io_start();
> - }
> + gen_icount_io_start(ctx);
> gen_helper_store_40x_sler(cpu_env, cpu_gpr[gprn]);
> - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
> - gen_stop_exception(ctx);
> - }
> }
>
> static void spr_write_booke_tcr(DisasContext *ctx, int sprn, int gprn)
> {
> - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
> - gen_io_start();
> - }
> + gen_icount_io_start(ctx);
> gen_helper_store_booke_tcr(cpu_env, cpu_gpr[gprn]);
> - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
> - gen_stop_exception(ctx);
> - }
> }
>
> static void spr_write_booke_tsr(DisasContext *ctx, int sprn, int gprn)
> {
> - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
> - gen_io_start();
> - }
> + gen_icount_io_start(ctx);
> gen_helper_store_booke_tsr(cpu_env, cpu_gpr[gprn]);
> - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
> - gen_stop_exception(ctx);
> - }
> }
> #endif
>
> @@ -2863,18 +2782,13 @@ static void gen_darn(DisasContext *ctx)
> if (l > 2) {
> tcg_gen_movi_i64(cpu_gpr[rD(ctx->opcode)], -1);
> } else {
> - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
> - gen_io_start();
> - }
> + gen_icount_io_start(ctx);
> if (l == 0) {
> gen_helper_darn32(cpu_gpr[rD(ctx->opcode)]);
> } else {
> /* Return 64-bit random for both CRN and RRN */
> gen_helper_darn64(cpu_gpr[rD(ctx->opcode)]);
> }
> - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
> - gen_stop_exception(ctx);
> - }
> }
> }
> #endif
> @@ -5016,9 +4930,7 @@ static void gen_rfi(DisasContext *ctx)
> }
> /* Restore CPU state */
> CHK_SV;
> - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
> - gen_io_start();
> - }
> + gen_icount_io_start(ctx);
> gen_update_cfar(ctx, ctx->cia);
> gen_helper_rfi(cpu_env);
> ctx->base.is_jmp = DISAS_EXIT;
> @@ -5033,9 +4945,7 @@ static void gen_rfid(DisasContext *ctx)
> #else
> /* Restore CPU state */
> CHK_SV;
> - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
> - gen_io_start();
> - }
> + gen_icount_io_start(ctx);
> gen_update_cfar(ctx, ctx->cia);
> gen_helper_rfid(cpu_env);
> ctx->base.is_jmp = DISAS_EXIT;
> @@ -5050,9 +4960,7 @@ static void gen_rfscv(DisasContext *ctx)
> #else
> /* Restore CPU state */
> CHK_SV;
> - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
> - gen_io_start();
> - }
> + gen_icount_io_start(ctx);
> gen_update_cfar(ctx, ctx->cia);
> gen_helper_rfscv(cpu_env);
> ctx->base.is_jmp = DISAS_EXIT;
> @@ -5382,9 +5290,7 @@ static void gen_mtmsrd(DisasContext *ctx)
> CHK_SV;
>
> #if !defined(CONFIG_USER_ONLY)
> - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
> - gen_io_start();
> - }
> + gen_icount_io_start(ctx);
> if (ctx->opcode & 0x00010000) {
> /* L=1 form only updates EE and RI */
> TCGv t0 = tcg_temp_new();
> @@ -5419,9 +5325,7 @@ static void gen_mtmsr(DisasContext *ctx)
> CHK_SV;
>
> #if !defined(CONFIG_USER_ONLY)
> - if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
> - gen_io_start();
> - }
> + gen_icount_io_start(ctx);
> if (ctx->opcode & 0x00010000) {
> /* L=1 form only updates EE and RI */
> TCGv t0 = tcg_temp_new();
>
Sorry, I somehow changed the author by mistake, which must be
From: Richard Henderson <richard.henderson@linaro.org>
Matheus K. Ferst
Instituto de Pesquisas ELDORADO <http://www.eldorado.org.br/>
Analista de Software Júnior
Aviso Legal - Disclaimer <https://www.eldorado.org.br/disclaimer.html>
next prev parent reply other threads:[~2021-05-12 19:56 UTC|newest]
Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-12 18:54 [PATCH v4 00/31] Base for adding PowerPC 64-bit instructions matheus.ferst
2021-05-12 18:54 ` [PATCH v4 01/31] target/ppc: Add cia field to DisasContext matheus.ferst
2021-05-13 4:03 ` David Gibson
2021-05-12 18:54 ` [PATCH v4 02/31] target/ppc: Split out decode_legacy matheus.ferst
2021-05-13 4:03 ` David Gibson
2021-05-12 18:54 ` [PATCH v4 03/31] target/ppc: Move DISAS_NORETURN setting into gen_exception* matheus.ferst
2021-05-13 4:06 ` David Gibson
2021-05-12 18:54 ` [PATCH v4 04/31] target/ppc: Remove special case for POWERPC_SYSCALL matheus.ferst
2021-05-13 4:06 ` David Gibson
2021-05-12 18:54 ` [PATCH v4 05/31] target/ppc: Remove special case for POWERPC_EXCP_TRAP matheus.ferst
2021-05-13 4:07 ` David Gibson
2021-05-12 18:54 ` [PATCH v4 06/31] target/ppc: Simplify gen_debug_exception matheus.ferst
2021-05-13 4:08 ` David Gibson
2021-05-12 18:54 ` [PATCH v4 07/31] target/ppc: Introduce DISAS_{EXIT,CHAIN}{,_UPDATE} matheus.ferst
2021-05-13 4:10 ` David Gibson
2021-05-12 18:54 ` [PATCH v4 08/31] target/ppc: Replace POWERPC_EXCP_SYNC with DISAS_EXIT matheus.ferst
2021-05-12 19:31 ` Bruno Piazera Larsen
2021-05-13 4:11 ` David Gibson
2021-05-12 18:54 ` [PATCH v4 09/31] target/ppc: Remove unnecessary gen_io_end calls matheus.ferst
2021-05-13 4:12 ` David Gibson
2021-05-12 18:54 ` [PATCH v4 10/31] target/ppc: Introduce gen_icount_io_start matheus.ferst
2021-05-12 19:21 ` Matheus K. Ferst [this message]
2021-05-13 4:14 ` David Gibson
2021-05-12 18:54 ` [PATCH v4 11/31] target/ppc: Replace POWERPC_EXCP_STOP with DISAS_EXIT_UPDATE matheus.ferst
2021-05-12 18:54 ` [PATCH v4 12/31] target/ppc: Replace POWERPC_EXCP_BRANCH with DISAS_NORETURN matheus.ferst
2021-05-12 18:54 ` [PATCH v4 13/31] target/ppc: Remove DisasContext.exception matheus.ferst
2021-05-12 18:54 ` [PATCH v4 14/31] target/ppc: Move single-step check to ppc_tr_tb_stop matheus.ferst
2021-05-12 18:54 ` [PATCH v4 15/31] target/ppc: Tidy exception vs exit_tb matheus.ferst
2021-05-12 18:54 ` [PATCH v4 16/31] target/ppc: Mark helper_raise_exception* as noreturn matheus.ferst
2021-05-12 18:54 ` [PATCH v4 17/31] target/ppc: Use translator_loop_temp_check matheus.ferst
2021-05-12 19:45 ` Bruno Piazera Larsen
2021-05-12 18:54 ` [PATCH v4 18/31] target/ppc: Introduce macros to check isa extensions matheus.ferst
2021-05-12 18:54 ` [PATCH v4 19/31] target/ppc: Move page crossing check to ppc_tr_translate_insn matheus.ferst
2021-05-12 18:54 ` [PATCH v4 20/31] target/ppc: Add infrastructure for prefixed insns matheus.ferst
2021-05-12 18:54 ` [PATCH v4 21/31] target/ppc: Move ADDI, ADDIS to decodetree, implement PADDI matheus.ferst
2021-05-12 18:54 ` [PATCH v4 22/31] target/ppc: Implement PNOP matheus.ferst
2021-05-13 10:37 ` Richard Henderson
2021-05-12 18:54 ` [PATCH v4 23/31] TCG: add tcg_constant_tl matheus.ferst
2021-05-13 10:42 ` Richard Henderson
2021-05-12 18:54 ` [PATCH v4 24/31] target/ppc: Move D/DS/X-form integer loads to decodetree matheus.ferst
2021-05-12 18:54 ` [PATCH v4 25/31] target/ppc: Implement prefixed integer load instructions matheus.ferst
2021-05-13 10:50 ` Richard Henderson
2021-05-12 18:54 ` [PATCH v4 26/31] target/ppc: Move D/DS/X-form integer stores to decodetree matheus.ferst
2021-05-12 18:54 ` [PATCH v4 27/31] target/ppc: Implement prefixed integer store instructions matheus.ferst
2021-05-12 18:54 ` [PATCH v4 28/31] target/ppc: Implement setbc/setbcr/stnbc/setnbcr instructions matheus.ferst
2021-05-13 11:01 ` Richard Henderson
2021-05-13 11:43 ` Matheus K. Ferst
2021-05-12 18:54 ` [PATCH v4 29/31] target/ppc: Implement cfuged instruction matheus.ferst
2021-05-13 11:31 ` Richard Henderson
2021-05-13 12:24 ` Matheus K. Ferst
2021-05-14 0:01 ` Richard Henderson
2021-05-12 18:54 ` [PATCH v4 30/31] target/ppc: Implement vcfuged instruction matheus.ferst
2021-05-13 11:36 ` Richard Henderson
2021-05-12 18:54 ` [PATCH v4 31/31] target/ppc: Move addpcis to decodetree matheus.ferst
2021-05-13 11:40 ` Richard Henderson
2021-05-13 4:22 ` [PATCH v4 00/31] Base for adding PowerPC 64-bit instructions David Gibson
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