From: matheus.ferst@eldorado.org.br
To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org
Cc: richard.henderson@linaro.org, f4bug@amsat.org,
luis.pires@eldorado.org.br, lagarcia@br.ibm.com,
bruno.larsen@eldorado.org.br, matheus.ferst@eldorado.org.br,
david@gibson.dropbear.id.au
Subject: [PATCH v4 12/31] target/ppc: Replace POWERPC_EXCP_BRANCH with DISAS_NORETURN
Date: Wed, 12 May 2021 15:54:22 -0300 [thread overview]
Message-ID: <20210512185441.3619828-13-matheus.ferst@eldorado.org.br> (raw)
In-Reply-To: <20210512185441.3619828-1-matheus.ferst@eldorado.org.br>
From: Richard Henderson <richard.henderson@linaro.org>
The translation of branch instructions always results in exit from
the TB. Remove the synthetic "exception" after no more uses.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
---
linux-user/ppc/cpu_loop.c | 3 ---
target/ppc/cpu.h | 2 --
target/ppc/translate.c | 8 ++------
3 files changed, 2 insertions(+), 11 deletions(-)
diff --git a/linux-user/ppc/cpu_loop.c b/linux-user/ppc/cpu_loop.c
index fe526693d2..fa91ea0eed 100644
--- a/linux-user/ppc/cpu_loop.c
+++ b/linux-user/ppc/cpu_loop.c
@@ -423,9 +423,6 @@ void cpu_loop(CPUPPCState *env)
cpu_abort(cs, "Maintenance exception while in user mode. "
"Aborting\n");
break;
- case POWERPC_EXCP_BRANCH: /* branch instruction: */
- /* We just stopped because of a branch. Go on */
- break;
case POWERPC_EXCP_SYSCALL_USER:
/* system call in user-mode emulation */
/* WARNING:
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index 22456f9a72..1c3486e9d0 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -131,8 +131,6 @@ enum {
POWERPC_EXCP_SYSCALL_VECTORED = 102, /* scv exception */
/* EOL */
POWERPC_EXCP_NB = 103,
- /* QEMU exceptions: used internally during code translation */
- POWERPC_EXCP_BRANCH = 0x201, /* branch instruction */
/* QEMU exceptions: special cases we want to stop translation */
POWERPC_EXCP_SYSCALL_USER = 0x203, /* System call in user mode only */
};
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index db6f11d632..43320d2b8b 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -4695,7 +4695,6 @@ static void gen_b(DisasContext *ctx)
{
target_ulong li, target;
- ctx->exception = POWERPC_EXCP_BRANCH;
/* sign extend LI */
li = LI(ctx->opcode);
li = (li ^ 0x02000000) - 0x02000000;
@@ -4709,6 +4708,7 @@ static void gen_b(DisasContext *ctx)
}
gen_update_cfar(ctx, ctx->cia);
gen_goto_tb(ctx, 0, target);
+ ctx->base.is_jmp = DISAS_NORETURN;
}
#define BCOND_IM 0
@@ -4721,7 +4721,6 @@ static void gen_bcond(DisasContext *ctx, int type)
uint32_t bo = BO(ctx->opcode);
TCGLabel *l1;
TCGv target;
- ctx->exception = POWERPC_EXCP_BRANCH;
if (type == BCOND_LR || type == BCOND_CTR || type == BCOND_TAR) {
target = tcg_temp_local_new();
@@ -4828,6 +4827,7 @@ static void gen_bcond(DisasContext *ctx, int type)
gen_set_label(l1);
gen_goto_tb(ctx, 1, ctx->base.pc_next);
}
+ ctx->base.is_jmp = DISAS_NORETURN;
}
static void gen_bc(DisasContext *ctx)
@@ -9293,7 +9293,6 @@ static void ppc_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs)
/* Check trace mode exceptions */
if (unlikely(ctx->singlestep_enabled & CPU_SINGLE_STEP &&
(ctx->base.pc_next <= 0x100 || ctx->base.pc_next > 0xF00) &&
- ctx->exception != POWERPC_EXCP_BRANCH &&
ctx->base.is_jmp != DISAS_NORETURN)) {
uint32_t excp = gen_prep_dbgex(ctx);
gen_exception_nip(ctx, excp, ctx->base.pc_next);
@@ -9309,9 +9308,6 @@ static void ppc_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs)
switch (ctx->exception) {
case POWERPC_EXCP_NONE:
break;
- case POWERPC_EXCP_BRANCH:
- ctx->base.is_jmp = DISAS_NORETURN;
- break;
default:
/* Every other ctx->exception should have set NORETURN. */
g_assert_not_reached();
--
2.25.1
next prev parent reply other threads:[~2021-05-12 19:13 UTC|newest]
Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-12 18:54 [PATCH v4 00/31] Base for adding PowerPC 64-bit instructions matheus.ferst
2021-05-12 18:54 ` [PATCH v4 01/31] target/ppc: Add cia field to DisasContext matheus.ferst
2021-05-13 4:03 ` David Gibson
2021-05-12 18:54 ` [PATCH v4 02/31] target/ppc: Split out decode_legacy matheus.ferst
2021-05-13 4:03 ` David Gibson
2021-05-12 18:54 ` [PATCH v4 03/31] target/ppc: Move DISAS_NORETURN setting into gen_exception* matheus.ferst
2021-05-13 4:06 ` David Gibson
2021-05-12 18:54 ` [PATCH v4 04/31] target/ppc: Remove special case for POWERPC_SYSCALL matheus.ferst
2021-05-13 4:06 ` David Gibson
2021-05-12 18:54 ` [PATCH v4 05/31] target/ppc: Remove special case for POWERPC_EXCP_TRAP matheus.ferst
2021-05-13 4:07 ` David Gibson
2021-05-12 18:54 ` [PATCH v4 06/31] target/ppc: Simplify gen_debug_exception matheus.ferst
2021-05-13 4:08 ` David Gibson
2021-05-12 18:54 ` [PATCH v4 07/31] target/ppc: Introduce DISAS_{EXIT,CHAIN}{,_UPDATE} matheus.ferst
2021-05-13 4:10 ` David Gibson
2021-05-12 18:54 ` [PATCH v4 08/31] target/ppc: Replace POWERPC_EXCP_SYNC with DISAS_EXIT matheus.ferst
2021-05-12 19:31 ` Bruno Piazera Larsen
2021-05-13 4:11 ` David Gibson
2021-05-12 18:54 ` [PATCH v4 09/31] target/ppc: Remove unnecessary gen_io_end calls matheus.ferst
2021-05-13 4:12 ` David Gibson
2021-05-12 18:54 ` [PATCH v4 10/31] target/ppc: Introduce gen_icount_io_start matheus.ferst
2021-05-12 19:21 ` Matheus K. Ferst
2021-05-13 4:14 ` David Gibson
2021-05-12 18:54 ` [PATCH v4 11/31] target/ppc: Replace POWERPC_EXCP_STOP with DISAS_EXIT_UPDATE matheus.ferst
2021-05-12 18:54 ` matheus.ferst [this message]
2021-05-12 18:54 ` [PATCH v4 13/31] target/ppc: Remove DisasContext.exception matheus.ferst
2021-05-12 18:54 ` [PATCH v4 14/31] target/ppc: Move single-step check to ppc_tr_tb_stop matheus.ferst
2021-05-12 18:54 ` [PATCH v4 15/31] target/ppc: Tidy exception vs exit_tb matheus.ferst
2021-05-12 18:54 ` [PATCH v4 16/31] target/ppc: Mark helper_raise_exception* as noreturn matheus.ferst
2021-05-12 18:54 ` [PATCH v4 17/31] target/ppc: Use translator_loop_temp_check matheus.ferst
2021-05-12 19:45 ` Bruno Piazera Larsen
2021-05-12 18:54 ` [PATCH v4 18/31] target/ppc: Introduce macros to check isa extensions matheus.ferst
2021-05-12 18:54 ` [PATCH v4 19/31] target/ppc: Move page crossing check to ppc_tr_translate_insn matheus.ferst
2021-05-12 18:54 ` [PATCH v4 20/31] target/ppc: Add infrastructure for prefixed insns matheus.ferst
2021-05-12 18:54 ` [PATCH v4 21/31] target/ppc: Move ADDI, ADDIS to decodetree, implement PADDI matheus.ferst
2021-05-12 18:54 ` [PATCH v4 22/31] target/ppc: Implement PNOP matheus.ferst
2021-05-13 10:37 ` Richard Henderson
2021-05-12 18:54 ` [PATCH v4 23/31] TCG: add tcg_constant_tl matheus.ferst
2021-05-13 10:42 ` Richard Henderson
2021-05-12 18:54 ` [PATCH v4 24/31] target/ppc: Move D/DS/X-form integer loads to decodetree matheus.ferst
2021-05-12 18:54 ` [PATCH v4 25/31] target/ppc: Implement prefixed integer load instructions matheus.ferst
2021-05-13 10:50 ` Richard Henderson
2021-05-12 18:54 ` [PATCH v4 26/31] target/ppc: Move D/DS/X-form integer stores to decodetree matheus.ferst
2021-05-12 18:54 ` [PATCH v4 27/31] target/ppc: Implement prefixed integer store instructions matheus.ferst
2021-05-12 18:54 ` [PATCH v4 28/31] target/ppc: Implement setbc/setbcr/stnbc/setnbcr instructions matheus.ferst
2021-05-13 11:01 ` Richard Henderson
2021-05-13 11:43 ` Matheus K. Ferst
2021-05-12 18:54 ` [PATCH v4 29/31] target/ppc: Implement cfuged instruction matheus.ferst
2021-05-13 11:31 ` Richard Henderson
2021-05-13 12:24 ` Matheus K. Ferst
2021-05-14 0:01 ` Richard Henderson
2021-05-12 18:54 ` [PATCH v4 30/31] target/ppc: Implement vcfuged instruction matheus.ferst
2021-05-13 11:36 ` Richard Henderson
2021-05-12 18:54 ` [PATCH v4 31/31] target/ppc: Move addpcis to decodetree matheus.ferst
2021-05-13 11:40 ` Richard Henderson
2021-05-13 4:22 ` [PATCH v4 00/31] Base for adding PowerPC 64-bit instructions David Gibson
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