From: matheus.ferst@eldorado.org.br
To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org
Cc: richard.henderson@linaro.org, f4bug@amsat.org,
luis.pires@eldorado.org.br, lagarcia@br.ibm.com,
bruno.larsen@eldorado.org.br, matheus.ferst@eldorado.org.br,
david@gibson.dropbear.id.au
Subject: [PATCH v4 22/31] target/ppc: Implement PNOP
Date: Wed, 12 May 2021 15:54:32 -0300 [thread overview]
Message-ID: <20210512185441.3619828-23-matheus.ferst@eldorado.org.br> (raw)
In-Reply-To: <20210512185441.3619828-1-matheus.ferst@eldorado.org.br>
From: Richard Henderson <richard.henderson@linaro.org>
The illegal suffix behavior matches what was observed in a
POWER10 DD2.0 machine.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
---
v4:
- Detect illegal suffixes and call gen_invalid.
---
target/ppc/insn64.decode | 66 ++++++++++++++++++++++
target/ppc/translate/fixedpoint-impl.c.inc | 8 +++
2 files changed, 74 insertions(+)
diff --git a/target/ppc/insn64.decode b/target/ppc/insn64.decode
index 5e6c96a326..56857b5e93 100644
--- a/target/ppc/insn64.decode
+++ b/target/ppc/insn64.decode
@@ -28,3 +28,69 @@
PADDI 000001 10 0--.-- .................. \
001110 ..... ..... ................ @PLS_D
+
+### Prefixed No-operation Instruction
+
+&PNOP invalid_suffix:bool
+@PNOP 000001 11 0000-- 000000000000000000 \
+ ................................ &PNOP
+
+{
+ ## Invalid suffixes: Branch instruction
+ # bc[l][a]
+ PNOP ................................ \
+ 010000-------------------------- @PNOP invalid_suffix=1
+ # b[l][a]
+ PNOP ................................ \
+ 010010-------------------------- @PNOP invalid_suffix=1
+ # bclr[l]
+ PNOP ................................ \
+ 010011---------------0000010000- @PNOP invalid_suffix=1
+ # bcctr[l]
+ PNOP ................................ \
+ 010011---------------1000010000- @PNOP invalid_suffix=1
+ # bctar[l]
+ PNOP ................................ \
+ 010011---------------1000110000- @PNOP invalid_suffix=1
+
+ ## Invalid suffixes: rfebb
+ PNOP ................................ \
+ 010011---------------0010010010- @PNOP invalid_suffix=1
+
+ ## Invalid suffixes: context synchronizing other than isync
+ # sc
+ PNOP ................................ \
+ 010001------------------------1- @PNOP invalid_suffix=1
+ # scv
+ PNOP ................................ \
+ 010001------------------------01 @PNOP invalid_suffix=1
+ # rfscv
+ PNOP ................................ \
+ 010011---------------0001010010- @PNOP invalid_suffix=1
+ # rfid
+ PNOP ................................ \
+ 010011---------------0000010010- @PNOP invalid_suffix=1
+ # hrfid
+ PNOP ................................ \
+ 010011---------------0100010010- @PNOP invalid_suffix=1
+ # urfid
+ PNOP ................................ \
+ 010011---------------0100110010- @PNOP invalid_suffix=1
+ # stop
+ PNOP ................................ \
+ 010011---------------0101110010- @PNOP invalid_suffix=1
+ # mtmsr w/ L=0
+ PNOP ................................ \
+ 011111---------0-----0010010010- @PNOP invalid_suffix=1
+ # mtmsrd w/ L=0
+ PNOP ................................ \
+ 011111---------0-----0010110010- @PNOP invalid_suffix=1
+
+ ## Invalid suffixes: Service Processor Attention
+ PNOP ................................ \
+ 000000----------------100000000- @PNOP invalid_suffix=1
+
+ ## Valid suffixes
+ PNOP ................................ \
+ -------------------------------- @PNOP invalid_suffix=0
+}
diff --git a/target/ppc/translate/fixedpoint-impl.c.inc b/target/ppc/translate/fixedpoint-impl.c.inc
index b7ee0ff034..9a8da29c64 100644
--- a/target/ppc/translate/fixedpoint-impl.c.inc
+++ b/target/ppc/translate/fixedpoint-impl.c.inc
@@ -60,3 +60,11 @@ static bool trans_ADDIS(DisasContext *ctx, arg_D *a)
a->si <<= 16;
return trans_ADDI(ctx, a);
}
+
+static bool trans_PNOP(DisasContext *ctx, arg_PNOP *a)
+{
+ if (a->invalid_suffix) {
+ gen_invalid(ctx);
+ }
+ return true;
+}
--
2.25.1
next prev parent reply other threads:[~2021-05-12 19:47 UTC|newest]
Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-12 18:54 [PATCH v4 00/31] Base for adding PowerPC 64-bit instructions matheus.ferst
2021-05-12 18:54 ` [PATCH v4 01/31] target/ppc: Add cia field to DisasContext matheus.ferst
2021-05-13 4:03 ` David Gibson
2021-05-12 18:54 ` [PATCH v4 02/31] target/ppc: Split out decode_legacy matheus.ferst
2021-05-13 4:03 ` David Gibson
2021-05-12 18:54 ` [PATCH v4 03/31] target/ppc: Move DISAS_NORETURN setting into gen_exception* matheus.ferst
2021-05-13 4:06 ` David Gibson
2021-05-12 18:54 ` [PATCH v4 04/31] target/ppc: Remove special case for POWERPC_SYSCALL matheus.ferst
2021-05-13 4:06 ` David Gibson
2021-05-12 18:54 ` [PATCH v4 05/31] target/ppc: Remove special case for POWERPC_EXCP_TRAP matheus.ferst
2021-05-13 4:07 ` David Gibson
2021-05-12 18:54 ` [PATCH v4 06/31] target/ppc: Simplify gen_debug_exception matheus.ferst
2021-05-13 4:08 ` David Gibson
2021-05-12 18:54 ` [PATCH v4 07/31] target/ppc: Introduce DISAS_{EXIT,CHAIN}{,_UPDATE} matheus.ferst
2021-05-13 4:10 ` David Gibson
2021-05-12 18:54 ` [PATCH v4 08/31] target/ppc: Replace POWERPC_EXCP_SYNC with DISAS_EXIT matheus.ferst
2021-05-12 19:31 ` Bruno Piazera Larsen
2021-05-13 4:11 ` David Gibson
2021-05-12 18:54 ` [PATCH v4 09/31] target/ppc: Remove unnecessary gen_io_end calls matheus.ferst
2021-05-13 4:12 ` David Gibson
2021-05-12 18:54 ` [PATCH v4 10/31] target/ppc: Introduce gen_icount_io_start matheus.ferst
2021-05-12 19:21 ` Matheus K. Ferst
2021-05-13 4:14 ` David Gibson
2021-05-12 18:54 ` [PATCH v4 11/31] target/ppc: Replace POWERPC_EXCP_STOP with DISAS_EXIT_UPDATE matheus.ferst
2021-05-12 18:54 ` [PATCH v4 12/31] target/ppc: Replace POWERPC_EXCP_BRANCH with DISAS_NORETURN matheus.ferst
2021-05-12 18:54 ` [PATCH v4 13/31] target/ppc: Remove DisasContext.exception matheus.ferst
2021-05-12 18:54 ` [PATCH v4 14/31] target/ppc: Move single-step check to ppc_tr_tb_stop matheus.ferst
2021-05-12 18:54 ` [PATCH v4 15/31] target/ppc: Tidy exception vs exit_tb matheus.ferst
2021-05-12 18:54 ` [PATCH v4 16/31] target/ppc: Mark helper_raise_exception* as noreturn matheus.ferst
2021-05-12 18:54 ` [PATCH v4 17/31] target/ppc: Use translator_loop_temp_check matheus.ferst
2021-05-12 19:45 ` Bruno Piazera Larsen
2021-05-12 18:54 ` [PATCH v4 18/31] target/ppc: Introduce macros to check isa extensions matheus.ferst
2021-05-12 18:54 ` [PATCH v4 19/31] target/ppc: Move page crossing check to ppc_tr_translate_insn matheus.ferst
2021-05-12 18:54 ` [PATCH v4 20/31] target/ppc: Add infrastructure for prefixed insns matheus.ferst
2021-05-12 18:54 ` [PATCH v4 21/31] target/ppc: Move ADDI, ADDIS to decodetree, implement PADDI matheus.ferst
2021-05-12 18:54 ` matheus.ferst [this message]
2021-05-13 10:37 ` [PATCH v4 22/31] target/ppc: Implement PNOP Richard Henderson
2021-05-12 18:54 ` [PATCH v4 23/31] TCG: add tcg_constant_tl matheus.ferst
2021-05-13 10:42 ` Richard Henderson
2021-05-12 18:54 ` [PATCH v4 24/31] target/ppc: Move D/DS/X-form integer loads to decodetree matheus.ferst
2021-05-12 18:54 ` [PATCH v4 25/31] target/ppc: Implement prefixed integer load instructions matheus.ferst
2021-05-13 10:50 ` Richard Henderson
2021-05-12 18:54 ` [PATCH v4 26/31] target/ppc: Move D/DS/X-form integer stores to decodetree matheus.ferst
2021-05-12 18:54 ` [PATCH v4 27/31] target/ppc: Implement prefixed integer store instructions matheus.ferst
2021-05-12 18:54 ` [PATCH v4 28/31] target/ppc: Implement setbc/setbcr/stnbc/setnbcr instructions matheus.ferst
2021-05-13 11:01 ` Richard Henderson
2021-05-13 11:43 ` Matheus K. Ferst
2021-05-12 18:54 ` [PATCH v4 29/31] target/ppc: Implement cfuged instruction matheus.ferst
2021-05-13 11:31 ` Richard Henderson
2021-05-13 12:24 ` Matheus K. Ferst
2021-05-14 0:01 ` Richard Henderson
2021-05-12 18:54 ` [PATCH v4 30/31] target/ppc: Implement vcfuged instruction matheus.ferst
2021-05-13 11:36 ` Richard Henderson
2021-05-12 18:54 ` [PATCH v4 31/31] target/ppc: Move addpcis to decodetree matheus.ferst
2021-05-13 11:40 ` Richard Henderson
2021-05-13 4:22 ` [PATCH v4 00/31] Base for adding PowerPC 64-bit instructions David Gibson
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