qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Alistair Francis <alistair23@gmail.com>
To: Alistair <alistair@alistair23.me>
Cc: "qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] [PATCH v1 5/5] hw/arm: Add the Netduino Plus 2
Date: Fri, 3 May 2019 22:25:11 -0700	[thread overview]
Message-ID: <CAKmqyKOhfjwO+8UBj+-RiZiYUHM7LeDeJk+cmXfuKd5psowP3A@mail.gmail.com> (raw)
Message-ID: <20190504052511.g64TfV3YFH3xgKbOHioX5rJxC1nVU0sVXgU48btOF80@z> (raw)
In-Reply-To: <97245929-a8b5-4b67-bfee-656db4438cd0@www.fastmail.com>

On Fri, May 3, 2019 at 9:26 PM Alistair <alistair@alistair23.me> wrote:
>
> On Thu, May 2, 2019, at 3:06 AM, Peter Maydell wrote:
> > On Tue, 30 Apr 2019 at 21:29, Alistair Francis <alistair23@gmail.com> wrote:
> > >
> > > On Tue, Apr 30, 2019 at 9:02 AM Peter Maydell <peter.maydell@linaro.org> wrote:
> > > > Can you explain the purpose of the reset code? None of the other
> > > > v7m boards seem to need to do a manual qemu_register_reset().
> > >
> > > The reset code allows the machine to work with the -kernel option.
> > > Without the reset override using -kernel results in the guest starting
> > > at the wrong address. We can use the -device loader option without the
> > > reset code though.
> >
> > That sounds in line with how -kernel works on the other armv7m
> > boards -- the expectation is that your image file includes a
> > full vector table and the CPU will read the PC and SP from it
> > when it resets. If you want "honour the entry point" you can
> > use -device loader, as you say.
> >
> > Ignoring the entry point for -kernel ELF files is certainly
> > a bit confusing, but I think if we want to change this we should
> > do it globally, rather than having one board which behaves
> > differently to the rest. Changing it does have some awkwardness:
>
> Hmm... That is a good point. It is confusing having something just for one board. I'll drop this part and we can re-evaluate later.
>
> > * possibility of breaking previously working images
>
> I have no way to test the other boards, so this might be difficult to change.
>
> > * we can get the initial PC from the ELF entrypoint, but if
> >  we do this what do we do about the initial SP value ?
>
> Not sure about this one either. I'm guessing it changes between the different M cores.

Ah, it seems like -device loader doesn't work, it looks like not
setting the thumb register causes this core dump:

qemu: fatal: Lockup: can't escalate 3 to HardFault (current priority -1)

R00=20000000 R01=00000574 R02=200015d0 R03=200015d0
R04=00000000 R05=00000000 R06=00000000 R07=00000000
R08=00000000 R09=00000000 R10=00000000 R11=00000000
R12=00000000 R13=ffffffe0 R14=fffffff9 R15=0800cba4
XPSR=61000003 -ZC- T handler
s00=00000000 s01=00000000 d00=0000000000000000
s02=00000000 s03=00000000 d01=0000000000000000
s04=00000000 s05=00000000 d02=0000000000000000
s06=00000000 s07=00000000 d03=0000000000000000
s08=00000000 s09=00000000 d04=0000000000000000
s10=00000000 s11=00000000 d05=0000000000000000
s12=00000000 s13=00000000 d06=0000000000000000
s14=00000000 s15=00000000 d07=0000000000000000
s16=00000000 s17=00000000 d08=0000000000000000
s18=00000000 s19=00000000 d09=0000000000000000
s20=00000000 s21=00000000 d10=0000000000000000
s22=00000000 s23=00000000 d11=0000000000000000
s24=00000000 s25=00000000 d12=0000000000000000
s26=00000000 s27=00000000 d13=0000000000000000
s28=00000000 s29=00000000 d14=0000000000000000
s30=00000000 s31=00000000 d15=0000000000000000
s32=00000000 s33=00000000 d16=0000000000000000
s34=00000000 s35=00000000 d17=0000000000000000
s36=00000000 s37=00000000 d18=0000000000000000
s38=00000000 s39=00000000 d19=0000000000000000
s40=00000000 s41=00000000 d20=0000000000000000
s42=00000000 s43=00000000 d21=0000000000000000
s44=00000000 s45=00000000 d22=0000000000000000
s46=00000000 s47=00000000 d23=0000000000000000
s48=00000000 s49=00000000 d24=0000000000000000
s50=00000000 s51=00000000 d25=0000000000000000
s52=00000000 s53=00000000 d26=0000000000000000
s54=00000000 s55=00000000 d27=0000000000000000
s56=00000000 s57=00000000 d28=0000000000000000
s58=00000000 s59=00000000 d29=0000000000000000
s60=00000000 s61=00000000 d30=0000000000000000
s62=00000000 s63=00000000 d31=0000000000000000
FPSCR: 00000000
Aborted (core dumped)

Alistair

>
> Alistair
>
> >
> > thanks
> > -- PMM
> >
> >
>


  parent reply	other threads:[~2019-05-04  5:26 UTC|newest]

Thread overview: 55+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <cover.1556515687.git.alistair@alistair23.me>
2019-04-29  5:29 ` [Qemu-devel] [PATCH v1 1/5] armv7m: Allow entry information to be returned Alistair Francis
2019-04-29  5:29   ` Alistair Francis
2019-04-29  5:32 ` Alistair Francis
2019-04-29  5:32   ` Alistair Francis
2019-04-30 16:04   ` Peter Maydell
2019-04-30 16:04     ` Peter Maydell
2019-05-01  3:54     ` Alistair Francis
2019-05-01  3:54       ` Alistair Francis
2019-04-29  5:32 ` [Qemu-devel] [PATCH v1 2/5] hw/misc: Add the STM32F4xx Sysconfig device Alistair Francis
2019-04-29  5:32   ` Alistair Francis
2019-04-30 15:44   ` Peter Maydell
2019-04-30 15:44     ` Peter Maydell
2019-04-29  5:33 ` [Qemu-devel] [PATCH v1 3/5] hw/misc: Add the STM32F4xx EXTI device Alistair Francis
2019-04-29  5:33   ` Alistair Francis
2019-04-30 15:48   ` Peter Maydell
2019-04-30 15:48     ` Peter Maydell
2019-05-02  4:28     ` Alistair Francis
2019-05-02  4:28       ` Alistair Francis
2019-04-29  5:33 ` [Qemu-devel] [PATCH v1 4/5] hw/arm: Add the STM32F4xx SoC Alistair Francis
2019-04-29  5:33   ` Alistair Francis
2019-04-29 12:38   ` KONRAD Frederic
2019-04-29 12:38     ` KONRAD Frederic
2019-04-29 17:00     ` Alistair Francis
2019-04-29 17:00       ` Alistair Francis
2019-04-30 18:10       ` KONRAD Frederic
2019-04-30 18:10         ` KONRAD Frederic
2019-04-29 12:43   ` Philippe Mathieu-Daudé
2019-04-29 12:43     ` Philippe Mathieu-Daudé
2019-04-29 17:01     ` Alistair Francis
2019-04-29 17:01       ` Alistair Francis
2019-04-30 15:51       ` Peter Maydell
2019-04-30 15:51         ` Peter Maydell
2019-04-30 15:59   ` Peter Maydell
2019-04-30 15:59     ` Peter Maydell
2019-05-02  5:04     ` Alistair Francis
2019-05-02  5:04       ` Alistair Francis
2019-04-29  5:33 ` [Qemu-devel] [PATCH v1 5/5] hw/arm: Add the Netduino Plus 2 Alistair Francis
2019-04-29  5:33   ` Alistair Francis
2019-04-30 16:01   ` Peter Maydell
2019-04-30 16:01     ` Peter Maydell
2019-04-30 20:27     ` Alistair Francis
2019-04-30 20:27       ` Alistair Francis
2019-05-02 10:05       ` Peter Maydell
2019-05-02 10:05         ` Peter Maydell
2019-05-04  4:25         ` Alistair
2019-05-04  4:25           ` Alistair
2019-05-04  5:25           ` Alistair Francis [this message]
2019-05-04  5:25             ` Alistair Francis
2019-05-05 15:34             ` Peter Maydell
2019-05-05 15:34               ` Peter Maydell
2019-06-19  1:04               ` Alistair Francis
     [not found] <cover.1556774049.git.alistair@alistair23.me>
2019-05-02  5:41 ` Alistair Francis
2019-05-02  5:41   ` Alistair Francis
2019-05-03 13:53   ` Peter Maydell
2019-05-03 13:53     ` Peter Maydell

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=CAKmqyKOhfjwO+8UBj+-RiZiYUHM7LeDeJk+cmXfuKd5psowP3A@mail.gmail.com \
    --to=alistair23@gmail.com \
    --cc=alistair@alistair23.me \
    --cc=qemu-devel@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).