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From: Peter Maydell <peter.maydell@linaro.org>
To: Alistair Francis <alistair@alistair23.me>
Cc: "qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
	"alistair23@gmail.com" <alistair23@gmail.com>
Subject: Re: [Qemu-devel] [PATCH v1 5/5] hw/arm: Add the Netduino Plus 2
Date: Tue, 30 Apr 2019 17:01:51 +0100	[thread overview]
Message-ID: <CAFEAcA86i3aZx-h2ys5kmc35AMqzd6k=JrfVXObdbcppnn-J8w@mail.gmail.com> (raw)
In-Reply-To: <PSXP216MB02771957D4B9C5A15914D05FDD390@PSXP216MB0277.KORP216.PROD.OUTLOOK.COM>

On Mon, 29 Apr 2019 at 06:39, Alistair Francis <alistair@alistair23.me> wrote:
>
> Signed-off-by: Alistair Francis <alistair@alistair23.me>
> ---
>  MAINTAINERS                     |  6 +++
>  default-configs/arm-softmmu.mak |  1 +
>  hw/arm/Kconfig                  |  3 ++
>  hw/arm/Makefile.objs            |  1 +
>  hw/arm/netduinoplus2.c          | 77 +++++++++++++++++++++++++++++++++
>  5 files changed, 88 insertions(+)
>  create mode 100644 hw/arm/netduinoplus2.c
>

> +typedef struct ARMV7MResetArgs {
> +    ARMCPU *cpu;
> +    uint32_t reset_sp;
> +    uint32_t reset_pc;
> +} ARMV7MResetArgs;
> +
> +static void armv7m_reset(void *opaque)
> +{
> +    ARMV7MResetArgs *args = opaque;
> +
> +    cpu_reset(CPU(args->cpu));
> +
> +    args->cpu->env.regs[13] = args->reset_sp & 0xFFFFFFFC;
> +    args->cpu->env.thumb = args->reset_pc & 1;
> +    args->cpu->env.regs[15] = args->reset_pc & ~1;
> +}
> +
> +static void netduinoplus2_init(MachineState *machine)
> +{
> +    DeviceState *dev;
> +    ARMV7MResetArgs reset_args;
> +    uint64_t entry;
> +
> +    dev = qdev_create(NULL, TYPE_STM32F405_SOC);
> +    qdev_prop_set_string(dev, "cpu-type", ARM_CPU_TYPE_NAME("cortex-m4"));
> +    object_property_set_bool(OBJECT(dev), true, "realized", &error_fatal);
> +
> +    armv7m_load_kernel(ARM_CPU(first_cpu), machine->kernel_filename,
> +                       FLASH_SIZE, &entry);
> +
> +    reset_args = (ARMV7MResetArgs) {
> +        .cpu = ARM_CPU(first_cpu),
> +        .reset_pc = entry,
> +        .reset_sp = (SRAM_BASE_ADDRESS + (SRAM_SIZE * 2) / 3),
> +    };
> +    qemu_register_reset(armv7m_reset,
> +                        g_memdup(&reset_args, sizeof(reset_args)));
> +}

Can you explain the purpose of the reset code? None of the other
v7m boards seem to need to do a manual qemu_register_reset().

thanks
-- PMM

WARNING: multiple messages have this Message-ID (diff)
From: Peter Maydell <peter.maydell@linaro.org>
To: Alistair Francis <alistair@alistair23.me>
Cc: "alistair23@gmail.com" <alistair23@gmail.com>,
	"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] [PATCH v1 5/5] hw/arm: Add the Netduino Plus 2
Date: Tue, 30 Apr 2019 17:01:51 +0100	[thread overview]
Message-ID: <CAFEAcA86i3aZx-h2ys5kmc35AMqzd6k=JrfVXObdbcppnn-J8w@mail.gmail.com> (raw)
Message-ID: <20190430160151.nlEso1fPqgq3HZBldVoqDAc9O0kI_xjaP1yV6vNALR0@z> (raw)
In-Reply-To: <PSXP216MB02771957D4B9C5A15914D05FDD390@PSXP216MB0277.KORP216.PROD.OUTLOOK.COM>

On Mon, 29 Apr 2019 at 06:39, Alistair Francis <alistair@alistair23.me> wrote:
>
> Signed-off-by: Alistair Francis <alistair@alistair23.me>
> ---
>  MAINTAINERS                     |  6 +++
>  default-configs/arm-softmmu.mak |  1 +
>  hw/arm/Kconfig                  |  3 ++
>  hw/arm/Makefile.objs            |  1 +
>  hw/arm/netduinoplus2.c          | 77 +++++++++++++++++++++++++++++++++
>  5 files changed, 88 insertions(+)
>  create mode 100644 hw/arm/netduinoplus2.c
>

> +typedef struct ARMV7MResetArgs {
> +    ARMCPU *cpu;
> +    uint32_t reset_sp;
> +    uint32_t reset_pc;
> +} ARMV7MResetArgs;
> +
> +static void armv7m_reset(void *opaque)
> +{
> +    ARMV7MResetArgs *args = opaque;
> +
> +    cpu_reset(CPU(args->cpu));
> +
> +    args->cpu->env.regs[13] = args->reset_sp & 0xFFFFFFFC;
> +    args->cpu->env.thumb = args->reset_pc & 1;
> +    args->cpu->env.regs[15] = args->reset_pc & ~1;
> +}
> +
> +static void netduinoplus2_init(MachineState *machine)
> +{
> +    DeviceState *dev;
> +    ARMV7MResetArgs reset_args;
> +    uint64_t entry;
> +
> +    dev = qdev_create(NULL, TYPE_STM32F405_SOC);
> +    qdev_prop_set_string(dev, "cpu-type", ARM_CPU_TYPE_NAME("cortex-m4"));
> +    object_property_set_bool(OBJECT(dev), true, "realized", &error_fatal);
> +
> +    armv7m_load_kernel(ARM_CPU(first_cpu), machine->kernel_filename,
> +                       FLASH_SIZE, &entry);
> +
> +    reset_args = (ARMV7MResetArgs) {
> +        .cpu = ARM_CPU(first_cpu),
> +        .reset_pc = entry,
> +        .reset_sp = (SRAM_BASE_ADDRESS + (SRAM_SIZE * 2) / 3),
> +    };
> +    qemu_register_reset(armv7m_reset,
> +                        g_memdup(&reset_args, sizeof(reset_args)));
> +}

Can you explain the purpose of the reset code? None of the other
v7m boards seem to need to do a manual qemu_register_reset().

thanks
-- PMM


  parent reply	other threads:[~2019-04-30 16:02 UTC|newest]

Thread overview: 55+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <cover.1556515687.git.alistair@alistair23.me>
2019-04-29  5:29 ` [Qemu-devel] [PATCH v1 1/5] armv7m: Allow entry information to be returned Alistair Francis
2019-04-29  5:29   ` Alistair Francis
2019-04-29  5:32 ` Alistair Francis
2019-04-29  5:32   ` Alistair Francis
2019-04-30 16:04   ` Peter Maydell
2019-04-30 16:04     ` Peter Maydell
2019-05-01  3:54     ` Alistair Francis
2019-05-01  3:54       ` Alistair Francis
2019-04-29  5:32 ` [Qemu-devel] [PATCH v1 2/5] hw/misc: Add the STM32F4xx Sysconfig device Alistair Francis
2019-04-29  5:32   ` Alistair Francis
2019-04-30 15:44   ` Peter Maydell
2019-04-30 15:44     ` Peter Maydell
2019-04-29  5:33 ` [Qemu-devel] [PATCH v1 3/5] hw/misc: Add the STM32F4xx EXTI device Alistair Francis
2019-04-29  5:33   ` Alistair Francis
2019-04-30 15:48   ` Peter Maydell
2019-04-30 15:48     ` Peter Maydell
2019-05-02  4:28     ` Alistair Francis
2019-05-02  4:28       ` Alistair Francis
2019-04-29  5:33 ` [Qemu-devel] [PATCH v1 4/5] hw/arm: Add the STM32F4xx SoC Alistair Francis
2019-04-29  5:33   ` Alistair Francis
2019-04-29 12:38   ` KONRAD Frederic
2019-04-29 12:38     ` KONRAD Frederic
2019-04-29 17:00     ` Alistair Francis
2019-04-29 17:00       ` Alistair Francis
2019-04-30 18:10       ` KONRAD Frederic
2019-04-30 18:10         ` KONRAD Frederic
2019-04-29 12:43   ` Philippe Mathieu-Daudé
2019-04-29 12:43     ` Philippe Mathieu-Daudé
2019-04-29 17:01     ` Alistair Francis
2019-04-29 17:01       ` Alistair Francis
2019-04-30 15:51       ` Peter Maydell
2019-04-30 15:51         ` Peter Maydell
2019-04-30 15:59   ` Peter Maydell
2019-04-30 15:59     ` Peter Maydell
2019-05-02  5:04     ` Alistair Francis
2019-05-02  5:04       ` Alistair Francis
2019-04-29  5:33 ` [Qemu-devel] [PATCH v1 5/5] hw/arm: Add the Netduino Plus 2 Alistair Francis
2019-04-29  5:33   ` Alistair Francis
2019-04-30 16:01   ` Peter Maydell [this message]
2019-04-30 16:01     ` Peter Maydell
2019-04-30 20:27     ` Alistair Francis
2019-04-30 20:27       ` Alistair Francis
2019-05-02 10:05       ` Peter Maydell
2019-05-02 10:05         ` Peter Maydell
2019-05-04  4:25         ` Alistair
2019-05-04  4:25           ` Alistair
2019-05-04  5:25           ` Alistair Francis
2019-05-04  5:25             ` Alistair Francis
2019-05-05 15:34             ` Peter Maydell
2019-05-05 15:34               ` Peter Maydell
2019-06-19  1:04               ` Alistair Francis
     [not found] <cover.1556774049.git.alistair@alistair23.me>
2019-05-02  5:41 ` Alistair Francis
2019-05-02  5:41   ` Alistair Francis
2019-05-03 13:53   ` Peter Maydell
2019-05-03 13:53     ` Peter Maydell

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