From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 25/31] target/arm: Make cpu_register() available for other files
Date: Thu, 30 Apr 2020 12:51:36 +0100 [thread overview]
Message-ID: <20200430115142.13430-26-peter.maydell@linaro.org> (raw)
In-Reply-To: <20200430115142.13430-1-peter.maydell@linaro.org>
From: Thomas Huth <thuth@redhat.com>
Make cpu_register() (renamed to arm_cpu_register()) available
from internals.h so we can register CPUs also from other files
in the future.
Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20200423073358.27155-3-philmd@redhat.com
Message-ID: <20190921150420.30743-2-thuth@redhat.com>
[PMD: Only take cpu_register() from Thomas's patch]
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/cpu-qom.h | 9 ++++++++-
target/arm/cpu.c | 10 ++--------
target/arm/cpu64.c | 8 +-------
3 files changed, 11 insertions(+), 16 deletions(-)
diff --git a/target/arm/cpu-qom.h b/target/arm/cpu-qom.h
index d95568bf052..56395b87f62 100644
--- a/target/arm/cpu-qom.h
+++ b/target/arm/cpu-qom.h
@@ -35,7 +35,14 @@ struct arm_boot_info;
#define TYPE_ARM_MAX_CPU "max-" TYPE_ARM_CPU
-typedef struct ARMCPUInfo ARMCPUInfo;
+typedef struct ARMCPUInfo {
+ const char *name;
+ void (*initfn)(Object *obj);
+ void (*class_init)(ObjectClass *oc, void *data);
+} ARMCPUInfo;
+
+void arm_cpu_register(const ARMCPUInfo *info);
+void aarch64_cpu_register(const ARMCPUInfo *info);
/**
* ARMCPUClass:
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index a79f233b170..47e35400da2 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -2693,12 +2693,6 @@ static void arm_max_initfn(Object *obj)
#endif /* !defined(CONFIG_USER_ONLY) || !defined(TARGET_AARCH64) */
-struct ARMCPUInfo {
- const char *name;
- void (*initfn)(Object *obj);
- void (*class_init)(ObjectClass *oc, void *data);
-};
-
static const ARMCPUInfo arm_cpus[] = {
#if !defined(CONFIG_USER_ONLY) || !defined(TARGET_AARCH64)
{ .name = "arm926", .initfn = arm926_initfn },
@@ -2864,7 +2858,7 @@ static void cpu_register_class_init(ObjectClass *oc, void *data)
acc->info = data;
}
-static void cpu_register(const ARMCPUInfo *info)
+void arm_cpu_register(const ARMCPUInfo *info)
{
TypeInfo type_info = {
.parent = TYPE_ARM_CPU,
@@ -2905,7 +2899,7 @@ static void arm_cpu_register_types(void)
type_register_static(&idau_interface_type_info);
while (info->name) {
- cpu_register(info);
+ arm_cpu_register(info);
info++;
}
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index 95d0c8c101a..74afc28d537 100644
--- a/target/arm/cpu64.c
+++ b/target/arm/cpu64.c
@@ -737,12 +737,6 @@ static void aarch64_max_initfn(Object *obj)
cpu_max_set_sve_max_vq, NULL, NULL, &error_fatal);
}
-struct ARMCPUInfo {
- const char *name;
- void (*initfn)(Object *obj);
- void (*class_init)(ObjectClass *oc, void *data);
-};
-
static const ARMCPUInfo aarch64_cpus[] = {
{ .name = "cortex-a57", .initfn = aarch64_a57_initfn },
{ .name = "cortex-a53", .initfn = aarch64_a53_initfn },
@@ -825,7 +819,7 @@ static void cpu_register_class_init(ObjectClass *oc, void *data)
acc->info = data;
}
-static void aarch64_cpu_register(const ARMCPUInfo *info)
+void aarch64_cpu_register(const ARMCPUInfo *info)
{
TypeInfo type_info = {
.parent = TYPE_AARCH64_CPU,
--
2.20.1
next prev parent reply other threads:[~2020-04-30 12:07 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-30 11:51 [PULL 00/31] target-arm queue Peter Maydell
2020-04-30 11:51 ` [PULL 01/31] dma/xlnx-zdma: Fix descriptor loading (MEM) wrt endianness Peter Maydell
2020-04-30 11:51 ` [PULL 02/31] dma/xlnx-zdma: Fix descriptor loading (REG) " Peter Maydell
2020-04-30 11:51 ` [PULL 03/31] nrf51: Fix last GPIO CNF address Peter Maydell
2020-04-30 11:51 ` [PULL 04/31] bugfix: Use gicr_typer in arm_gicv3_icc_reset Peter Maydell
2020-04-30 11:51 ` [PULL 05/31] Typo: Correct the name of CPU hotplug memory region Peter Maydell
2020-04-30 11:51 ` [PULL 06/31] hw/net: Add Smartfusion2 emac block Peter Maydell
2020-04-30 11:51 ` [PULL 07/31] msf2: Add EMAC block to SmartFusion2 SoC Peter Maydell
2020-04-30 11:51 ` [PULL 08/31] tests/boot_linux_console: Add ethernet test to SmartFusion2 Peter Maydell
2020-04-30 11:51 ` [PULL 09/31] hw/core/clock: introduce clock object Peter Maydell
2020-04-30 14:35 ` Peter Maydell
2020-10-17 11:47 ` Philippe Mathieu-Daudé
2020-10-20 16:06 ` Philippe Mathieu-Daudé
2020-10-20 16:46 ` Peter Maydell
2020-10-20 17:46 ` Philippe Mathieu-Daudé
2020-04-30 11:51 ` [PULL 10/31] hw/core/clock-vmstate: define a vmstate entry for clock state Peter Maydell
2020-04-30 11:51 ` [PULL 11/31] qdev: add clock input&output support to devices Peter Maydell
2020-04-30 11:51 ` [PULL 12/31] qdev-clock: introduce an init array to ease the device construction Peter Maydell
2020-04-30 11:51 ` [PULL 13/31] docs/clocks: add device's clock documentation Peter Maydell
2020-04-30 11:51 ` [PULL 14/31] hw/misc/zynq_slcr: add clock generation for uarts Peter Maydell
2020-04-30 11:51 ` [PULL 15/31] hw/char/cadence_uart: add clock support Peter Maydell
2020-04-30 11:51 ` [PULL 16/31] hw/arm/xilinx_zynq: connect uart clocks to slcr Peter Maydell
2020-04-30 11:51 ` [PULL 17/31] qdev-monitor: print the device's clock with info qtree Peter Maydell
2020-04-30 11:51 ` [PULL 18/31] hw/arm: versal: Setup the ADMA with 128bit bus-width Peter Maydell
2020-04-30 11:51 ` [PULL 19/31] Cadence: gem: fix wraparound in 64bit descriptors Peter Maydell
2020-04-30 11:51 ` [PULL 20/31] net: cadence_gem: clear RX control descriptor Peter Maydell
2020-04-30 11:51 ` [PULL 21/31] target/arm: Vectorize integer comparison vs zero Peter Maydell
2020-04-30 11:51 ` [PULL 22/31] hw/arm/virt: dt: move creation of /secure-chosen to create_fdt() Peter Maydell
2020-04-30 11:51 ` [PULL 23/31] hw/arm/virt: dt: add kaslr-seed property Peter Maydell
2020-04-30 11:51 ` [PULL 24/31] target/arm: Restrict the Address Translate write operation to TCG accel Peter Maydell
2020-04-30 11:51 ` Peter Maydell [this message]
2020-04-30 11:51 ` [PULL 26/31] target/arm/cpu: Use ARRAY_SIZE() to iterate over ARMCPUInfo[] Peter Maydell
2020-04-30 14:30 ` Peter Maydell
2020-04-30 11:51 ` [PULL 27/31] target/arm/cpu: Update coding style to make checkpatch.pl happy Peter Maydell
2020-04-30 14:52 ` Philippe Mathieu-Daudé
2020-04-30 11:51 ` [PULL 28/31] device_tree: Allow name wildcards in qemu_fdt_node_path() Peter Maydell
2020-04-30 11:51 ` [PULL 29/31] device_tree: Constify compat " Peter Maydell
2020-04-30 11:51 ` [PULL 30/31] hw/arm: xlnx-zcu102: Move arm_boot_info into XlnxZCU102 Peter Maydell
2020-04-30 11:51 ` [PULL 31/31] hw/arm: xlnx-zcu102: Disable unsupported FDT firmware nodes Peter Maydell
2020-05-01 2:05 ` [PULL 00/31] target-arm queue no-reply
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