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* [PATCH v5 0/3] hw/riscv/virt: pflash improvements
@ 2023-05-26 12:10 Sunil V L
  2023-05-26 12:10 ` [PATCH v5 1/3] hw/riscv: virt: Assume M-mode FW in pflash0 only when "-bios none" Sunil V L
                   ` (4 more replies)
  0 siblings, 5 replies; 10+ messages in thread
From: Sunil V L @ 2023-05-26 12:10 UTC (permalink / raw)
  To: qemu-riscv
  Cc: qemu-devel, Palmer Dabbelt, Alistair Francis, Bin Meng,
	Weiwei Li, Daniel Henrique Barboza, Liu Zhiwei, Andrea Bolognani,
	Sunil V L

This series improves the pflash usage in RISC-V virt machine with solutions to
below issues.

1) Currently the first pflash is reserved for ROM/M-mode firmware code. But S-mode
payload firmware like EDK2 need both pflash devices to have separate code and variable
store so that OS distros can keep the FW code as read-only. 

The issue is reported at
https://salsa.debian.org/qemu-team/edk2/-/commit/c345655a0149f64c5020bfc1e53c619ce60587f6

2) The latest way of using pflash devices in other architectures and libvirt
is by using -blockdev and machine options. However, currently this method is
not working in RISC-V.

With above issues fixed, added documentation on how to use pflash devices
in RISC-V virt machine.

This patch series is based on Alistair's riscv-to-apply.next branch.

Changes since v4:
	1) Updated patch 2 to avoid accessing private field as per feedback from Philippe.
	2) Updated documentation patch to add read-only for ROM usage.
	3) Rebased to latest riscv-to-apply.next branch and updated tags.

Changes since v3:
	1) Converted single patch to a series with a cover letter since there are
	   multiple patches now.
	2) Added a new patch to enable pflash usage via -blockdev option.
	3) Separated the documentation change into new patch and updated the
	   documentation to mention only -blockdev option which seems to be the
	   recommended way of using pflash.

Changes since v2:
	1) Reverted v2 changes and used v1 approach so that pflash0 can be used
	   for code and pflash1 for variable store.
	2) Rebased to latest riscv-to-apply.next branch.
	3) Added documentation for pflash usage.

Changes since v1:
	1) Simplified the fix such that it doesn't break current EDK2.

Sunil V L (3):
  hw/riscv: virt: Assume M-mode FW in pflash0 only when "-bios none"
  riscv/virt: Support using pflash via -blockdev option
  docs/system: riscv: Add pflash usage details

 docs/system/riscv/virt.rst | 29 ++++++++++++++++++++
 hw/riscv/virt.c            | 56 +++++++++++++++-----------------------
 2 files changed, 51 insertions(+), 34 deletions(-)

-- 
2.34.1



^ permalink raw reply	[flat|nested] 10+ messages in thread

* [PATCH v5 1/3] hw/riscv: virt: Assume M-mode FW in pflash0 only when "-bios none"
  2023-05-26 12:10 [PATCH v5 0/3] hw/riscv/virt: pflash improvements Sunil V L
@ 2023-05-26 12:10 ` Sunil V L
  2023-05-26 12:10 ` [PATCH v5 2/3] riscv/virt: Support using pflash via -blockdev option Sunil V L
                   ` (3 subsequent siblings)
  4 siblings, 0 replies; 10+ messages in thread
From: Sunil V L @ 2023-05-26 12:10 UTC (permalink / raw)
  To: qemu-riscv
  Cc: qemu-devel, Palmer Dabbelt, Alistair Francis, Bin Meng,
	Weiwei Li, Daniel Henrique Barboza, Liu Zhiwei, Andrea Bolognani,
	Sunil V L, Heinrich Schuchardt

Currently, virt machine supports two pflash instances each with
32MB size. However, the first pflash is always assumed to
contain M-mode firmware and reset vector is set to this if
enabled. Hence, for S-mode payloads like EDK2, only one pflash
instance is available for use. This means both code and NV variables
of EDK2 will need to use the same pflash.

The OS distros keep the EDK2 FW code as readonly. When non-volatile
variables also need to share the same pflash, it is not possible
to keep it as readonly since variables need write access.

To resolve this issue, the code and NV variables need to be separated.
But in that case we need an extra flash. Hence, modify the convention
such that pflash0 will contain the M-mode FW only when "-bios none"
option is used. Otherwise, pflash0 will contain the S-mode payload FW.
This enables both pflash instances available for EDK2 use.

Example usage:
1) pflash0 containing M-mode FW
qemu-system-riscv64 -bios none -pflash <mmode_fw> -machine virt
or
qemu-system-riscv64 -bios none \
-drive file=<mmode_fw>,if=pflash,format=raw,unit=0 -machine virt

2) pflash0 containing S-mode payload like EDK2
qemu-system-riscv64 -pflash <smode_fw_code> -pflash <smode_vars> -machine  virt
or
qemu-system-riscv64 -bios <opensbi_fw> \
-pflash <smode_fw_code> \
-pflash <smode_vars> \
-machine  virt
or
qemu-system-riscv64 -bios <opensbi_fw> \
-drive file=<smode_fw_code>,if=pflash,format=raw,unit=0,readonly=on \
-drive file=<smode_fw_vars>,if=pflash,format=raw,unit=1 \
-machine virt

Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: Andrea Bolognani <abologna@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
 hw/riscv/virt.c | 51 ++++++++++++++++++-------------------------------
 1 file changed, 19 insertions(+), 32 deletions(-)

diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index 4e3efbee16..1187a60d6e 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -1245,7 +1245,7 @@ static void virt_machine_done(Notifier *notifier, void *data)
     target_ulong firmware_end_addr, kernel_start_addr;
     const char *firmware_name = riscv_default_firmware_name(&s->soc[0]);
     uint32_t fdt_load_addr;
-    uint64_t kernel_entry;
+    uint64_t kernel_entry = 0;
 
     /*
      * Only direct boot kernel is currently supported for KVM VM,
@@ -1266,42 +1266,29 @@ static void virt_machine_done(Notifier *notifier, void *data)
     firmware_end_addr = riscv_find_and_load_firmware(machine, firmware_name,
                                                      start_addr, NULL);
 
-    if (drive_get(IF_PFLASH, 0, 1)) {
-        /*
-         * S-mode FW like EDK2 will be kept in second plash (unit 1).
-         * When both kernel, initrd and pflash options are provided in the
-         * command line, the kernel and initrd will be copied to the fw_cfg
-         * table and opensbi will jump to the flash address which is the
-         * entry point of S-mode FW. It is the job of the S-mode FW to load
-         * the kernel and initrd using fw_cfg table.
-         *
-         * If only pflash is given but not -kernel, then it is the job of
-         * of the S-mode firmware to locate and load the kernel.
-         * In either case, the next_addr for opensbi will be the flash address.
-         */
-        riscv_setup_firmware_boot(machine);
-        kernel_entry = virt_memmap[VIRT_FLASH].base +
-                       virt_memmap[VIRT_FLASH].size / 2;
-    } else if (machine->kernel_filename) {
+    if (drive_get(IF_PFLASH, 0, 0)) {
+        if (machine->firmware && !strcmp(machine->firmware, "none")) {
+            /*
+             * Pflash was supplied but bios is none, let's overwrite the
+             * address we jump to after reset to the base of the flash.
+             */
+            start_addr = virt_memmap[VIRT_FLASH].base;
+        } else {
+            /*
+             * Pflash was supplied but bios is not none. In this case,
+             * base of the flash would contain S-mode payload.
+             */
+            riscv_setup_firmware_boot(machine);
+            kernel_entry = virt_memmap[VIRT_FLASH].base;
+        }
+    }
+
+    if (machine->kernel_filename && !kernel_entry) {
         kernel_start_addr = riscv_calc_kernel_start_addr(&s->soc[0],
                                                          firmware_end_addr);
 
         kernel_entry = riscv_load_kernel(machine, &s->soc[0],
                                          kernel_start_addr, true, NULL);
-    } else {
-       /*
-        * If dynamic firmware is used, it doesn't know where is the next mode
-        * if kernel argument is not set.
-        */
-        kernel_entry = 0;
-    }
-
-    if (drive_get(IF_PFLASH, 0, 0)) {
-        /*
-         * Pflash was supplied, let's overwrite the address we jump to after
-         * reset to the base of the flash.
-         */
-        start_addr = virt_memmap[VIRT_FLASH].base;
     }
 
     fdt_load_addr = riscv_compute_fdt_addr(memmap[VIRT_DRAM].base,
-- 
2.34.1



^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH v5 2/3] riscv/virt: Support using pflash via -blockdev option
  2023-05-26 12:10 [PATCH v5 0/3] hw/riscv/virt: pflash improvements Sunil V L
  2023-05-26 12:10 ` [PATCH v5 1/3] hw/riscv: virt: Assume M-mode FW in pflash0 only when "-bios none" Sunil V L
@ 2023-05-26 12:10 ` Sunil V L
  2023-05-26 14:04   ` Philippe Mathieu-Daudé
  2023-05-26 12:10 ` [PATCH v5 3/3] docs/system: riscv: Add pflash usage details Sunil V L
                   ` (2 subsequent siblings)
  4 siblings, 1 reply; 10+ messages in thread
From: Sunil V L @ 2023-05-26 12:10 UTC (permalink / raw)
  To: qemu-riscv
  Cc: qemu-devel, Palmer Dabbelt, Alistair Francis, Bin Meng,
	Weiwei Li, Daniel Henrique Barboza, Liu Zhiwei, Andrea Bolognani,
	Sunil V L

Currently, pflash devices can be configured only via -pflash
or -drive options. This is the legacy way and the
better way is to use -blockdev as in other architectures.
libvirt also has moved to use -blockdev method.

To support -blockdev option, pflash devices need to be
created in instance_init itself. So, update the code to
move the virt_flash_create() to instance_init. Also, use
standard interfaces to detect whether pflash0 is
configured or not.

Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
Reported-by: Andrea Bolognani <abologna@redhat.com>
Tested-by: Andrea Bolognani <abologna@redhat.com>
---
 hw/riscv/virt.c | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index 1187a60d6e..b450248a21 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -1246,6 +1246,7 @@ static void virt_machine_done(Notifier *notifier, void *data)
     const char *firmware_name = riscv_default_firmware_name(&s->soc[0]);
     uint32_t fdt_load_addr;
     uint64_t kernel_entry = 0;
+    BlockBackend *pflash_blk0;
 
     /*
      * Only direct boot kernel is currently supported for KVM VM,
@@ -1265,8 +1266,8 @@ static void virt_machine_done(Notifier *notifier, void *data)
 
     firmware_end_addr = riscv_find_and_load_firmware(machine, firmware_name,
                                                      start_addr, NULL);
-
-    if (drive_get(IF_PFLASH, 0, 0)) {
+    pflash_blk0 = pflash_cfi01_get_blk(s->flash[0]);
+    if (pflash_blk0) {
         if (machine->firmware && !strcmp(machine->firmware, "none")) {
             /*
              * Pflash was supplied but bios is none, let's overwrite the
@@ -1497,8 +1498,6 @@ static void virt_machine_init(MachineState *machine)
     sysbus_create_simple("goldfish_rtc", memmap[VIRT_RTC].base,
         qdev_get_gpio_in(DEVICE(mmio_irqchip), RTC_IRQ));
 
-    virt_flash_create(s);
-
     for (i = 0; i < ARRAY_SIZE(s->flash); i++) {
         /* Map legacy -drive if=pflash to machine properties */
         pflash_cfi01_legacy_drive(s->flash[i],
@@ -1525,6 +1524,8 @@ static void virt_machine_instance_init(Object *obj)
 {
     RISCVVirtState *s = RISCV_VIRT_MACHINE(obj);
 
+    virt_flash_create(s);
+
     s->oem_id = g_strndup(ACPI_BUILD_APPNAME6, 6);
     s->oem_table_id = g_strndup(ACPI_BUILD_APPNAME8, 8);
     s->acpi = ON_OFF_AUTO_AUTO;
-- 
2.34.1



^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH v5 3/3] docs/system: riscv: Add pflash usage details
  2023-05-26 12:10 [PATCH v5 0/3] hw/riscv/virt: pflash improvements Sunil V L
  2023-05-26 12:10 ` [PATCH v5 1/3] hw/riscv: virt: Assume M-mode FW in pflash0 only when "-bios none" Sunil V L
  2023-05-26 12:10 ` [PATCH v5 2/3] riscv/virt: Support using pflash via -blockdev option Sunil V L
@ 2023-05-26 12:10 ` Sunil V L
  2023-05-26 14:04   ` Philippe Mathieu-Daudé
  2023-05-26 12:47 ` [PATCH v5 0/3] hw/riscv/virt: pflash improvements Andrea Bolognani
  2023-05-31  5:16 ` Anup Patel
  4 siblings, 1 reply; 10+ messages in thread
From: Sunil V L @ 2023-05-26 12:10 UTC (permalink / raw)
  To: qemu-riscv
  Cc: qemu-devel, Palmer Dabbelt, Alistair Francis, Bin Meng,
	Weiwei Li, Daniel Henrique Barboza, Liu Zhiwei, Andrea Bolognani,
	Sunil V L

pflash devices can be used in virt machine for different
purposes like for ROM code or S-mode FW payload. Add a
section in the documentation on how to use pflash devices
for different purposes.

Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
---
 docs/system/riscv/virt.rst | 29 +++++++++++++++++++++++++++++
 1 file changed, 29 insertions(+)

diff --git a/docs/system/riscv/virt.rst b/docs/system/riscv/virt.rst
index 4b16e41d7f..3e873c67f3 100644
--- a/docs/system/riscv/virt.rst
+++ b/docs/system/riscv/virt.rst
@@ -53,6 +53,35 @@ with the default OpenSBI firmware image as the -bios. It also supports
 the recommended RISC-V bootflow: U-Boot SPL (M-mode) loads OpenSBI fw_dynamic
 firmware and U-Boot proper (S-mode), using the standard -bios functionality.
 
+Using flash devices
+-------------------
+
+The first flash device (pflash0) can contain either ROM code
+or S-mode payload firmware code. If the pflash0 contains the
+ROM code, -bios should be set to none. If -bios is not set to
+none, pflash0 is assumed to contain S-mode payload code.
+
+Firmware images used for pflash should be of size 32 MiB.
+
+To boot as ROM code:
+
+.. code-block:: bash
+
+  $ qemu-system-riscv64 -bios none \
+     -blockdev node-name=pflash0,driver=file,read-only=on,filename=<rom_code> \
+     -M virt,pflash0=pflash0 \
+     ... other args ....
+
+To boot as read-only S-mode payload:
+
+.. code-block:: bash
+
+  $ qemu-system-riscv64 \
+     -blockdev node-name=pflash0,driver=file,read-only=on,filename=<s-mode_fw_code> \
+     -blockdev node-name=pflash1,driver=file,filename=<s-mode_fw_vars> \
+     -M virt,pflash0=pflash0,pflash1=pflash1 \
+     ... other args ....
+
 Machine-specific options
 ------------------------
 
-- 
2.34.1



^ permalink raw reply related	[flat|nested] 10+ messages in thread

* Re: [PATCH v5 0/3] hw/riscv/virt: pflash improvements
  2023-05-26 12:10 [PATCH v5 0/3] hw/riscv/virt: pflash improvements Sunil V L
                   ` (2 preceding siblings ...)
  2023-05-26 12:10 ` [PATCH v5 3/3] docs/system: riscv: Add pflash usage details Sunil V L
@ 2023-05-26 12:47 ` Andrea Bolognani
  2023-05-31  5:16 ` Anup Patel
  4 siblings, 0 replies; 10+ messages in thread
From: Andrea Bolognani @ 2023-05-26 12:47 UTC (permalink / raw)
  To: Sunil V L
  Cc: qemu-riscv, qemu-devel, Palmer Dabbelt, Alistair Francis,
	Bin Meng, Weiwei Li, Daniel Henrique Barboza, Liu Zhiwei

On Fri, May 26, 2023 at 05:40:03PM +0530, Sunil V L wrote:
> This series improves the pflash usage in RISC-V virt machine with solutions to
> below issues.
>
> 1) Currently the first pflash is reserved for ROM/M-mode firmware code. But S-mode
> payload firmware like EDK2 need both pflash devices to have separate code and variable
> store so that OS distros can keep the FW code as read-only.
>
> The issue is reported at
> https://salsa.debian.org/qemu-team/edk2/-/commit/c345655a0149f64c5020bfc1e53c619ce60587f6
>
> 2) The latest way of using pflash devices in other architectures and libvirt
> is by using -blockdev and machine options. However, currently this method is
> not working in RISC-V.
>
> With above issues fixed, added documentation on how to use pflash devices
> in RISC-V virt machine.
>
> This patch series is based on Alistair's riscv-to-apply.next branch.
>
> Changes since v4:
> 	1) Updated patch 2 to avoid accessing private field as per feedback from Philippe.
> 	2) Updated documentation patch to add read-only for ROM usage.
> 	3) Rebased to latest riscv-to-apply.next branch and updated tags.

Still works great :)

Tested-by: Andrea Bolognani <abologna@redhat.com>

-- 
Andrea Bolognani / Red Hat / Virtualization



^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v5 2/3] riscv/virt: Support using pflash via -blockdev option
  2023-05-26 12:10 ` [PATCH v5 2/3] riscv/virt: Support using pflash via -blockdev option Sunil V L
@ 2023-05-26 14:04   ` Philippe Mathieu-Daudé
  0 siblings, 0 replies; 10+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-05-26 14:04 UTC (permalink / raw)
  To: Sunil V L, qemu-riscv
  Cc: qemu-devel, Palmer Dabbelt, Alistair Francis, Bin Meng,
	Weiwei Li, Daniel Henrique Barboza, Liu Zhiwei, Andrea Bolognani

On 26/5/23 14:10, Sunil V L wrote:
> Currently, pflash devices can be configured only via -pflash
> or -drive options. This is the legacy way and the
> better way is to use -blockdev as in other architectures.
> libvirt also has moved to use -blockdev method.
> 
> To support -blockdev option, pflash devices need to be
> created in instance_init itself. So, update the code to
> move the virt_flash_create() to instance_init. Also, use
> standard interfaces to detect whether pflash0 is
> configured or not.
> 
> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
> Reported-by: Andrea Bolognani <abologna@redhat.com>
> Tested-by: Andrea Bolognani <abologna@redhat.com>
> ---
>   hw/riscv/virt.c | 9 +++++----
>   1 file changed, 5 insertions(+), 4 deletions(-)

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>



^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v5 3/3] docs/system: riscv: Add pflash usage details
  2023-05-26 12:10 ` [PATCH v5 3/3] docs/system: riscv: Add pflash usage details Sunil V L
@ 2023-05-26 14:04   ` Philippe Mathieu-Daudé
  0 siblings, 0 replies; 10+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-05-26 14:04 UTC (permalink / raw)
  To: Sunil V L, qemu-riscv
  Cc: qemu-devel, Palmer Dabbelt, Alistair Francis, Bin Meng,
	Weiwei Li, Daniel Henrique Barboza, Liu Zhiwei, Andrea Bolognani

On 26/5/23 14:10, Sunil V L wrote:
> pflash devices can be used in virt machine for different
> purposes like for ROM code or S-mode FW payload. Add a
> section in the documentation on how to use pflash devices
> for different purposes.
> 
> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
> ---
>   docs/system/riscv/virt.rst | 29 +++++++++++++++++++++++++++++
>   1 file changed, 29 insertions(+)

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>




^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v5 0/3] hw/riscv/virt: pflash improvements
  2023-05-26 12:10 [PATCH v5 0/3] hw/riscv/virt: pflash improvements Sunil V L
                   ` (3 preceding siblings ...)
  2023-05-26 12:47 ` [PATCH v5 0/3] hw/riscv/virt: pflash improvements Andrea Bolognani
@ 2023-05-31  5:16 ` Anup Patel
  2023-05-31 11:34   ` Andrea Bolognani
  4 siblings, 1 reply; 10+ messages in thread
From: Anup Patel @ 2023-05-31  5:16 UTC (permalink / raw)
  To: Sunil V L
  Cc: qemu-riscv, qemu-devel, Palmer Dabbelt, Alistair Francis,
	Bin Meng, Weiwei Li, Daniel Henrique Barboza, Liu Zhiwei,
	Andrea Bolognani

On Fri, May 26, 2023 at 5:41 PM Sunil V L <sunilvl@ventanamicro.com> wrote:
>
> This series improves the pflash usage in RISC-V virt machine with solutions to
> below issues.
>
> 1) Currently the first pflash is reserved for ROM/M-mode firmware code. But S-mode
> payload firmware like EDK2 need both pflash devices to have separate code and variable
> store so that OS distros can keep the FW code as read-only.
>
> The issue is reported at
> https://salsa.debian.org/qemu-team/edk2/-/commit/c345655a0149f64c5020bfc1e53c619ce60587f6
>
> 2) The latest way of using pflash devices in other architectures and libvirt
> is by using -blockdev and machine options. However, currently this method is
> not working in RISC-V.
>
> With above issues fixed, added documentation on how to use pflash devices
> in RISC-V virt machine.
>
> This patch series is based on Alistair's riscv-to-apply.next branch.
>
> Changes since v4:
>         1) Updated patch 2 to avoid accessing private field as per feedback from Philippe.
>         2) Updated documentation patch to add read-only for ROM usage.
>         3) Rebased to latest riscv-to-apply.next branch and updated tags.
>
> Changes since v3:
>         1) Converted single patch to a series with a cover letter since there are
>            multiple patches now.
>         2) Added a new patch to enable pflash usage via -blockdev option.
>         3) Separated the documentation change into new patch and updated the
>            documentation to mention only -blockdev option which seems to be the
>            recommended way of using pflash.
>
> Changes since v2:
>         1) Reverted v2 changes and used v1 approach so that pflash0 can be used
>            for code and pflash1 for variable store.
>         2) Rebased to latest riscv-to-apply.next branch.
>         3) Added documentation for pflash usage.
>
> Changes since v1:
>         1) Simplified the fix such that it doesn't break current EDK2.
>
> Sunil V L (3):
>   hw/riscv: virt: Assume M-mode FW in pflash0 only when "-bios none"
>   riscv/virt: Support using pflash via -blockdev option
>   docs/system: riscv: Add pflash usage details

In case of KVM guests, there is no M-mode so pflash0 will always
contain S-mode FW.

I suggest improving this series to consider KVM guests as well
such that the same EDK2 S-mode works for KVM and TCG guests.

Regards,
Anup

>
>  docs/system/riscv/virt.rst | 29 ++++++++++++++++++++
>  hw/riscv/virt.c            | 56 +++++++++++++++-----------------------
>  2 files changed, 51 insertions(+), 34 deletions(-)
>
> --
> 2.34.1
>
>


^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v5 0/3] hw/riscv/virt: pflash improvements
  2023-05-31  5:16 ` Anup Patel
@ 2023-05-31 11:34   ` Andrea Bolognani
  2023-05-31 13:48     ` Sunil V L
  0 siblings, 1 reply; 10+ messages in thread
From: Andrea Bolognani @ 2023-05-31 11:34 UTC (permalink / raw)
  To: Anup Patel
  Cc: Sunil V L, qemu-riscv, qemu-devel, Palmer Dabbelt,
	Alistair Francis, Bin Meng, Weiwei Li, Daniel Henrique Barboza,
	Liu Zhiwei

On Wed, May 31, 2023 at 10:46:17AM +0530, Anup Patel wrote:
> On Fri, May 26, 2023 at 5:41 PM Sunil V L <sunilvl@ventanamicro.com> wrote:
> >   hw/riscv: virt: Assume M-mode FW in pflash0 only when "-bios none"
> >   riscv/virt: Support using pflash via -blockdev option
> >   docs/system: riscv: Add pflash usage details
>
> In case of KVM guests, there is no M-mode so pflash0 will always
> contain S-mode FW.
>
> I suggest improving this series to consider KVM guests as well
> such that the same EDK2 S-mode works for KVM and TCG guests.

After these patches are applied, pflash0 is assumed to contain S-mode
code *unless* you go out of your way and add -bios none to the
command line.

It seems to me that this default behavior will work fine for KVM
guests too, based on what you wrote above. Isn't that the case?

-- 
Andrea Bolognani / Red Hat / Virtualization



^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH v5 0/3] hw/riscv/virt: pflash improvements
  2023-05-31 11:34   ` Andrea Bolognani
@ 2023-05-31 13:48     ` Sunil V L
  0 siblings, 0 replies; 10+ messages in thread
From: Sunil V L @ 2023-05-31 13:48 UTC (permalink / raw)
  To: Andrea Bolognani
  Cc: Anup Patel, qemu-riscv, qemu-devel, Palmer Dabbelt,
	Alistair Francis, Bin Meng, Weiwei Li, Daniel Henrique Barboza,
	Liu Zhiwei

On Wed, May 31, 2023 at 04:34:58AM -0700, Andrea Bolognani wrote:
> On Wed, May 31, 2023 at 10:46:17AM +0530, Anup Patel wrote:
> > On Fri, May 26, 2023 at 5:41 PM Sunil V L <sunilvl@ventanamicro.com> wrote:
> > >   hw/riscv: virt: Assume M-mode FW in pflash0 only when "-bios none"
> > >   riscv/virt: Support using pflash via -blockdev option
> > >   docs/system: riscv: Add pflash usage details
> >
> > In case of KVM guests, there is no M-mode so pflash0 will always
> > contain S-mode FW.
> >
> > I suggest improving this series to consider KVM guests as well
> > such that the same EDK2 S-mode works for KVM and TCG guests.
> 
> After these patches are applied, pflash0 is assumed to contain S-mode
> code *unless* you go out of your way and add -bios none to the
> command line.
> 
> It seems to me that this default behavior will work fine for KVM
> guests too, based on what you wrote above. Isn't that the case?
> 
Hi Andrea,

Actually, KVM boot is supported if the user passes -bios none. Even if
the user doesn't pass -bios at all, the code will itself add none. So,
in either case, it satisfies the condition for ROM/M-mode firmware code
and pflash0 will be assumed to have M-mode firmware code. To resolve
this, I need to add !kvm_enabled() check also while checking for
pflash0. I have made the changes and tested with KVM and KVM guest also
boots with EDK2 now!.

Let me send the next revision with this update. Thanks Anup for pointing
this use case also.

Thanks,
Sunil


^ permalink raw reply	[flat|nested] 10+ messages in thread

end of thread, other threads:[~2023-05-31 13:49 UTC | newest]

Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-05-26 12:10 [PATCH v5 0/3] hw/riscv/virt: pflash improvements Sunil V L
2023-05-26 12:10 ` [PATCH v5 1/3] hw/riscv: virt: Assume M-mode FW in pflash0 only when "-bios none" Sunil V L
2023-05-26 12:10 ` [PATCH v5 2/3] riscv/virt: Support using pflash via -blockdev option Sunil V L
2023-05-26 14:04   ` Philippe Mathieu-Daudé
2023-05-26 12:10 ` [PATCH v5 3/3] docs/system: riscv: Add pflash usage details Sunil V L
2023-05-26 14:04   ` Philippe Mathieu-Daudé
2023-05-26 12:47 ` [PATCH v5 0/3] hw/riscv/virt: pflash improvements Andrea Bolognani
2023-05-31  5:16 ` Anup Patel
2023-05-31 11:34   ` Andrea Bolognani
2023-05-31 13:48     ` Sunil V L

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