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From: Alistair Francis <alistair23@gmail.com>
To: qemu-devel@nongnu.org
Cc: alistair23@gmail.com, Zhao Liu <zhao1.liu@intel.com>,
	Alistair Francis <alistair.francis@wdc.com>
Subject: [PULL 4/5] hw/riscv: Fix typo field in error_report
Date: Wed, 19 Jul 2023 14:45:37 +1000	[thread overview]
Message-ID: <20230719044538.2013401-5-alistair.francis@wdc.com> (raw)
In-Reply-To: <20230719044538.2013401-1-alistair.francis@wdc.com>

From: Zhao Liu <zhao1.liu@intel.com>

"smp.cpus" means the number of online CPUs and "smp.max_cpus" means the
total number of CPUs.

riscv_numa_get_default_cpu_node_id() checks "smp.cpus" and the
"available CPUs" description in the next error message also indicates
online CPUs.

So report "smp.cpus" in error_report() instand of "smp.max_cpus".

Since "smp.cpus" is "unsigned int", use "%u".

Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20230718080712.503333-1-zhao1.liu@linux.intel.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
 hw/riscv/numa.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/hw/riscv/numa.c b/hw/riscv/numa.c
index e0414d5b1b..d319aefb45 100644
--- a/hw/riscv/numa.c
+++ b/hw/riscv/numa.c
@@ -209,8 +209,8 @@ int64_t riscv_numa_get_default_cpu_node_id(const MachineState *ms, int idx)
 
     if (ms->numa_state->num_nodes > ms->smp.cpus) {
         error_report("Number of NUMA nodes (%d)"
-                     " cannot exceed the number of available CPUs (%d).",
-                     ms->numa_state->num_nodes, ms->smp.max_cpus);
+                     " cannot exceed the number of available CPUs (%u).",
+                     ms->numa_state->num_nodes, ms->smp.cpus);
         exit(EXIT_FAILURE);
     }
     if (ms->numa_state->num_nodes) {
-- 
2.40.1



  parent reply	other threads:[~2023-07-19  4:47 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-19  4:45 [PULL 0/5] riscv-to-apply queue Alistair Francis
2023-07-19  4:45 ` [PULL 1/5] docs/system/target-riscv.rst: tidy CPU firmware section Alistair Francis
2023-07-19  4:45 ` [PULL 2/5] riscv/disas: Fix disas output of upper immediates Alistair Francis
2023-07-19  4:45 ` [PULL 3/5] target/riscv/cpu.c: check priv_ver before auto-enable zca/zcd/zcf Alistair Francis
2023-07-19  4:45 ` Alistair Francis [this message]
2023-07-19  4:45 ` [PULL 5/5] target/riscv: Fix LMUL check to use VLEN Alistair Francis
2023-07-19 19:30 ` [PULL 0/5] riscv-to-apply queue Peter Maydell

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