From: Alistair Francis <alistair23@gmail.com>
To: qemu-devel@nongnu.org
Cc: alistair23@gmail.com, Alistair Francis <alistair.francis@wdc.com>
Subject: [PULL 0/5] riscv-to-apply queue
Date: Wed, 19 Jul 2023 14:45:33 +1000 [thread overview]
Message-ID: <20230719044538.2013401-1-alistair.francis@wdc.com> (raw)
The following changes since commit 361d5397355276e3007825cc17217c1e4d4320f7:
Merge tag 'block-pull-request' of https://gitlab.com/stefanha/qemu into staging (2023-07-17 15:49:27 +0100)
are available in the Git repository at:
https://github.com/alistair23/qemu.git tags/pull-riscv-to-apply-20230719-1
for you to fetch changes up to 32be32509987fbe42cf5c2fd3cea3c2ad6eae179:
target/riscv: Fix LMUL check to use VLEN (2023-07-19 14:37:26 +1000)
----------------------------------------------------------------
Fourth RISC-V PR for 8.1
* Fix LMUL check to use VLEN
* Fix typo field in NUMA error_report
* check priv_ver before auto-enable zca/zcd/zcf
* Fix disas output of upper immediates
* tidy CPU firmware section
----------------------------------------------------------------
Christoph Müllner (1):
riscv/disas: Fix disas output of upper immediates
Daniel Henrique Barboza (2):
docs/system/target-riscv.rst: tidy CPU firmware section
target/riscv/cpu.c: check priv_ver before auto-enable zca/zcd/zcf
Rob Bradford (1):
target/riscv: Fix LMUL check to use VLEN
Zhao Liu (1):
hw/riscv: Fix typo field in error_report
docs/system/target-riscv.rst | 24 ++++++++++++++++--------
disas/riscv.h | 2 ++
disas/riscv.c | 19 ++++++++++++++++---
hw/riscv/numa.c | 4 ++--
target/riscv/cpu.c | 3 ++-
target/riscv/vector_helper.c | 4 ++--
6 files changed, 40 insertions(+), 16 deletions(-)
next reply other threads:[~2023-07-19 4:46 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-19 4:45 Alistair Francis [this message]
2023-07-19 4:45 ` [PULL 1/5] docs/system/target-riscv.rst: tidy CPU firmware section Alistair Francis
2023-07-19 4:45 ` [PULL 2/5] riscv/disas: Fix disas output of upper immediates Alistair Francis
2023-07-19 4:45 ` [PULL 3/5] target/riscv/cpu.c: check priv_ver before auto-enable zca/zcd/zcf Alistair Francis
2023-07-19 4:45 ` [PULL 4/5] hw/riscv: Fix typo field in error_report Alistair Francis
2023-07-19 4:45 ` [PULL 5/5] target/riscv: Fix LMUL check to use VLEN Alistair Francis
2023-07-19 19:30 ` [PULL 0/5] riscv-to-apply queue Peter Maydell
-- strict thread matches above, loose matches on Subject: below --
2020-07-22 16:48 Alistair Francis
2020-07-24 9:51 ` Peter Maydell
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