From: Pratyush Yadav <p.yadav@ti.com>
To: u-boot@lists.denx.de
Subject: [PATCH v9 01/28] spi: spi-mem: allow specifying whether an op is DTR or not
Date: Wed, 5 May 2021 15:11:11 +0530 [thread overview]
Message-ID: <20210505094138.30805-2-p.yadav@ti.com> (raw)
In-Reply-To: <20210505094138.30805-1-p.yadav@ti.com>
Each phase is given a separate 'dtr' field so mixed protocols like
4S-4D-4D can be supported.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
---
drivers/spi/spi-mem.c | 3 +++
include/spi-mem.h | 8 ++++++++
2 files changed, 11 insertions(+)
diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c
index c095ae9505..427f7c13c5 100644
--- a/drivers/spi/spi-mem.c
+++ b/drivers/spi/spi-mem.c
@@ -164,6 +164,9 @@ bool spi_mem_default_supports_op(struct spi_slave *slave,
op->data.dir == SPI_MEM_DATA_OUT))
return false;
+ if (op->cmd.dtr || op->addr.dtr || op->dummy.dtr || op->data.dtr)
+ return false;
+
return true;
}
EXPORT_SYMBOL_GPL(spi_mem_default_supports_op);
diff --git a/include/spi-mem.h b/include/spi-mem.h
index e354c38897..8bd4459674 100644
--- a/include/spi-mem.h
+++ b/include/spi-mem.h
@@ -71,6 +71,7 @@ enum spi_mem_data_dir {
* struct spi_mem_op - describes a SPI memory operation
* @cmd.buswidth: number of IO lines used to transmit the command
* @cmd.opcode: operation opcode
+ * @cmd.dtr: whether the command opcode should be sent in DTR mode or not
* @addr.nbytes: number of address bytes to send. Can be zero if the operation
* does not need to send an address
* @addr.buswidth: number of IO lines used to transmit the address cycles
@@ -78,10 +79,13 @@ enum spi_mem_data_dir {
* Note that only @addr.nbytes are taken into account in this
* address value, so users should make sure the value fits in the
* assigned number of bytes.
+ * @addr.dtr: whether the address should be sent in DTR mode or not
* @dummy.nbytes: number of dummy bytes to send after an opcode or address. Can
* be zero if the operation does not require dummy bytes
* @dummy.buswidth: number of IO lanes used to transmit the dummy bytes
+ * @dummy.dtr: whether the dummy bytes should be sent in DTR mode or not
* @data.buswidth: number of IO lanes used to send/receive the data
+ * @data.dtr: whether the data should be sent in DTR mode or not
* @data.dir: direction of the transfer
* @data.buf.in: input buffer
* @data.buf.out: output buffer
@@ -90,21 +94,25 @@ struct spi_mem_op {
struct {
u8 buswidth;
u8 opcode;
+ u8 dtr : 1;
} cmd;
struct {
u8 nbytes;
u8 buswidth;
+ u8 dtr : 1;
u64 val;
} addr;
struct {
u8 nbytes;
u8 buswidth;
+ u8 dtr : 1;
} dummy;
struct {
u8 buswidth;
+ u8 dtr : 1;
enum spi_mem_data_dir dir;
unsigned int nbytes;
/* buf.{in,out} must be DMA-able. */
--
2.30.0
next prev parent reply other threads:[~2021-05-05 9:41 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-05 9:41 [PATCH v9 00/28] mtd: spi-nor-core: add xSPI Octal DTR support Pratyush Yadav
2021-05-05 9:41 ` Pratyush Yadav [this message]
2021-05-05 9:41 ` [PATCH v9 02/28] spi: spi-mem: allow specifying a command's extension Pratyush Yadav
2021-05-05 9:41 ` [PATCH v9 03/28] spi: spi-mem: export spi_mem_default_supports_op() Pratyush Yadav
2021-05-05 9:41 ` [PATCH v9 04/28] spi: spi-mem: add spi_mem_dtr_supports_op() Pratyush Yadav
2021-05-05 9:41 ` [PATCH v9 05/28] spi: cadence-qspi: Do not calibrate when device tree sets read delay Pratyush Yadav
2021-05-05 9:41 ` [PATCH v9 06/28] spi: cadence-qspi: Add a small delay before indirect writes Pratyush Yadav
2021-05-05 9:41 ` [PATCH v9 07/28] spi: cadence-qspi: Add support for octal DTR flashes Pratyush Yadav
2021-05-05 9:41 ` [PATCH v9 08/28] arm: mvebu: x530: Use tiny SPI NOR Pratyush Yadav
2021-05-05 9:41 ` [PATCH v9 09/28] mtd: spi-nor-core: Fix address width on flash chips > 16MB Pratyush Yadav
2021-05-05 9:41 ` [PATCH v9 10/28] mtd: spi-nor-core: Add a ->setup() hook Pratyush Yadav
2021-05-05 9:41 ` [PATCH v9 11/28] mtd: spi-nor-core: Move SFDP related declarations to top Pratyush Yadav
2021-05-05 9:41 ` [PATCH v9 12/28] mtd: spi-nor-core: Introduce flash-specific fixup hooks Pratyush Yadav
2021-05-05 9:41 ` [PATCH v9 13/28] mtd: spi-nor-core: Rework hwcaps selection Pratyush Yadav
2021-05-05 9:41 ` [PATCH v9 14/28] mtd: spi-nor-core: Do not set data direction when there is no data Pratyush Yadav
2021-05-05 9:41 ` [PATCH v9 15/28] mtd: spi-nor-core: Add support for DTR protocol Pratyush Yadav
2021-05-05 9:41 ` [PATCH v9 16/28] mtd: spi-nor-core: prepare BFPT parsing for JESD216 rev D Pratyush Yadav
2021-05-05 9:41 ` [PATCH v9 17/28] mtd: spi-nor-core: Get command opcode extension type from BFPT Pratyush Yadav
2021-05-05 9:41 ` [PATCH v9 18/28] mtd: spi-nor-core: Parse xSPI Profile 1.0 table Pratyush Yadav
2021-05-05 9:41 ` [PATCH v9 19/28] mtd: spi-nor-core: Prepare Read SR and FSR for Octal DTR mode Pratyush Yadav
2021-05-05 9:41 ` [PATCH v9 20/28] mtd: spi-nor-core: Enable octal DTR mode when possible Pratyush Yadav
2021-05-05 9:41 ` [PATCH v9 21/28] mtd: spi-nor-core: Do not make invalid quad enable fatal Pratyush Yadav
2021-05-05 9:41 ` [PATCH v9 22/28] mtd: spi-nor-core: Detect Soft Reset sequence support from BFPT Pratyush Yadav
2021-05-05 9:41 ` [PATCH v9 23/28] mtd: spi-nor-core: Perform a Soft Reset on shutdown Pratyush Yadav
2021-05-05 9:41 ` [PATCH v9 24/28] mtd: spi-nor-core: Perform a Soft Reset on boot Pratyush Yadav
2021-05-05 9:41 ` [PATCH v9 25/28] mtd: spi-nor-core: allow truncated erases Pratyush Yadav
2021-05-05 9:41 ` [PATCH v9 26/28] mtd: spi-nor-core: Add non-uniform erase for Spansion/Cypress Pratyush Yadav
2021-05-05 9:41 ` [PATCH v9 27/28] mtd: spi-nor-core: Add support for Cypress Semper flash Pratyush Yadav
2021-05-05 9:41 ` [PATCH v9 28/28] mtd: spi-nor-core: Allow using Micron mt35xu512aba in Octal DTR mode Pratyush Yadav
2021-05-10 13:20 ` [PATCH v9 00/28] mtd: spi-nor-core: add xSPI Octal DTR support Pratyush Yadav
2021-05-26 17:05 ` Jagan Teki
2021-05-27 16:23 ` Pratyush Yadav
2021-06-14 15:10 ` Pratyush Yadav
2021-06-23 12:02 ` Jagan Teki
2021-06-24 11:13 ` Pratyush Yadav
2021-06-25 15:32 ` Jagan Teki
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210505094138.30805-2-p.yadav@ti.com \
--to=p.yadav@ti.com \
--cc=u-boot@lists.denx.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).