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From: Richard Henderson <richard.henderson@linaro.org>
To: Stafford Horne <shorne@gmail.com>,
	QEMU Development <qemu-devel@nongnu.org>
Cc: Openrisc <openrisc@lists.librecores.org>,
	Richard Henderson <rth@twiddle.net>
Subject: Re: [Qemu-devel] [PATCH 3/5] openrisc/cputimer: Perparation for Multicore
Date: Thu, 12 Oct 2017 13:50:58 -0700	[thread overview]
Message-ID: <05f62b13-b759-1b12-89fc-59d4eedf3791@linaro.org> (raw)
In-Reply-To: <9ff134a8c36d63ad667d94cacb5ef490e2227e1e.1503467674.git.shorne@gmail.com>

On 08/22/2017 10:57 PM, Stafford Horne wrote:
> In order to support multicore system we move some of the previously
> static state variables into the state of each core.
> 
> On the other hand in order to allow timers to be synced between each
> code the ttcr (tick timer count register) is moved out of the core.
> This is not as per real hardware spec which has a separate timer counter
> per core, but it seems the most simple way to keep each clock in sync.
> 
> Signed-off-by: Stafford Horne <shorne@gmail.com>
> ---
>  hw/openrisc/cputimer.c       | 62 +++++++++++++++++++++++++++++++++-----------
>  target/openrisc/cpu.c        |  1 -
>  target/openrisc/cpu.h        |  4 ++-
>  target/openrisc/machine.c    |  1 -
>  target/openrisc/sys_helper.c |  4 +--
>  5 files changed, 52 insertions(+), 20 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~

WARNING: multiple messages have this Message-ID (diff)
From: Richard Henderson <richard.henderson@linaro.org>
To: openrisc@lists.librecores.org
Subject: [OpenRISC] [Qemu-devel] [PATCH 3/5] openrisc/cputimer: Perparation for Multicore
Date: Thu, 12 Oct 2017 13:50:58 -0700	[thread overview]
Message-ID: <05f62b13-b759-1b12-89fc-59d4eedf3791@linaro.org> (raw)
In-Reply-To: <9ff134a8c36d63ad667d94cacb5ef490e2227e1e.1503467674.git.shorne@gmail.com>

On 08/22/2017 10:57 PM, Stafford Horne wrote:
> In order to support multicore system we move some of the previously
> static state variables into the state of each core.
> 
> On the other hand in order to allow timers to be synced between each
> code the ttcr (tick timer count register) is moved out of the core.
> This is not as per real hardware spec which has a separate timer counter
> per core, but it seems the most simple way to keep each clock in sync.
> 
> Signed-off-by: Stafford Horne <shorne@gmail.com>
> ---
>  hw/openrisc/cputimer.c       | 62 +++++++++++++++++++++++++++++++++-----------
>  target/openrisc/cpu.c        |  1 -
>  target/openrisc/cpu.h        |  4 ++-
>  target/openrisc/machine.c    |  1 -
>  target/openrisc/sys_helper.c |  4 +--
>  5 files changed, 52 insertions(+), 20 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~

  reply	other threads:[~2017-10-12 20:51 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-08-23  5:57 [Qemu-devel] [PATCH 0/5] OpenRISC SMP Support Stafford Horne
2017-08-23  5:57 ` [OpenRISC] " Stafford Horne
2017-08-23  5:57 ` [Qemu-devel] [PATCH 1/5] openrisc/ompic: Add OpenRISC Multicore PIC (OMPIC) Stafford Horne
2017-08-23  5:57   ` [OpenRISC] " Stafford Horne
2017-10-12 20:48   ` [Qemu-devel] " Richard Henderson
2017-10-12 20:48     ` [OpenRISC] " Richard Henderson
2017-08-23  5:57 ` [Qemu-devel] [PATCH 2/5] target/openrisc: Make coreid and numcores configurable in state Stafford Horne
2017-08-23  5:57   ` [OpenRISC] " Stafford Horne
2017-10-12 20:48   ` [Qemu-devel] " Richard Henderson
2017-10-12 20:48     ` [OpenRISC] " Richard Henderson
2017-08-23  5:57 ` [Qemu-devel] [PATCH 3/5] openrisc/cputimer: Perparation for Multicore Stafford Horne
2017-08-23  5:57   ` [OpenRISC] " Stafford Horne
2017-10-12 20:50   ` Richard Henderson [this message]
2017-10-12 20:50     ` [OpenRISC] [Qemu-devel] " Richard Henderson
2017-08-23  5:57 ` [Qemu-devel] [PATCH 4/5] openrisc: Initial SMP support Stafford Horne
2017-08-23  5:57   ` [OpenRISC] " Stafford Horne
2017-10-12 21:28   ` [Qemu-devel] " Richard Henderson
2017-10-12 21:28     ` [OpenRISC] " Richard Henderson
2017-08-23  5:57 ` [Qemu-devel] [PATCH 5/5] openrisc: Only kick cpu on timeout, not on update Stafford Horne
2017-08-23  5:57   ` [OpenRISC] " Stafford Horne
2017-10-12 21:28   ` [Qemu-devel] " Richard Henderson
2017-10-12 21:28     ` [OpenRISC] " Richard Henderson
2017-10-07  0:21 ` [Qemu-devel] [PATCH 0/5] OpenRISC SMP Support Stafford Horne
2017-10-07  0:21   ` [OpenRISC] " Stafford Horne

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