From: Kevin Wells <kevin.wells@nxp.com>
To: Kevin Wells <wellsk40@gmail.com>,
"sameo@linux.intel.com" <sameo@linux.intel.com>,
"rabin.vincent@stericsson.com" <rabin.vincent@stericsson.com>,
"linus.walleij@stericsson.com" <linus.walleij@stericsson.com>,
"srinidhi.kasagar@stericsson.com"
<srinidhi.kasagar@stericsson.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux@arm.linux.org.uk" <linux@arm.linux.org.uk>,
"u.kleine-koenig@pengutronix.de" <u.kleine-koenig@pengutronix.de>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"tj@kernel.org" <tj@kernel.org>,
"grant.likely@secretlab.ca" <grant.likely@secretlab.ca>,
"spi-devel-general@lists.sourceforge.net"
<spi-devel-general@lists.sourceforge.net>
Cc: "quentinyang05@gmail.com" <quentinyang05@gmail.com>,
"Lukasz.Baj@tieto.com" <Lukasz.Baj@tieto.com>
Subject: RE: resend: [PATCH] amba_pl022: Setup SPI configuration based on spi->mode
Date: Mon, 13 Sep 2010 18:51:57 +0200 [thread overview]
Message-ID: <083DF309106F364B939360100EC290F80AD49D5230@eu1rdcrdc1wx030.exi.nxp.com> (raw)
In-Reply-To: <AANLkTikbKwo9=xLWo1qEcc2E5aa2iN2F_KCokJPpnWOk@mail.gmail.com>
> + if (spi->mode & SPI_CPOL)
> + tmp = SSP_CLK_POL_IDLE_HIGH;
> + else
> + tmp = SSP_CLK_POL_IDLE_LOW;
> + SSP_WRITE_BITS(chip->cr0, tmp, SSP_CR0_MASK_SPO, 6);
> +
> + if (spi->mode & SPI_CPHA)
> + tmp = SSP_CLK_SECOND_EDGE;
> + else
> + tmp = SSP_CLK_FIRST_EDGE;
> + SSP_WRITE_BITS(chip->cr0, tmp, SSP_CR0_MASK_SPH, 6);
SSP_CR0_MASK_SPH (SPHA) should use bit 7, not bit 6.
Should be:
SSP_WRITE_BITS(chip->cr0, tmp, SSP_CR0_MASK_SPH, 7);
> +
> SSP_WRITE_BITS(chip->cr0, chip_info->clk_freq.scr, SSP_CR0_MASK_SCR,
> 8);
> /* Loopback is available on all versions except PL023 */
WARNING: multiple messages have this Message-ID (diff)
From: Kevin Wells <kevin.wells-3arQi8VN3Tc@public.gmane.org>
To: Kevin Wells <wellsk40-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
"sameo-VuQAYsv1563Yd54FQh9/CA@public.gmane.org"
<sameo-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>,
"rabin.vincent-0IS4wlFg1OjSUeElwK9/Pw@public.gmane.org"
<rabin.vincent-0IS4wlFg1OjSUeElwK9/Pw@public.gmane.org>,
"linus.walleij-0IS4wlFg1OjSUeElwK9/Pw@public.gmane.org" <linus
Cc: "Lukasz.Baj-++hxYGjEMp0AvxtiuMwx3w@public.gmane.org"
<Lukasz.Baj-++hxYGjEMp0AvxtiuMwx3w@public.gmane.org>
Subject: RE: resend: [PATCH] amba_pl022: Setup SPI configuration based on spi->mode
Date: Mon, 13 Sep 2010 18:51:57 +0200 [thread overview]
Message-ID: <083DF309106F364B939360100EC290F80AD49D5230@eu1rdcrdc1wx030.exi.nxp.com> (raw)
In-Reply-To: <AANLkTikbKwo9=xLWo1qEcc2E5aa2iN2F_KCokJPpnWOk-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
> + if (spi->mode & SPI_CPOL)
> + tmp = SSP_CLK_POL_IDLE_HIGH;
> + else
> + tmp = SSP_CLK_POL_IDLE_LOW;
> + SSP_WRITE_BITS(chip->cr0, tmp, SSP_CR0_MASK_SPO, 6);
> +
> + if (spi->mode & SPI_CPHA)
> + tmp = SSP_CLK_SECOND_EDGE;
> + else
> + tmp = SSP_CLK_FIRST_EDGE;
> + SSP_WRITE_BITS(chip->cr0, tmp, SSP_CR0_MASK_SPH, 6);
SSP_CR0_MASK_SPH (SPHA) should use bit 7, not bit 6.
Should be:
SSP_WRITE_BITS(chip->cr0, tmp, SSP_CR0_MASK_SPH, 7);
> +
> SSP_WRITE_BITS(chip->cr0, chip_info->clk_freq.scr, SSP_CR0_MASK_SCR,
> 8);
> /* Loopback is available on all versions except PL023 */
------------------------------------------------------------------------------
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WARNING: multiple messages have this Message-ID (diff)
From: kevin.wells@nxp.com (Kevin Wells)
To: linux-arm-kernel@lists.infradead.org
Subject: resend: [PATCH] amba_pl022: Setup SPI configuration based on spi->mode
Date: Mon, 13 Sep 2010 18:51:57 +0200 [thread overview]
Message-ID: <083DF309106F364B939360100EC290F80AD49D5230@eu1rdcrdc1wx030.exi.nxp.com> (raw)
In-Reply-To: <AANLkTikbKwo9=xLWo1qEcc2E5aa2iN2F_KCokJPpnWOk@mail.gmail.com>
> + ? ? ? if (spi->mode & SPI_CPOL)
> + ? ? ? ? ? ? ? tmp = SSP_CLK_POL_IDLE_HIGH;
> + ? ? ? else
> + ? ? ? ? ? ? ? tmp = SSP_CLK_POL_IDLE_LOW;
> + ? ? ? SSP_WRITE_BITS(chip->cr0, tmp, SSP_CR0_MASK_SPO, 6);
> +
> + ? ? ? if (spi->mode & SPI_CPHA)
> + ? ? ? ? ? ? ? tmp = SSP_CLK_SECOND_EDGE;
> + ? ? ? else
> + ? ? ? ? ? ? ? tmp = SSP_CLK_FIRST_EDGE;
> + ? ? ? SSP_WRITE_BITS(chip->cr0, tmp, SSP_CR0_MASK_SPH, 6);
SSP_CR0_MASK_SPH (SPHA) should use bit 7, not bit 6.
Should be:
SSP_WRITE_BITS(chip->cr0, tmp, SSP_CR0_MASK_SPH, 7);
> +
> ? ? ? ?SSP_WRITE_BITS(chip->cr0, chip_info->clk_freq.scr, SSP_CR0_MASK_SCR,
> 8);
> ? ? ? ?/* Loopback is available on all versions except PL023 */
next prev parent reply other threads:[~2010-09-13 16:59 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-09-10 22:57 resend: [PATCH] amba_pl022: Setup SPI configuration based on spi->mode Kevin Wells
2010-09-10 22:57 ` Kevin Wells
2010-09-13 16:51 ` Kevin Wells [this message]
2010-09-13 16:51 ` Kevin Wells
2010-09-13 16:51 ` Kevin Wells
2010-09-14 14:45 ` Linus Walleij
2010-09-14 14:45 ` Linus Walleij
2010-09-14 14:45 ` Linus Walleij
2010-09-16 19:16 ` Kevin Wells
2010-09-16 19:16 ` Kevin Wells
2010-09-16 19:16 ` Kevin Wells
2010-09-10 22:57 Kevin Wells
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