From: Marek Vasut <marex-ynQEQJNshbs@public.gmane.org>
To: spi-devel-general-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org
Cc: Marek Vasut <marex-ynQEQJNshbs@public.gmane.org>,
Fabio Estevam
<fabio.estevam-KZfg59tc24xl57MIdRCFDg@public.gmane.org>,
Shawn Guo <shawn.guo-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
Mark Brown
<broonie-yzvPICuk2AATkU/dhu1WVueM+bqZidxxQQ4Iyu8u01E@public.gmane.org>,
Attila Kinali <attila-HB9FjVmMKa7tRgLqZ5aouw@public.gmane.org>,
Chris Ball <cjb-2X9k7bc8m7Mdnm+yROfE0A@public.gmane.org>,
Dong Aisheng <b29396-KZfg59tc24xl57MIdRCFDg@public.gmane.org>,
Linux ARM kernel
<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>
Subject: [PATCH 03/10 V2] mmc: spi: Add necessary bits into mxs-spi.h
Date: Mon, 23 Jul 2012 22:40:45 +0200 [thread overview]
Message-ID: <1343076052-27312-4-git-send-email-marex@denx.de> (raw)
In-Reply-To: <1343076052-27312-1-git-send-email-marex-ynQEQJNshbs@public.gmane.org>
Add missing register bits and registers into mxs-spi.h .
These will be used by the SPI driver.
Based on previous attempt by:
Fabio Estevam <fabio.estevam-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
Signed-off-by: Fabio Estevam <fabio.estevam-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
Signed-off-by: Marek Vasut <marex-ynQEQJNshbs@public.gmane.org>
Cc: Attila Kinali <attila-HB9FjVmMKa7tRgLqZ5aouw@public.gmane.org>
Cc: Chris Ball <cjb-2X9k7bc8m7Mdnm+yROfE0A@public.gmane.org>
CC: Dong Aisheng <b29396-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
Cc: Grant Likely <grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org>
Cc: Linux ARM kernel <linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>
Cc: Mark Brown <broonie-yzvPICuk2AATkU/dhu1WVueM+bqZidxxQQ4Iyu8u01E@public.gmane.org>
CC: Shawn Guo <shawn.guo-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
---
include/linux/spi/mxs-spi.h | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
V2: Location of HW_SSP_DATA register differs on MX233 and MX28,
handle accordingly. (Thanks to Attila Kinali for finding this).
diff --git a/include/linux/spi/mxs-spi.h b/include/linux/spi/mxs-spi.h
index c08aef5..7dfa1d7 100644
--- a/include/linux/spi/mxs-spi.h
+++ b/include/linux/spi/mxs-spi.h
@@ -30,12 +30,14 @@
#define HW_SSP_CTRL0 0x000
#define BM_SSP_CTRL0_RUN (1 << 29)
#define BM_SSP_CTRL0_SDIO_IRQ_CHECK (1 << 28)
+#define BM_SSP_CTRL0_LOCK_CS (1 << 27)
#define BM_SSP_CTRL0_IGNORE_CRC (1 << 26)
#define BM_SSP_CTRL0_READ (1 << 25)
#define BM_SSP_CTRL0_DATA_XFER (1 << 24)
#define BP_SSP_CTRL0_BUS_WIDTH 22
#define BM_SSP_CTRL0_BUS_WIDTH (0x3 << 22)
#define BM_SSP_CTRL0_WAIT_FOR_IRQ (1 << 21)
+#define BM_SSP_CTRL0_WAIT_FOR_CMD (1 << 20)
#define BM_SSP_CTRL0_LONG_RESP (1 << 19)
#define BM_SSP_CTRL0_GET_RESP (1 << 17)
#define BM_SSP_CTRL0_ENABLE (1 << 16)
@@ -64,8 +66,12 @@
#define BM_SSP_TIMING_TIMEOUT (0xffff << 16)
#define BP_SSP_TIMING_CLOCK_DIVIDE 8
#define BM_SSP_TIMING_CLOCK_DIVIDE (0xff << 8)
+#define BF_SSP_TIMING_CLOCK_DIVIDE(v) \
+ (((v) << 8) & BM_SSP_TIMING_CLOCK_DIVIDE)
#define BP_SSP_TIMING_CLOCK_RATE 0
#define BM_SSP_TIMING_CLOCK_RATE 0xff
+#define BF_SSP_TIMING_CLOCK_RATE(v) \
+ (((v) << 0) & BM_SSP_TIMING_CLOCK_RATE)
#define HW_SSP_CTRL1(h) (ssp_is_old(h) ? 0x060 : 0x080)
#define BM_SSP_CTRL1_SDIO_IRQ (1 << 31)
#define BM_SSP_CTRL1_SDIO_IRQ_EN (1 << 30)
@@ -84,11 +90,26 @@
#define BM_SSP_CTRL1_FIFO_OVERRUN_IRQ (1 << 15)
#define BM_SSP_CTRL1_FIFO_OVERRUN_IRQ_EN (1 << 14)
#define BM_SSP_CTRL1_DMA_ENABLE (1 << 13)
+#define BM_SSP_CTRL1_PHASE (1 << 10)
#define BM_SSP_CTRL1_POLARITY (1 << 9)
#define BP_SSP_CTRL1_WORD_LENGTH 4
#define BM_SSP_CTRL1_WORD_LENGTH (0xf << 4)
+#define BF_SSP_CTRL1_WORD_LENGTH(v) \
+ (((v) << 4) & BM_SSP_CTRL1_WORD_LENGTH)
+#define BV_SSP_CTRL1_WORD_LENGTH__FOUR_BITS 0x3
+#define BV_SSP_CTRL1_WORD_LENGTH__EIGHT_BITS 0x7
+#define BV_SSP_CTRL1_WORD_LENGTH__SIXTEEN_BITS 0xF
#define BP_SSP_CTRL1_SSP_MODE 0
#define BM_SSP_CTRL1_SSP_MODE 0xf
+#define BF_SSP_CTRL1_SSP_MODE(v) \
+ (((v) << 0) & BM_SSP_CTRL1_SSP_MODE)
+#define BV_SSP_CTRL1_SSP_MODE__SPI 0x0
+#define BV_SSP_CTRL1_SSP_MODE__SSI 0x1
+#define BV_SSP_CTRL1_SSP_MODE__SD_MMC 0x3
+#define BV_SSP_CTRL1_SSP_MODE__MS 0x4
+
+#define HW_SSP_DATA(h) (ssp_is_old(h) ? 0x070 : 0x090)
+
#define HW_SSP_SDRESP0(h) (ssp_is_old(h) ? 0x080 : 0x0a0)
#define HW_SSP_SDRESP1(h) (ssp_is_old(h) ? 0x090 : 0x0b0)
#define HW_SSP_SDRESP2(h) (ssp_is_old(h) ? 0x0a0 : 0x0c0)
@@ -96,6 +117,7 @@
#define HW_SSP_STATUS(h) (ssp_is_old(h) ? 0x0c0 : 0x100)
#define BM_SSP_STATUS_CARD_DETECT (1 << 28)
#define BM_SSP_STATUS_SDIO_IRQ (1 << 17)
+#define BM_SSP_STATUS_FIFO_EMPTY (1 << 5)
#define BF_SSP(value, field) (((value) << BP_SSP_##field) & BM_SSP_##field)
--
1.7.10.4
------------------------------------------------------------------------------
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WARNING: multiple messages have this Message-ID (diff)
From: marex@denx.de (Marek Vasut)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 03/10 V2] mmc: spi: Add necessary bits into mxs-spi.h
Date: Mon, 23 Jul 2012 22:40:45 +0200 [thread overview]
Message-ID: <1343076052-27312-4-git-send-email-marex@denx.de> (raw)
In-Reply-To: <1343076052-27312-1-git-send-email-marex@denx.de>
Add missing register bits and registers into mxs-spi.h .
These will be used by the SPI driver.
Based on previous attempt by:
Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Attila Kinali <attila@kinali.ch>
Cc: Chris Ball <cjb@laptop.org>
CC: Dong Aisheng <b29396@freescale.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Linux ARM kernel <linux-arm-kernel@lists.infradead.org>
Cc: Mark Brown <broonie@opensource.wolfsonmicro.com>
CC: Shawn Guo <shawn.guo@linaro.org>
---
include/linux/spi/mxs-spi.h | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
V2: Location of HW_SSP_DATA register differs on MX233 and MX28,
handle accordingly. (Thanks to Attila Kinali for finding this).
diff --git a/include/linux/spi/mxs-spi.h b/include/linux/spi/mxs-spi.h
index c08aef5..7dfa1d7 100644
--- a/include/linux/spi/mxs-spi.h
+++ b/include/linux/spi/mxs-spi.h
@@ -30,12 +30,14 @@
#define HW_SSP_CTRL0 0x000
#define BM_SSP_CTRL0_RUN (1 << 29)
#define BM_SSP_CTRL0_SDIO_IRQ_CHECK (1 << 28)
+#define BM_SSP_CTRL0_LOCK_CS (1 << 27)
#define BM_SSP_CTRL0_IGNORE_CRC (1 << 26)
#define BM_SSP_CTRL0_READ (1 << 25)
#define BM_SSP_CTRL0_DATA_XFER (1 << 24)
#define BP_SSP_CTRL0_BUS_WIDTH 22
#define BM_SSP_CTRL0_BUS_WIDTH (0x3 << 22)
#define BM_SSP_CTRL0_WAIT_FOR_IRQ (1 << 21)
+#define BM_SSP_CTRL0_WAIT_FOR_CMD (1 << 20)
#define BM_SSP_CTRL0_LONG_RESP (1 << 19)
#define BM_SSP_CTRL0_GET_RESP (1 << 17)
#define BM_SSP_CTRL0_ENABLE (1 << 16)
@@ -64,8 +66,12 @@
#define BM_SSP_TIMING_TIMEOUT (0xffff << 16)
#define BP_SSP_TIMING_CLOCK_DIVIDE 8
#define BM_SSP_TIMING_CLOCK_DIVIDE (0xff << 8)
+#define BF_SSP_TIMING_CLOCK_DIVIDE(v) \
+ (((v) << 8) & BM_SSP_TIMING_CLOCK_DIVIDE)
#define BP_SSP_TIMING_CLOCK_RATE 0
#define BM_SSP_TIMING_CLOCK_RATE 0xff
+#define BF_SSP_TIMING_CLOCK_RATE(v) \
+ (((v) << 0) & BM_SSP_TIMING_CLOCK_RATE)
#define HW_SSP_CTRL1(h) (ssp_is_old(h) ? 0x060 : 0x080)
#define BM_SSP_CTRL1_SDIO_IRQ (1 << 31)
#define BM_SSP_CTRL1_SDIO_IRQ_EN (1 << 30)
@@ -84,11 +90,26 @@
#define BM_SSP_CTRL1_FIFO_OVERRUN_IRQ (1 << 15)
#define BM_SSP_CTRL1_FIFO_OVERRUN_IRQ_EN (1 << 14)
#define BM_SSP_CTRL1_DMA_ENABLE (1 << 13)
+#define BM_SSP_CTRL1_PHASE (1 << 10)
#define BM_SSP_CTRL1_POLARITY (1 << 9)
#define BP_SSP_CTRL1_WORD_LENGTH 4
#define BM_SSP_CTRL1_WORD_LENGTH (0xf << 4)
+#define BF_SSP_CTRL1_WORD_LENGTH(v) \
+ (((v) << 4) & BM_SSP_CTRL1_WORD_LENGTH)
+#define BV_SSP_CTRL1_WORD_LENGTH__FOUR_BITS 0x3
+#define BV_SSP_CTRL1_WORD_LENGTH__EIGHT_BITS 0x7
+#define BV_SSP_CTRL1_WORD_LENGTH__SIXTEEN_BITS 0xF
#define BP_SSP_CTRL1_SSP_MODE 0
#define BM_SSP_CTRL1_SSP_MODE 0xf
+#define BF_SSP_CTRL1_SSP_MODE(v) \
+ (((v) << 0) & BM_SSP_CTRL1_SSP_MODE)
+#define BV_SSP_CTRL1_SSP_MODE__SPI 0x0
+#define BV_SSP_CTRL1_SSP_MODE__SSI 0x1
+#define BV_SSP_CTRL1_SSP_MODE__SD_MMC 0x3
+#define BV_SSP_CTRL1_SSP_MODE__MS 0x4
+
+#define HW_SSP_DATA(h) (ssp_is_old(h) ? 0x070 : 0x090)
+
#define HW_SSP_SDRESP0(h) (ssp_is_old(h) ? 0x080 : 0x0a0)
#define HW_SSP_SDRESP1(h) (ssp_is_old(h) ? 0x090 : 0x0b0)
#define HW_SSP_SDRESP2(h) (ssp_is_old(h) ? 0x0a0 : 0x0c0)
@@ -96,6 +117,7 @@
#define HW_SSP_STATUS(h) (ssp_is_old(h) ? 0x0c0 : 0x100)
#define BM_SSP_STATUS_CARD_DETECT (1 << 28)
#define BM_SSP_STATUS_SDIO_IRQ (1 << 17)
+#define BM_SSP_STATUS_FIFO_EMPTY (1 << 5)
#define BF_SSP(value, field) (((value) << BP_SSP_##field) & BM_SSP_##field)
--
1.7.10.4
next prev parent reply other threads:[~2012-07-23 20:40 UTC|newest]
Thread overview: 60+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-07-23 20:40 [PATCH 00/10 V2] MXS SPI driver Marek Vasut
2012-07-23 20:40 ` Marek Vasut
[not found] ` <1343076052-27312-1-git-send-email-marex-ynQEQJNshbs@public.gmane.org>
2012-07-23 20:40 ` [PATCH 01/10 RESEND] mmc: spi: Move SSP register definitions into separate file Marek Vasut
2012-07-23 20:40 ` Marek Vasut
2012-07-23 20:40 ` [PATCH 02/10 RESEND] mmc: spi: Rename IMX2[38]_MMC to IMX2[38]_SSP Marek Vasut
2012-07-23 20:40 ` Marek Vasut
2012-07-23 20:40 ` Marek Vasut [this message]
2012-07-23 20:40 ` [PATCH 03/10 V2] mmc: spi: Add necessary bits into mxs-spi.h Marek Vasut
2012-07-23 20:40 ` [PATCH 04/10 RESEND] mmc: spi: Pull out parts shared between MMC and SPI Marek Vasut
2012-07-23 20:40 ` Marek Vasut
2012-07-23 20:40 ` [PATCH 05/10 V2] mmc: spi: Pull out the SSP clock configuration function Marek Vasut
2012-07-23 20:40 ` Marek Vasut
2012-07-23 20:40 ` [PATCH 06/10 V2] spi: Add SPI driver for mx233/mx28 Marek Vasut
2012-07-23 20:40 ` Marek Vasut
[not found] ` <1343076052-27312-7-git-send-email-marex-ynQEQJNshbs@public.gmane.org>
2012-08-01 20:31 ` Mark Brown
2012-08-01 20:31 ` Mark Brown
[not found] ` <20120801203106.GW4483-yzvPICuk2AATkU/dhu1WVueM+bqZidxxQQ4Iyu8u01E@public.gmane.org>
2012-08-02 14:58 ` Marek Vasut
2012-08-02 14:58 ` Marek Vasut
[not found] ` <201208021658.38237.marex-ynQEQJNshbs@public.gmane.org>
2012-08-02 16:00 ` Mark Brown
2012-08-02 16:00 ` Mark Brown
[not found] ` <20120802160016.GA4537-yzvPICuk2AATkU/dhu1WVueM+bqZidxxQQ4Iyu8u01E@public.gmane.org>
2012-08-02 16:03 ` Marek Vasut
2012-08-02 16:03 ` Marek Vasut
2012-08-03 1:29 ` Shawn Guo
2012-08-03 1:29 ` Shawn Guo
2012-08-03 13:38 ` Thomas Petazzoni
2012-08-03 13:38 ` Thomas Petazzoni
2012-08-03 13:46 ` Fabio Estevam
2012-08-03 13:46 ` Fabio Estevam
[not found] ` <CAOMZO5AQs1NzJBogcLPcKtY=QSaxpDmzUTvpfScY7P10FEoMJw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2012-08-03 13:49 ` Marek Vasut
2012-08-03 13:49 ` Marek Vasut
2012-08-03 14:00 ` Marek Vasut
2012-08-03 14:00 ` Marek Vasut
2012-07-23 20:40 ` [PATCH 07/10 RESEND] mmc: spi: Pull out common DMA parts from MXS MMC Marek Vasut
2012-07-23 20:40 ` Marek Vasut
2012-07-23 20:40 ` [PATCH 08/10 RESEND] spi: Add DMA support into SPI driver Marek Vasut
2012-07-23 20:40 ` Marek Vasut
[not found] ` <1343076052-27312-9-git-send-email-marex-ynQEQJNshbs@public.gmane.org>
2012-08-01 20:34 ` Mark Brown
2012-08-01 20:34 ` Mark Brown
[not found] ` <20120801203448.GX4483-yzvPICuk2AATkU/dhu1WVueM+bqZidxxQQ4Iyu8u01E@public.gmane.org>
2012-08-02 15:00 ` Marek Vasut
2012-08-02 15:00 ` Marek Vasut
2012-07-23 20:40 ` [PATCH 09/10 RESEND] spi: Add SSP/SPI device tree documentation Marek Vasut
2012-07-23 20:40 ` Marek Vasut
2012-07-24 18:15 ` Sergei Shtylyov
2012-07-24 18:15 ` Sergei Shtylyov
[not found] ` <500EE64B.8080103-Igf4POYTYCDQT0dZR+AlfA@public.gmane.org>
2012-07-24 19:43 ` Marek Vasut
2012-07-24 19:43 ` Marek Vasut
[not found] ` <201207242143.49038.marex-ynQEQJNshbs@public.gmane.org>
2012-07-28 11:40 ` Shawn Guo
2012-07-28 11:40 ` Shawn Guo
[not found] ` <20120728113957.GE2128-rvtDTF3kK1ictlrPMvKcciBecyulp+rMXqFh9Ls21Oc@public.gmane.org>
2012-07-28 11:42 ` Marek Vasut
2012-07-28 11:42 ` Marek Vasut
2012-07-23 20:40 ` [PATCH 10/10 RESEND] ARM: mx28: Add SPI pinmux into imx28.dtsi Marek Vasut
2012-07-23 20:40 ` Marek Vasut
2012-07-24 9:25 ` [PATCH 00/10 V2] MXS SPI driver Attila Kinali
2012-07-24 9:25 ` Attila Kinali
2012-08-03 14:30 ` [PATCH] SPI: MXS: Allow to pass the SPI master bus number from the device tree Maxime Ripard
2012-08-03 14:30 ` Maxime Ripard
[not found] ` <1344004239-22868-1-git-send-email-maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2012-08-03 14:43 ` Shawn Guo
2012-08-03 14:43 ` Shawn Guo
[not found] ` <20120803144326.GE23791-rvtDTF3kK1ictlrPMvKcciBecyulp+rMXqFh9Ls21Oc@public.gmane.org>
2012-08-03 16:27 ` Maxime Ripard
2012-08-03 16:27 ` Maxime Ripard
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