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From: Robert Bragg <robert@sixbynine.org>
To: intel-gfx@lists.freedesktop.org
Cc: Daniel Vetter <daniel.vetter@intel.com>,
	Jani Nikula <jani.nikula@linux.intel.com>,
	David Airlie <airlied@linux.ie>,
	Peter Zijlstra <a.p.zijlstra@chello.nl>,
	Paul Mackerras <paulus@samba.org>, Ingo Molnar <mingo@redhat.com>,
	Arnaldo Carvalho de Melo <acme@kernel.org>,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	linux-api@vger.kernel.org
Subject: [RFC PATCH 06/11] drm/i915: rename OACONTROL GEN7_OACONTROL
Date: Thu,  7 May 2015 15:15:49 +0100	[thread overview]
Message-ID: <1431008154-6833-7-git-send-email-robert@sixbynine.org> (raw)
In-Reply-To: <1431008154-6833-1-git-send-email-robert@sixbynine.org>

OACONTROL changes quite a bit for gen8, with some bits split out into a
per-context OACTXCONTROL register

Signed-off-by: Robert Bragg <robert@sixbynine.org>
---
 drivers/gpu/drm/i915/i915_cmd_parser.c | 4 ++--
 drivers/gpu/drm/i915/i915_reg.h        | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.c b/drivers/gpu/drm/i915/i915_cmd_parser.c
index 9605ff8..f7ef20c 100644
--- a/drivers/gpu/drm/i915/i915_cmd_parser.c
+++ b/drivers/gpu/drm/i915/i915_cmd_parser.c
@@ -417,7 +417,7 @@ static const u32 gen7_render_regs[] = {
 	REG64(CL_PRIMITIVES_COUNT),
 	REG64(PS_INVOCATION_COUNT),
 	REG64(PS_DEPTH_COUNT),
-	OACONTROL, /* Only allowed for LRI and SRM. See below. */
+	GEN7_OACONTROL, /* Only allowed for LRI and SRM. See below. */
 	REG64(MI_PREDICATE_SRC0),
 	REG64(MI_PREDICATE_SRC1),
 	GEN7_3DPRIM_END_OFFSET,
@@ -961,7 +961,7 @@ static bool check_cmd(const struct intel_engine_cs *ring,
 		 * that will be written to the register. Hence, limit
 		 * OACONTROL writes to only MI_LOAD_REGISTER_IMM commands.
 		 */
-		if (reg_addr == OACONTROL) {
+		if (reg_addr == GEN7_OACONTROL) {
 			if (desc->cmd.value == MI_LOAD_REGISTER_MEM) {
 				DRM_DEBUG_DRIVER("CMD: Rejected LRM to OACONTROL\n");
 				return false;
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index d47afbc..2fa1669 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -515,7 +515,7 @@
 #define GEN7_3DPRIM_START_INSTANCE      0x243C
 #define GEN7_3DPRIM_BASE_VERTEX         0x2440
 
-#define OACONTROL 0x2360
+#define GEN7_OACONTROL 0x2360
 
 #define _GEN7_PIPEA_DE_LOAD_SL	0x70068
 #define _GEN7_PIPEB_DE_LOAD_SL	0x71068
-- 
2.3.2


WARNING: multiple messages have this Message-ID (diff)
From: Robert Bragg <robert@sixbynine.org>
To: intel-gfx@lists.freedesktop.org
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>,
	David Airlie <airlied@linux.ie>,
	linux-api@vger.kernel.org, dri-devel@lists.freedesktop.org,
	linux-kernel@vger.kernel.org, Ingo Molnar <mingo@redhat.com>,
	Paul Mackerras <paulus@samba.org>,
	Arnaldo Carvalho de Melo <acme@kernel.org>,
	Daniel Vetter <daniel.vetter@intel.com>
Subject: [RFC PATCH 06/11] drm/i915: rename OACONTROL GEN7_OACONTROL
Date: Thu,  7 May 2015 15:15:49 +0100	[thread overview]
Message-ID: <1431008154-6833-7-git-send-email-robert@sixbynine.org> (raw)
In-Reply-To: <1431008154-6833-1-git-send-email-robert@sixbynine.org>

OACONTROL changes quite a bit for gen8, with some bits split out into a
per-context OACTXCONTROL register

Signed-off-by: Robert Bragg <robert@sixbynine.org>
---
 drivers/gpu/drm/i915/i915_cmd_parser.c | 4 ++--
 drivers/gpu/drm/i915/i915_reg.h        | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.c b/drivers/gpu/drm/i915/i915_cmd_parser.c
index 9605ff8..f7ef20c 100644
--- a/drivers/gpu/drm/i915/i915_cmd_parser.c
+++ b/drivers/gpu/drm/i915/i915_cmd_parser.c
@@ -417,7 +417,7 @@ static const u32 gen7_render_regs[] = {
 	REG64(CL_PRIMITIVES_COUNT),
 	REG64(PS_INVOCATION_COUNT),
 	REG64(PS_DEPTH_COUNT),
-	OACONTROL, /* Only allowed for LRI and SRM. See below. */
+	GEN7_OACONTROL, /* Only allowed for LRI and SRM. See below. */
 	REG64(MI_PREDICATE_SRC0),
 	REG64(MI_PREDICATE_SRC1),
 	GEN7_3DPRIM_END_OFFSET,
@@ -961,7 +961,7 @@ static bool check_cmd(const struct intel_engine_cs *ring,
 		 * that will be written to the register. Hence, limit
 		 * OACONTROL writes to only MI_LOAD_REGISTER_IMM commands.
 		 */
-		if (reg_addr == OACONTROL) {
+		if (reg_addr == GEN7_OACONTROL) {
 			if (desc->cmd.value == MI_LOAD_REGISTER_MEM) {
 				DRM_DEBUG_DRIVER("CMD: Rejected LRM to OACONTROL\n");
 				return false;
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index d47afbc..2fa1669 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -515,7 +515,7 @@
 #define GEN7_3DPRIM_START_INSTANCE      0x243C
 #define GEN7_3DPRIM_BASE_VERTEX         0x2440
 
-#define OACONTROL 0x2360
+#define GEN7_OACONTROL 0x2360
 
 #define _GEN7_PIPEA_DE_LOAD_SL	0x70068
 #define _GEN7_PIPEB_DE_LOAD_SL	0x71068
-- 
2.3.2

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2015-05-07 14:17 UTC|newest]

Thread overview: 63+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-05-07 14:15 [RFC PATCH 00/11] drm/i915: Expose OA metrics via perf PMU Robert Bragg
2015-05-07 14:15 ` Robert Bragg
2015-05-07 14:15 ` [RFC PATCH 01/11] perf: export perf_event_overflow Robert Bragg
2015-05-07 14:15   ` Robert Bragg
2015-05-07 14:15 ` [RFC PATCH 02/11] perf: Add PERF_PMU_CAP_IS_DEVICE flag Robert Bragg
2015-05-07 14:15   ` Robert Bragg
2015-05-07 14:15 ` [RFC PATCH 03/11] perf: Add PERF_EVENT_IOC_FLUSH ioctl Robert Bragg
2015-05-07 14:15   ` Robert Bragg
2015-05-07 14:20   ` [Intel-gfx] " Chris Wilson
2015-05-07 14:20     ` Chris Wilson
2015-05-18 17:25     ` [RFC PATCH v2] " Robert Bragg
2015-05-18 17:25       ` Robert Bragg
2015-05-20 12:12       ` Ingo Molnar
2015-05-20 12:12         ` Ingo Molnar
2015-05-21 17:40         ` [RFC PATCH] perf: enable fsync to flush buffered samples Robert Bragg
2015-05-21 17:40           ` Robert Bragg
2015-05-07 14:15 ` [RFC PATCH 04/11] perf: Add a PERF_RECORD_DEVICE event type Robert Bragg
2015-05-07 14:15   ` Robert Bragg
2015-05-07 14:15 ` [RFC PATCH 05/11] perf: allow drivers more control over event logging Robert Bragg
2015-05-07 14:15   ` Robert Bragg
2015-05-07 14:15 ` Robert Bragg [this message]
2015-05-07 14:15   ` [RFC PATCH 06/11] drm/i915: rename OACONTROL GEN7_OACONTROL Robert Bragg
2015-05-07 14:15 ` [RFC PATCH 07/11] drm/i915: Expose PMU for Observation Architecture Robert Bragg
2015-05-07 14:15   ` Robert Bragg
2015-05-07 14:36   ` [Intel-gfx] " Chris Wilson
2015-05-07 14:36     ` Chris Wilson
2015-05-18 16:21     ` Robert Bragg
2015-05-07 14:58   ` [Intel-gfx] " Chris Wilson
2015-05-07 14:58     ` Chris Wilson
2015-05-18 16:36     ` Robert Bragg
2015-05-18 16:36       ` Robert Bragg
2015-05-18 17:17       ` [RFC PATCH v2] " Robert Bragg
2015-05-18 17:17         ` Robert Bragg
2015-05-18 17:21       ` [RFC PATCH] squash: be more careful stopping oacontrol updates Robert Bragg
2015-05-18 17:21         ` Robert Bragg
2015-05-07 14:15 ` [RFC PATCH 08/11] drm/i915: add OA config for 3D render counters Robert Bragg
2015-05-07 14:15   ` Robert Bragg
2015-05-07 14:15 ` [RFC PATCH 09/11] drm/i915: Add dev.i915.oa_event_paranoid sysctl option Robert Bragg
2015-05-07 14:15   ` Robert Bragg
2015-05-07 14:15 ` [RFC PATCH 10/11] drm/i915: report OA buf overrun + report lost status Robert Bragg
2015-05-07 14:15   ` Robert Bragg
2015-05-07 14:15 ` [RFC PATCH 11/11] WIP: drm/i915: constrain unit gating while using OA Robert Bragg
2015-05-07 14:15   ` Robert Bragg
2015-05-08 16:21 ` [RFC PATCH 00/11] drm/i915: Expose OA metrics via perf PMU Peter Zijlstra
2015-05-08 16:21   ` Peter Zijlstra
2015-05-18 17:29   ` Robert Bragg
2015-05-18 17:29     ` Robert Bragg
2015-05-08 16:24 ` Peter Zijlstra
2015-05-08 16:24   ` Peter Zijlstra
2015-05-15  1:07   ` Robert Bragg
2015-05-15  1:07     ` Robert Bragg
2015-05-19 14:53     ` Peter Zijlstra
2015-05-19 14:53       ` Peter Zijlstra
2015-05-20 23:17       ` Robert Bragg
2015-05-20 23:17         ` Robert Bragg
2015-05-21  8:24         ` [Intel-gfx] " Daniel Vetter
2015-05-21  8:24           ` Daniel Vetter
2015-05-27 15:39         ` Peter Zijlstra
2015-05-27 15:39           ` Peter Zijlstra
2015-05-27 16:41           ` Ingo Molnar
2015-05-27 16:41             ` Ingo Molnar
2015-06-04 18:53           ` [Intel-gfx] " Robert Bragg
2015-06-04 18:53             ` Robert Bragg

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