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From: Robert Bragg <robert@sixbynine.org>
To: Peter Zijlstra <peterz@infradead.org>
Cc: intel-gfx@lists.freedesktop.org,
	Daniel Vetter <daniel.vetter@intel.com>,
	Jani Nikula <jani.nikula@linux.intel.com>,
	David Airlie <airlied@linux.ie>,
	Paul Mackerras <paulus@samba.org>, Ingo Molnar <mingo@redhat.com>,
	Arnaldo Carvalho de Melo <acme@kernel.org>,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	linux-api@vger.kernel.org
Subject: Re: [RFC PATCH 00/11] drm/i915: Expose OA metrics via perf PMU
Date: Mon, 18 May 2015 18:29:57 +0100	[thread overview]
Message-ID: <CAMou1-0HyDwn2dV-Ay-MaFseRm4-Qfog_mjv0f=x-VxtiFi6ZQ@mail.gmail.com> (raw)
In-Reply-To: <20150508162143.GQ27504@twins.programming.kicks-ass.net>

On Fri, May 8, 2015 at 5:21 PM, Peter Zijlstra <peterz@infradead.org> wrote:
>
> So I've not yet went through the entire series; but I'm wondering if its
> at all possible to re-use some of this work:
>
> lkml.kernel.org/r/1428453299-19121-1-git-send-email-sukadev@linux.vnet.ibm.com
>
> That's for a Power8 HV call that can basically return an array of
> values; which on a superficial level sounds a bit like what this GPU
> hardware does.

Thanks for this pointer.

I think the main similarity here is the ability to capture multiple
counters consistent for the same point in time, but in our case we
don't have an explicitly controlled transaction mechanism like this.

Although we can collect a large set of counters in a latched fashion -
so they are self consistent - the selection of counters included in
our OA unit reports is more rigid.

Most of our counters aren't independently aggregated, they are derived
from signals selected as part of the OA unit configuration and the
values are only maintained by the OA unit itself, so a
re-configuration to select different signals will discard the counter
values of currently selected signals.

afik re-configuring our signal selection is also relatively slow too
(I was told this last week at least, but I haven't tested it myself)
and so it's really geared towards applications or tools choosing a
configuration to maintain for a relatively long time while profiling a
workload.

I think the other big difference here is that we don't have a way to
explicitly trigger a report to be written from the cpu. (Although we
can read the OA counters via mmio, it's only intended for debug
purposes as this subverts the hw latching of counters) This means it
would be difficult to try and treat this like a transaction including
a fixed set of event->read()s without a way for pmu->commit_txn() to
trigger a report.

>
> Let me read more of this..

Thanks.

- Robert

WARNING: multiple messages have this Message-ID (diff)
From: Robert Bragg <robert@sixbynine.org>
To: Peter Zijlstra <peterz@infradead.org>
Cc: dri-devel@lists.freedesktop.org, David Airlie <airlied@linux.ie>,
	linux-api@vger.kernel.org, intel-gfx@lists.freedesktop.org,
	linux-kernel@vger.kernel.org, Ingo Molnar <mingo@redhat.com>,
	Paul Mackerras <paulus@samba.org>,
	Arnaldo Carvalho de Melo <acme@kernel.org>,
	Daniel Vetter <daniel.vetter@intel.com>
Subject: Re: [RFC PATCH 00/11] drm/i915: Expose OA metrics via perf PMU
Date: Mon, 18 May 2015 18:29:57 +0100	[thread overview]
Message-ID: <CAMou1-0HyDwn2dV-Ay-MaFseRm4-Qfog_mjv0f=x-VxtiFi6ZQ@mail.gmail.com> (raw)
In-Reply-To: <20150508162143.GQ27504@twins.programming.kicks-ass.net>

On Fri, May 8, 2015 at 5:21 PM, Peter Zijlstra <peterz@infradead.org> wrote:
>
> So I've not yet went through the entire series; but I'm wondering if its
> at all possible to re-use some of this work:
>
> lkml.kernel.org/r/1428453299-19121-1-git-send-email-sukadev@linux.vnet.ibm.com
>
> That's for a Power8 HV call that can basically return an array of
> values; which on a superficial level sounds a bit like what this GPU
> hardware does.

Thanks for this pointer.

I think the main similarity here is the ability to capture multiple
counters consistent for the same point in time, but in our case we
don't have an explicitly controlled transaction mechanism like this.

Although we can collect a large set of counters in a latched fashion -
so they are self consistent - the selection of counters included in
our OA unit reports is more rigid.

Most of our counters aren't independently aggregated, they are derived
from signals selected as part of the OA unit configuration and the
values are only maintained by the OA unit itself, so a
re-configuration to select different signals will discard the counter
values of currently selected signals.

afik re-configuring our signal selection is also relatively slow too
(I was told this last week at least, but I haven't tested it myself)
and so it's really geared towards applications or tools choosing a
configuration to maintain for a relatively long time while profiling a
workload.

I think the other big difference here is that we don't have a way to
explicitly trigger a report to be written from the cpu. (Although we
can read the OA counters via mmio, it's only intended for debug
purposes as this subverts the hw latching of counters) This means it
would be difficult to try and treat this like a transaction including
a fixed set of event->read()s without a way for pmu->commit_txn() to
trigger a report.

>
> Let me read more of this..

Thanks.

- Robert
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2015-05-18 17:30 UTC|newest]

Thread overview: 63+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-05-07 14:15 [RFC PATCH 00/11] drm/i915: Expose OA metrics via perf PMU Robert Bragg
2015-05-07 14:15 ` Robert Bragg
2015-05-07 14:15 ` [RFC PATCH 01/11] perf: export perf_event_overflow Robert Bragg
2015-05-07 14:15   ` Robert Bragg
2015-05-07 14:15 ` [RFC PATCH 02/11] perf: Add PERF_PMU_CAP_IS_DEVICE flag Robert Bragg
2015-05-07 14:15   ` Robert Bragg
2015-05-07 14:15 ` [RFC PATCH 03/11] perf: Add PERF_EVENT_IOC_FLUSH ioctl Robert Bragg
2015-05-07 14:15   ` Robert Bragg
2015-05-07 14:20   ` [Intel-gfx] " Chris Wilson
2015-05-07 14:20     ` Chris Wilson
2015-05-18 17:25     ` [RFC PATCH v2] " Robert Bragg
2015-05-18 17:25       ` Robert Bragg
2015-05-20 12:12       ` Ingo Molnar
2015-05-20 12:12         ` Ingo Molnar
2015-05-21 17:40         ` [RFC PATCH] perf: enable fsync to flush buffered samples Robert Bragg
2015-05-21 17:40           ` Robert Bragg
2015-05-07 14:15 ` [RFC PATCH 04/11] perf: Add a PERF_RECORD_DEVICE event type Robert Bragg
2015-05-07 14:15   ` Robert Bragg
2015-05-07 14:15 ` [RFC PATCH 05/11] perf: allow drivers more control over event logging Robert Bragg
2015-05-07 14:15   ` Robert Bragg
2015-05-07 14:15 ` [RFC PATCH 06/11] drm/i915: rename OACONTROL GEN7_OACONTROL Robert Bragg
2015-05-07 14:15   ` Robert Bragg
2015-05-07 14:15 ` [RFC PATCH 07/11] drm/i915: Expose PMU for Observation Architecture Robert Bragg
2015-05-07 14:15   ` Robert Bragg
2015-05-07 14:36   ` [Intel-gfx] " Chris Wilson
2015-05-07 14:36     ` Chris Wilson
2015-05-18 16:21     ` Robert Bragg
2015-05-07 14:58   ` [Intel-gfx] " Chris Wilson
2015-05-07 14:58     ` Chris Wilson
2015-05-18 16:36     ` Robert Bragg
2015-05-18 16:36       ` Robert Bragg
2015-05-18 17:17       ` [RFC PATCH v2] " Robert Bragg
2015-05-18 17:17         ` Robert Bragg
2015-05-18 17:21       ` [RFC PATCH] squash: be more careful stopping oacontrol updates Robert Bragg
2015-05-18 17:21         ` Robert Bragg
2015-05-07 14:15 ` [RFC PATCH 08/11] drm/i915: add OA config for 3D render counters Robert Bragg
2015-05-07 14:15   ` Robert Bragg
2015-05-07 14:15 ` [RFC PATCH 09/11] drm/i915: Add dev.i915.oa_event_paranoid sysctl option Robert Bragg
2015-05-07 14:15   ` Robert Bragg
2015-05-07 14:15 ` [RFC PATCH 10/11] drm/i915: report OA buf overrun + report lost status Robert Bragg
2015-05-07 14:15   ` Robert Bragg
2015-05-07 14:15 ` [RFC PATCH 11/11] WIP: drm/i915: constrain unit gating while using OA Robert Bragg
2015-05-07 14:15   ` Robert Bragg
2015-05-08 16:21 ` [RFC PATCH 00/11] drm/i915: Expose OA metrics via perf PMU Peter Zijlstra
2015-05-08 16:21   ` Peter Zijlstra
2015-05-18 17:29   ` Robert Bragg [this message]
2015-05-18 17:29     ` Robert Bragg
2015-05-08 16:24 ` Peter Zijlstra
2015-05-08 16:24   ` Peter Zijlstra
2015-05-15  1:07   ` Robert Bragg
2015-05-15  1:07     ` Robert Bragg
2015-05-19 14:53     ` Peter Zijlstra
2015-05-19 14:53       ` Peter Zijlstra
2015-05-20 23:17       ` Robert Bragg
2015-05-20 23:17         ` Robert Bragg
2015-05-21  8:24         ` [Intel-gfx] " Daniel Vetter
2015-05-21  8:24           ` Daniel Vetter
2015-05-27 15:39         ` Peter Zijlstra
2015-05-27 15:39           ` Peter Zijlstra
2015-05-27 16:41           ` Ingo Molnar
2015-05-27 16:41             ` Ingo Molnar
2015-06-04 18:53           ` [Intel-gfx] " Robert Bragg
2015-06-04 18:53             ` Robert Bragg

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