From: Michael Welling <mwelling@ieee.org> To: broonie@kernel.org, linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-next@vger.kernel.org, linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Michael Welling <mwelling@ieee.org> Subject: [PATCH 2/4] spi: omap2-mcspi: Fix set_cs function for active high Date: Sat, 23 May 2015 21:13:43 -0500 [thread overview] Message-ID: <1432433625-23407-3-git-send-email-mwelling@ieee.org> (raw) In-Reply-To: <1432433625-23407-1-git-send-email-mwelling@ieee.org> The core spi driver swaps the polarity of the enable based on SPI_CS_HIGH. The omap2 controller has an internal configuration register bit called OMAP2_MCSPI_CHCONF_EPOL to handle active high chip selects as well. So we have to revert swap the polarity back for the correct setting of the OMAP2_MCSPI_CHCONF_FORCE bit in omap2_mcspi_set_cs. Signed-off-by: Michael Welling <mwelling@ieee.org> --- drivers/spi/spi-omap2-mcspi.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/spi/spi-omap2-mcspi.c b/drivers/spi/spi-omap2-mcspi.c index 304b427..502db29 100644 --- a/drivers/spi/spi-omap2-mcspi.c +++ b/drivers/spi/spi-omap2-mcspi.c @@ -247,6 +247,13 @@ static void omap2_mcspi_set_cs(struct spi_device *spi, bool enable) { u32 l; + /* The controller handles the inverted chip selects + * using the OMAP2_MCSPI_CHCONF_EPOL bit so revert + * the inversion from the core spi_set_cs function. + */ + if (spi->mode & SPI_CS_HIGH) + enable = !enable; + if (spi->controller_state) { l = mcspi_cached_chconf0(spi); -- 1.7.9.5
WARNING: multiple messages have this Message-ID (diff)
From: mwelling@ieee.org (Michael Welling) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 2/4] spi: omap2-mcspi: Fix set_cs function for active high Date: Sat, 23 May 2015 21:13:43 -0500 [thread overview] Message-ID: <1432433625-23407-3-git-send-email-mwelling@ieee.org> (raw) In-Reply-To: <1432433625-23407-1-git-send-email-mwelling@ieee.org> The core spi driver swaps the polarity of the enable based on SPI_CS_HIGH. The omap2 controller has an internal configuration register bit called OMAP2_MCSPI_CHCONF_EPOL to handle active high chip selects as well. So we have to revert swap the polarity back for the correct setting of the OMAP2_MCSPI_CHCONF_FORCE bit in omap2_mcspi_set_cs. Signed-off-by: Michael Welling <mwelling@ieee.org> --- drivers/spi/spi-omap2-mcspi.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/spi/spi-omap2-mcspi.c b/drivers/spi/spi-omap2-mcspi.c index 304b427..502db29 100644 --- a/drivers/spi/spi-omap2-mcspi.c +++ b/drivers/spi/spi-omap2-mcspi.c @@ -247,6 +247,13 @@ static void omap2_mcspi_set_cs(struct spi_device *spi, bool enable) { u32 l; + /* The controller handles the inverted chip selects + * using the OMAP2_MCSPI_CHCONF_EPOL bit so revert + * the inversion from the core spi_set_cs function. + */ + if (spi->mode & SPI_CS_HIGH) + enable = !enable; + if (spi->controller_state) { l = mcspi_cached_chconf0(spi); -- 1.7.9.5
next prev parent reply other threads:[~2015-05-24 2:14 UTC|newest] Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top 2015-05-12 17:38 [PATCH] spi: omap2-mcspi: Fix native cs with new set_cs Michael Welling 2015-05-12 17:38 ` Michael Welling 2015-05-12 18:57 ` Nishanth Menon 2015-05-12 18:57 ` Nishanth Menon 2015-05-12 18:57 ` Nishanth Menon 2015-05-12 19:19 ` Mark Brown 2015-05-12 19:19 ` Mark Brown 2015-05-12 19:19 ` Mark Brown 2015-05-12 19:21 ` Nishanth Menon 2015-05-12 19:21 ` Nishanth Menon 2015-05-12 19:21 ` Nishanth Menon 2015-05-12 19:17 ` Mark Brown 2015-05-12 19:17 ` Mark Brown 2015-05-21 2:07 ` Michael Welling 2015-05-21 2:07 ` Michael Welling 2015-05-21 2:07 ` Michael Welling 2015-05-21 10:18 ` Mark Brown 2015-05-21 10:18 ` Mark Brown 2015-05-21 21:04 ` Michael Welling 2015-05-21 21:04 ` Michael Welling 2015-05-21 21:16 ` Mark Brown 2015-05-21 21:16 ` Mark Brown 2015-05-21 23:48 ` Michael Welling 2015-05-21 23:48 ` Michael Welling 2015-05-22 12:25 ` Mark Brown 2015-05-22 12:25 ` Mark Brown 2015-05-22 12:25 ` Mark Brown 2015-05-22 15:31 ` Michael Welling 2015-05-22 15:31 ` Michael Welling 2015-05-24 2:13 ` [PATCH 0/4] spi: omap2-mcspi: Fixes for recent updates Michael Welling 2015-05-24 2:13 ` Michael Welling 2015-05-24 2:13 ` [PATCH 1/4] spi: omap2-mcspi: Remove unnecessary delay Michael Welling 2015-05-24 2:13 ` Michael Welling 2015-05-24 2:13 ` Michael Welling [this message] 2015-05-24 2:13 ` [PATCH 2/4] spi: omap2-mcspi: Fix set_cs function for active high Michael Welling 2015-05-24 2:13 ` [PATCH 3/4] spi: omap2-mcspi: Fix GPIO chip select support Michael Welling 2015-05-24 2:13 ` Michael Welling 2015-05-24 2:13 ` [PATCH 4/4] spi: omap2-mcspi: Handle error on gpio_request Michael Welling 2015-05-24 2:13 ` Michael Welling 2015-05-24 8:13 ` Nicholas Mc Guire 2015-05-24 8:13 ` Nicholas Mc Guire 2015-05-24 16:52 ` Michael Welling 2015-05-24 16:52 ` Michael Welling 2015-05-25 12:00 ` [PATCH 0/4] spi: omap2-mcspi: Fixes for recent updates Mark Brown 2015-05-25 12:00 ` Mark Brown 2015-05-25 12:00 ` Mark Brown
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=1432433625-23407-3-git-send-email-mwelling@ieee.org \ --to=mwelling@ieee.org \ --cc=broonie@kernel.org \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=linux-kernel@vger.kernel.org \ --cc=linux-next@vger.kernel.org \ --cc=linux-omap@vger.kernel.org \ --cc=linux-spi@vger.kernel.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.