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From: Shannon Zhao <zhaoshenglong@huawei.com>
To: <kvmarm@lists.cs.columbia.edu>, <marc.zyngier@arm.com>,
	<christoffer.dall@linaro.org>
Cc: <linux-arm-kernel@lists.infradead.org>, <kvm@vger.kernel.org>,
	<will.deacon@arm.com>, <wei@redhat.com>, <cov@codeaurora.org>,
	<shannon.zhao@linaro.org>, <peter.huangpeng@huawei.com>,
	<hangaohuai@huawei.com>, <zhaoshenglong@huawei.com>
Subject: [PATCH v8 15/20] KVM: ARM64: Add a helper to forward trap to guest EL1
Date: Tue, 22 Dec 2015 16:08:10 +0800	[thread overview]
Message-ID: <1450771695-11948-16-git-send-email-zhaoshenglong@huawei.com> (raw)
In-Reply-To: <1450771695-11948-1-git-send-email-zhaoshenglong@huawei.com>

From: Shannon Zhao <shannon.zhao@linaro.org>

This helper forward the trap caused by MRS/MSR for arch64 and MCR/MRC,
MCRR/MRRC for arch32 CP15 to guest EL1.

Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org>
---
 arch/arm64/include/asm/kvm_emulate.h |  1 +
 arch/arm64/kvm/inject_fault.c        | 52 +++++++++++++++++++++++++++++++++++-
 2 files changed, 52 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/include/asm/kvm_emulate.h b/arch/arm64/include/asm/kvm_emulate.h
index 3066328..88b2958 100644
--- a/arch/arm64/include/asm/kvm_emulate.h
+++ b/arch/arm64/include/asm/kvm_emulate.h
@@ -36,6 +36,7 @@ unsigned long *vcpu_spsr32(const struct kvm_vcpu *vcpu);
 bool kvm_condition_valid32(const struct kvm_vcpu *vcpu);
 void kvm_skip_instr32(struct kvm_vcpu *vcpu, bool is_wide_instr);
 
+void kvm_forward_trap_to_el1(struct kvm_vcpu *vcpu);
 void kvm_inject_undefined(struct kvm_vcpu *vcpu);
 void kvm_inject_dabt(struct kvm_vcpu *vcpu, unsigned long addr);
 void kvm_inject_pabt(struct kvm_vcpu *vcpu, unsigned long addr);
diff --git a/arch/arm64/kvm/inject_fault.c b/arch/arm64/kvm/inject_fault.c
index 648112e..052ef25 100644
--- a/arch/arm64/kvm/inject_fault.c
+++ b/arch/arm64/kvm/inject_fault.c
@@ -27,7 +27,10 @@
 
 #define PSTATE_FAULT_BITS_64 	(PSR_MODE_EL1h | PSR_A_BIT | PSR_F_BIT | \
 				 PSR_I_BIT | PSR_D_BIT)
-#define EL1_EXCEPT_SYNC_OFFSET	0x200
+#define EL1_EXCEPT_BAD_SYNC_OFFSET	0x0
+#define EL1_EXCEPT_SYNC_OFFSET		0x200
+#define EL0_EXCEPT_SYNC_OFFSET_64	0x400
+#define EL0_EXCEPT_SYNC_OFFSET_32	0x600
 
 static void prepare_fault32(struct kvm_vcpu *vcpu, u32 mode, u32 vect_offset)
 {
@@ -201,3 +204,50 @@ void kvm_inject_undefined(struct kvm_vcpu *vcpu)
 	else
 		inject_undef64(vcpu);
 }
+
+/**
+ * kvm_forward_trap_to_el1 - forward access trap to the guest EL1
+ *
+ * It is assumed that this code is called from the VCPU thread and that the
+ * VCPU therefore is not currently executing guest code.
+ */
+void kvm_forward_trap_to_el1(struct kvm_vcpu *vcpu)
+{
+	unsigned long cpsr;
+	u32 esr = vcpu->arch.fault.esr_el2;
+	u32 esr_ec = (esr & ESR_ELx_EC_MASK) >> ESR_ELx_EC_SHIFT;
+
+	if (esr_ec == ESR_ELx_EC_SYS64) {
+		u64 exc_offset;
+
+		cpsr = *vcpu_cpsr(vcpu);
+		*vcpu_spsr(vcpu) = cpsr;
+		*vcpu_elr_el1(vcpu) = *vcpu_pc(vcpu);
+
+		*vcpu_cpsr(vcpu) = PSTATE_FAULT_BITS_64;
+
+		switch (cpsr & (PSR_MODE_MASK | PSR_MODE32_BIT)) {
+		case PSR_MODE_EL0t:
+			exc_offset = EL0_EXCEPT_SYNC_OFFSET_64;
+			break;
+		case PSR_MODE_EL1t:
+			exc_offset = EL1_EXCEPT_BAD_SYNC_OFFSET;
+			break;
+		case PSR_MODE_EL1h:
+			exc_offset = EL1_EXCEPT_SYNC_OFFSET;
+			break;
+		default:
+			exc_offset = EL0_EXCEPT_SYNC_OFFSET_32;
+		}
+
+		*vcpu_pc(vcpu) = vcpu_sys_reg(vcpu, VBAR_EL1) + exc_offset;
+
+		if (kvm_vcpu_trap_il_is32bit(vcpu))
+			esr |= ESR_ELx_IL;
+
+		vcpu_sys_reg(vcpu, ESR_EL1) = esr;
+	} else if (esr_ec == ESR_ELx_EC_CP15_32 ||
+		   esr_ec == ESR_ELx_EC_CP15_64) {
+		prepare_fault32(vcpu, COMPAT_PSR_MODE_UND, 4);
+	}
+}
-- 
2.0.4



WARNING: multiple messages have this Message-ID (diff)
From: Shannon Zhao <zhaoshenglong@huawei.com>
To: kvmarm@lists.cs.columbia.edu, marc.zyngier@arm.com,
	christoffer.dall@linaro.org
Cc: linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org,
	will.deacon@arm.com, wei@redhat.com, cov@codeaurora.org,
	shannon.zhao@linaro.org, peter.huangpeng@huawei.com,
	hangaohuai@huawei.com, zhaoshenglong@huawei.com
Subject: [PATCH v8 15/20] KVM: ARM64: Add a helper to forward trap to guest EL1
Date: Tue, 22 Dec 2015 16:08:10 +0800	[thread overview]
Message-ID: <1450771695-11948-16-git-send-email-zhaoshenglong@huawei.com> (raw)
In-Reply-To: <1450771695-11948-1-git-send-email-zhaoshenglong@huawei.com>

From: Shannon Zhao <shannon.zhao@linaro.org>

This helper forward the trap caused by MRS/MSR for arch64 and MCR/MRC,
MCRR/MRRC for arch32 CP15 to guest EL1.

Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org>
---
 arch/arm64/include/asm/kvm_emulate.h |  1 +
 arch/arm64/kvm/inject_fault.c        | 52 +++++++++++++++++++++++++++++++++++-
 2 files changed, 52 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/include/asm/kvm_emulate.h b/arch/arm64/include/asm/kvm_emulate.h
index 3066328..88b2958 100644
--- a/arch/arm64/include/asm/kvm_emulate.h
+++ b/arch/arm64/include/asm/kvm_emulate.h
@@ -36,6 +36,7 @@ unsigned long *vcpu_spsr32(const struct kvm_vcpu *vcpu);
 bool kvm_condition_valid32(const struct kvm_vcpu *vcpu);
 void kvm_skip_instr32(struct kvm_vcpu *vcpu, bool is_wide_instr);
 
+void kvm_forward_trap_to_el1(struct kvm_vcpu *vcpu);
 void kvm_inject_undefined(struct kvm_vcpu *vcpu);
 void kvm_inject_dabt(struct kvm_vcpu *vcpu, unsigned long addr);
 void kvm_inject_pabt(struct kvm_vcpu *vcpu, unsigned long addr);
diff --git a/arch/arm64/kvm/inject_fault.c b/arch/arm64/kvm/inject_fault.c
index 648112e..052ef25 100644
--- a/arch/arm64/kvm/inject_fault.c
+++ b/arch/arm64/kvm/inject_fault.c
@@ -27,7 +27,10 @@
 
 #define PSTATE_FAULT_BITS_64 	(PSR_MODE_EL1h | PSR_A_BIT | PSR_F_BIT | \
 				 PSR_I_BIT | PSR_D_BIT)
-#define EL1_EXCEPT_SYNC_OFFSET	0x200
+#define EL1_EXCEPT_BAD_SYNC_OFFSET	0x0
+#define EL1_EXCEPT_SYNC_OFFSET		0x200
+#define EL0_EXCEPT_SYNC_OFFSET_64	0x400
+#define EL0_EXCEPT_SYNC_OFFSET_32	0x600
 
 static void prepare_fault32(struct kvm_vcpu *vcpu, u32 mode, u32 vect_offset)
 {
@@ -201,3 +204,50 @@ void kvm_inject_undefined(struct kvm_vcpu *vcpu)
 	else
 		inject_undef64(vcpu);
 }
+
+/**
+ * kvm_forward_trap_to_el1 - forward access trap to the guest EL1
+ *
+ * It is assumed that this code is called from the VCPU thread and that the
+ * VCPU therefore is not currently executing guest code.
+ */
+void kvm_forward_trap_to_el1(struct kvm_vcpu *vcpu)
+{
+	unsigned long cpsr;
+	u32 esr = vcpu->arch.fault.esr_el2;
+	u32 esr_ec = (esr & ESR_ELx_EC_MASK) >> ESR_ELx_EC_SHIFT;
+
+	if (esr_ec == ESR_ELx_EC_SYS64) {
+		u64 exc_offset;
+
+		cpsr = *vcpu_cpsr(vcpu);
+		*vcpu_spsr(vcpu) = cpsr;
+		*vcpu_elr_el1(vcpu) = *vcpu_pc(vcpu);
+
+		*vcpu_cpsr(vcpu) = PSTATE_FAULT_BITS_64;
+
+		switch (cpsr & (PSR_MODE_MASK | PSR_MODE32_BIT)) {
+		case PSR_MODE_EL0t:
+			exc_offset = EL0_EXCEPT_SYNC_OFFSET_64;
+			break;
+		case PSR_MODE_EL1t:
+			exc_offset = EL1_EXCEPT_BAD_SYNC_OFFSET;
+			break;
+		case PSR_MODE_EL1h:
+			exc_offset = EL1_EXCEPT_SYNC_OFFSET;
+			break;
+		default:
+			exc_offset = EL0_EXCEPT_SYNC_OFFSET_32;
+		}
+
+		*vcpu_pc(vcpu) = vcpu_sys_reg(vcpu, VBAR_EL1) + exc_offset;
+
+		if (kvm_vcpu_trap_il_is32bit(vcpu))
+			esr |= ESR_ELx_IL;
+
+		vcpu_sys_reg(vcpu, ESR_EL1) = esr;
+	} else if (esr_ec == ESR_ELx_EC_CP15_32 ||
+		   esr_ec == ESR_ELx_EC_CP15_64) {
+		prepare_fault32(vcpu, COMPAT_PSR_MODE_UND, 4);
+	}
+}
-- 
2.0.4



WARNING: multiple messages have this Message-ID (diff)
From: zhaoshenglong@huawei.com (Shannon Zhao)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v8 15/20] KVM: ARM64: Add a helper to forward trap to guest EL1
Date: Tue, 22 Dec 2015 16:08:10 +0800	[thread overview]
Message-ID: <1450771695-11948-16-git-send-email-zhaoshenglong@huawei.com> (raw)
In-Reply-To: <1450771695-11948-1-git-send-email-zhaoshenglong@huawei.com>

From: Shannon Zhao <shannon.zhao@linaro.org>

This helper forward the trap caused by MRS/MSR for arch64 and MCR/MRC,
MCRR/MRRC for arch32 CP15 to guest EL1.

Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org>
---
 arch/arm64/include/asm/kvm_emulate.h |  1 +
 arch/arm64/kvm/inject_fault.c        | 52 +++++++++++++++++++++++++++++++++++-
 2 files changed, 52 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/include/asm/kvm_emulate.h b/arch/arm64/include/asm/kvm_emulate.h
index 3066328..88b2958 100644
--- a/arch/arm64/include/asm/kvm_emulate.h
+++ b/arch/arm64/include/asm/kvm_emulate.h
@@ -36,6 +36,7 @@ unsigned long *vcpu_spsr32(const struct kvm_vcpu *vcpu);
 bool kvm_condition_valid32(const struct kvm_vcpu *vcpu);
 void kvm_skip_instr32(struct kvm_vcpu *vcpu, bool is_wide_instr);
 
+void kvm_forward_trap_to_el1(struct kvm_vcpu *vcpu);
 void kvm_inject_undefined(struct kvm_vcpu *vcpu);
 void kvm_inject_dabt(struct kvm_vcpu *vcpu, unsigned long addr);
 void kvm_inject_pabt(struct kvm_vcpu *vcpu, unsigned long addr);
diff --git a/arch/arm64/kvm/inject_fault.c b/arch/arm64/kvm/inject_fault.c
index 648112e..052ef25 100644
--- a/arch/arm64/kvm/inject_fault.c
+++ b/arch/arm64/kvm/inject_fault.c
@@ -27,7 +27,10 @@
 
 #define PSTATE_FAULT_BITS_64 	(PSR_MODE_EL1h | PSR_A_BIT | PSR_F_BIT | \
 				 PSR_I_BIT | PSR_D_BIT)
-#define EL1_EXCEPT_SYNC_OFFSET	0x200
+#define EL1_EXCEPT_BAD_SYNC_OFFSET	0x0
+#define EL1_EXCEPT_SYNC_OFFSET		0x200
+#define EL0_EXCEPT_SYNC_OFFSET_64	0x400
+#define EL0_EXCEPT_SYNC_OFFSET_32	0x600
 
 static void prepare_fault32(struct kvm_vcpu *vcpu, u32 mode, u32 vect_offset)
 {
@@ -201,3 +204,50 @@ void kvm_inject_undefined(struct kvm_vcpu *vcpu)
 	else
 		inject_undef64(vcpu);
 }
+
+/**
+ * kvm_forward_trap_to_el1 - forward access trap to the guest EL1
+ *
+ * It is assumed that this code is called from the VCPU thread and that the
+ * VCPU therefore is not currently executing guest code.
+ */
+void kvm_forward_trap_to_el1(struct kvm_vcpu *vcpu)
+{
+	unsigned long cpsr;
+	u32 esr = vcpu->arch.fault.esr_el2;
+	u32 esr_ec = (esr & ESR_ELx_EC_MASK) >> ESR_ELx_EC_SHIFT;
+
+	if (esr_ec == ESR_ELx_EC_SYS64) {
+		u64 exc_offset;
+
+		cpsr = *vcpu_cpsr(vcpu);
+		*vcpu_spsr(vcpu) = cpsr;
+		*vcpu_elr_el1(vcpu) = *vcpu_pc(vcpu);
+
+		*vcpu_cpsr(vcpu) = PSTATE_FAULT_BITS_64;
+
+		switch (cpsr & (PSR_MODE_MASK | PSR_MODE32_BIT)) {
+		case PSR_MODE_EL0t:
+			exc_offset = EL0_EXCEPT_SYNC_OFFSET_64;
+			break;
+		case PSR_MODE_EL1t:
+			exc_offset = EL1_EXCEPT_BAD_SYNC_OFFSET;
+			break;
+		case PSR_MODE_EL1h:
+			exc_offset = EL1_EXCEPT_SYNC_OFFSET;
+			break;
+		default:
+			exc_offset = EL0_EXCEPT_SYNC_OFFSET_32;
+		}
+
+		*vcpu_pc(vcpu) = vcpu_sys_reg(vcpu, VBAR_EL1) + exc_offset;
+
+		if (kvm_vcpu_trap_il_is32bit(vcpu))
+			esr |= ESR_ELx_IL;
+
+		vcpu_sys_reg(vcpu, ESR_EL1) = esr;
+	} else if (esr_ec == ESR_ELx_EC_CP15_32 ||
+		   esr_ec == ESR_ELx_EC_CP15_64) {
+		prepare_fault32(vcpu, COMPAT_PSR_MODE_UND, 4);
+	}
+}
-- 
2.0.4

  parent reply	other threads:[~2015-12-22  8:18 UTC|newest]

Thread overview: 197+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-12-22  8:07 [PATCH v8 00/20] KVM: ARM64: Add guest PMU support Shannon Zhao
2015-12-22  8:07 ` Shannon Zhao
2015-12-22  8:07 ` Shannon Zhao
2015-12-22  8:07 ` [PATCH v8 01/20] ARM64: Move PMU register related defines to asm/pmu.h Shannon Zhao
2015-12-22  8:07   ` Shannon Zhao
2015-12-22  8:07   ` Shannon Zhao
2016-01-07 10:20   ` Marc Zyngier
2016-01-07 10:20     ` Marc Zyngier
2015-12-22  8:07 ` [PATCH v8 02/20] KVM: ARM64: Define PMU data structure for each vcpu Shannon Zhao
2015-12-22  8:07   ` Shannon Zhao
2015-12-22  8:07   ` Shannon Zhao
2016-01-07 10:21   ` Marc Zyngier
2016-01-07 10:21     ` Marc Zyngier
2016-01-07 19:07   ` Andrew Jones
2016-01-07 19:07     ` Andrew Jones
2015-12-22  8:07 ` [PATCH v8 03/20] KVM: ARM64: Add offset defines for PMU registers Shannon Zhao
2015-12-22  8:07   ` Shannon Zhao
2015-12-22  8:07   ` Shannon Zhao
2016-01-07 10:23   ` Marc Zyngier
2016-01-07 10:23     ` Marc Zyngier
2015-12-22  8:07 ` [PATCH v8 04/20] KVM: ARM64: Add access handler for PMCR register Shannon Zhao
2015-12-22  8:07   ` Shannon Zhao
2015-12-22  8:07   ` Shannon Zhao
2016-01-07 10:43   ` Marc Zyngier
2016-01-07 10:43     ` Marc Zyngier
2016-01-07 11:16     ` Shannon Zhao
2016-01-07 11:16       ` Shannon Zhao
2016-01-07 11:16       ` Shannon Zhao
2015-12-22  8:08 ` [PATCH v8 05/20] KVM: ARM64: Add access handler for PMSELR register Shannon Zhao
2015-12-22  8:08   ` Shannon Zhao
2015-12-22  8:08   ` Shannon Zhao
2016-01-07 10:43   ` Marc Zyngier
2016-01-07 10:43     ` Marc Zyngier
2015-12-22  8:08 ` [PATCH v8 06/20] KVM: ARM64: Add access handler for PMCEID0 and PMCEID1 register Shannon Zhao
2015-12-22  8:08   ` Shannon Zhao
2015-12-22  8:08   ` Shannon Zhao
2016-01-07 10:44   ` Marc Zyngier
2016-01-07 10:44     ` Marc Zyngier
2015-12-22  8:08 ` [PATCH v8 07/20] KVM: ARM64: PMU: Add perf event map and introduce perf event creating function Shannon Zhao
2015-12-22  8:08   ` Shannon Zhao
2015-12-22  8:08   ` Shannon Zhao
2016-01-07 10:55   ` Marc Zyngier
2016-01-07 10:55     ` Marc Zyngier
2016-01-07 13:48   ` Marc Zyngier
2016-01-07 13:48     ` Marc Zyngier
2016-01-07 14:00     ` Shannon Zhao
2016-01-07 14:00       ` Shannon Zhao
2016-01-07 14:00       ` Shannon Zhao
2015-12-22  8:08 ` [PATCH v8 08/20] KVM: ARM64: Add access handler for event typer register Shannon Zhao
2015-12-22  8:08   ` Shannon Zhao
2015-12-22  8:08   ` Shannon Zhao
2016-01-07 11:03   ` Marc Zyngier
2016-01-07 11:03     ` Marc Zyngier
2016-01-07 11:11     ` Shannon Zhao
2016-01-07 11:11       ` Shannon Zhao
2016-01-07 11:11       ` Shannon Zhao
2016-01-07 12:36     ` Shannon Zhao
2016-01-07 12:36       ` Shannon Zhao
2016-01-07 12:36       ` Shannon Zhao
2016-01-07 13:15       ` Marc Zyngier
2016-01-07 13:15         ` Marc Zyngier
2016-01-07 12:09   ` Shannon Zhao
2016-01-07 12:09     ` Shannon Zhao
2016-01-07 12:09     ` Shannon Zhao
2016-01-07 13:01     ` Marc Zyngier
2016-01-07 13:01       ` Marc Zyngier
2016-01-07 19:17   ` Andrew Jones
2016-01-07 19:17     ` Andrew Jones
2015-12-22  8:08 ` [PATCH v8 09/20] KVM: ARM64: Add access handler for event counter register Shannon Zhao
2015-12-22  8:08   ` Shannon Zhao
2015-12-22  8:08   ` Shannon Zhao
2016-01-07 11:06   ` Marc Zyngier
2016-01-07 11:06     ` Marc Zyngier
2015-12-22  8:08 ` [PATCH v8 10/20] KVM: ARM64: Add access handler for PMCNTENSET and PMCNTENCLR register Shannon Zhao
2015-12-22  8:08   ` Shannon Zhao
2015-12-22  8:08   ` Shannon Zhao
2016-01-07 11:09   ` Marc Zyngier
2016-01-07 11:09     ` Marc Zyngier
2015-12-22  8:08 ` [PATCH v8 11/20] KVM: ARM64: Add access handler for PMINTENSET and PMINTENCLR register Shannon Zhao
2015-12-22  8:08   ` Shannon Zhao
2015-12-22  8:08   ` Shannon Zhao
2016-01-07 11:13   ` Marc Zyngier
2016-01-07 11:13     ` Marc Zyngier
2015-12-22  8:08 ` [PATCH v8 12/20] KVM: ARM64: Add access handler for PMOVSSET and PMOVSCLR register Shannon Zhao
2015-12-22  8:08   ` Shannon Zhao
2015-12-22  8:08   ` Shannon Zhao
2016-01-07 11:14   ` Marc Zyngier
2016-01-07 11:14     ` Marc Zyngier
2015-12-22  8:08 ` [PATCH v8 13/20] KVM: ARM64: Add access handler for PMSWINC register Shannon Zhao
2015-12-22  8:08   ` Shannon Zhao
2015-12-22  8:08   ` Shannon Zhao
2016-01-07 11:29   ` Marc Zyngier
2016-01-07 11:29     ` Marc Zyngier
2015-12-22  8:08 ` [PATCH v8 14/20] KVM: ARM64: Add helper to handle PMCR register bits Shannon Zhao
2015-12-22  8:08   ` Shannon Zhao
2015-12-22  8:08   ` Shannon Zhao
2016-01-07 11:59   ` Marc Zyngier
2016-01-07 11:59     ` Marc Zyngier
2015-12-22  8:08 ` Shannon Zhao [this message]
2015-12-22  8:08   ` [PATCH v8 15/20] KVM: ARM64: Add a helper to forward trap to guest EL1 Shannon Zhao
2015-12-22  8:08   ` Shannon Zhao
2015-12-22  8:08 ` [PATCH v8 16/20] KVM: ARM64: Add access handler for PMUSERENR register Shannon Zhao
2015-12-22  8:08   ` Shannon Zhao
2015-12-22  8:08   ` Shannon Zhao
2016-01-07 10:14   ` Marc Zyngier
2016-01-07 10:14     ` Marc Zyngier
2016-01-07 11:15     ` Shannon Zhao
2016-01-07 11:15       ` Shannon Zhao
2016-01-07 11:15       ` Shannon Zhao
2015-12-22  8:08 ` [PATCH v8 17/20] KVM: ARM64: Add PMU overflow interrupt routing Shannon Zhao
2015-12-22  8:08   ` Shannon Zhao
2015-12-22  8:08   ` Shannon Zhao
2016-01-07 13:28   ` Marc Zyngier
2016-01-07 13:28     ` Marc Zyngier
2016-01-07 13:28     ` Marc Zyngier
2015-12-22  8:08 ` [PATCH v8 18/20] KVM: ARM64: Reset PMU state when resetting vcpu Shannon Zhao
2015-12-22  8:08   ` Shannon Zhao
2015-12-22  8:08   ` Shannon Zhao
2016-01-07 13:39   ` Marc Zyngier
2016-01-07 13:39     ` Marc Zyngier
2016-01-07 13:39     ` Marc Zyngier
2015-12-22  8:08 ` [PATCH v8 19/20] KVM: ARM64: Free perf event of PMU when destroying vcpu Shannon Zhao
2015-12-22  8:08   ` Shannon Zhao
2015-12-22  8:08   ` Shannon Zhao
2016-01-07 13:51   ` Marc Zyngier
2016-01-07 13:51     ` Marc Zyngier
2015-12-22  8:08 ` [PATCH v8 20/20] KVM: ARM64: Add a new kvm ARM PMU device Shannon Zhao
2015-12-22  8:08   ` Shannon Zhao
2015-12-22  8:08   ` Shannon Zhao
2016-01-07 13:56   ` Marc Zyngier
2016-01-07 13:56     ` Marc Zyngier
2016-01-07 14:35     ` Shannon Zhao
2016-01-07 14:35       ` Shannon Zhao
2016-01-07 14:35       ` Shannon Zhao
2016-01-07 14:36   ` Peter Maydell
2016-01-07 14:36     ` Peter Maydell
2016-01-07 14:49     ` Shannon Zhao
2016-01-07 14:49       ` Shannon Zhao
2016-01-07 14:56       ` Peter Maydell
2016-01-07 14:56         ` Peter Maydell
2016-01-07 20:36         ` Andrew Jones
2016-01-07 20:36           ` Andrew Jones
2016-01-09 12:29           ` Christoffer Dall
2016-01-09 12:29             ` Christoffer Dall
2016-01-09 15:03             ` Marc Zyngier
2016-01-09 15:03               ` Marc Zyngier
2016-01-11  8:45               ` Shannon Zhao
2016-01-11  8:45                 ` Shannon Zhao
2016-01-11  8:59                 ` Marc Zyngier
2016-01-11  8:59                   ` Marc Zyngier
2016-01-11 11:52                   ` Andrew Jones
2016-01-11 11:52                     ` Andrew Jones
2016-01-11 12:03                     ` Shannon Zhao
2016-01-11 12:03                       ` Shannon Zhao
2016-01-11 14:07               ` Andrew Jones
2016-01-11 14:07                 ` Andrew Jones
2016-01-11 15:09                 ` Christoffer Dall
2016-01-11 15:09                   ` Christoffer Dall
2016-01-11 16:09                   ` Andrew Jones
2016-01-11 16:09                     ` Andrew Jones
2016-01-11 16:13                     ` Peter Maydell
2016-01-11 16:13                       ` Peter Maydell
2016-01-11 16:48                       ` Andrew Jones
2016-01-11 16:48                         ` Andrew Jones
2016-01-11 16:21                     ` Andrew Jones
2016-01-11 16:21                       ` Andrew Jones
2016-01-11 16:29                       ` Peter Maydell
2016-01-11 16:29                         ` Peter Maydell
2016-01-11 16:44                         ` Andrew Jones
2016-01-11 16:44                           ` Andrew Jones
2016-01-08  3:06         ` Shannon Zhao
2016-01-08  3:06           ` Shannon Zhao
2016-01-08 10:24           ` Peter Maydell
2016-01-08 10:24             ` Peter Maydell
2016-01-08 12:15             ` Shannon Zhao
2016-01-08 12:15               ` Shannon Zhao
2016-01-08 12:56               ` Peter Maydell
2016-01-08 12:56                 ` Peter Maydell
2016-01-08 13:31                 ` Shannon Zhao
2016-01-08 13:31                   ` Shannon Zhao
2016-01-07 20:18   ` Andrew Jones
2016-01-07 20:18     ` Andrew Jones
2016-01-08  2:53     ` Shannon Zhao
2016-01-08  2:53       ` Shannon Zhao
2016-01-08  2:53       ` Shannon Zhao
2016-01-08 11:22       ` Andrew Jones
2016-01-08 11:22         ` Andrew Jones
2016-01-08 15:20         ` Andrew Jones
2016-01-08 15:20           ` Andrew Jones
2016-01-08 15:59           ` Andrew Jones
2016-01-08 15:59             ` Andrew Jones
2016-01-07 14:10 ` [PATCH v8 00/20] KVM: ARM64: Add guest PMU support Marc Zyngier
2016-01-07 14:10   ` Marc Zyngier
2016-01-07 14:12   ` Will Deacon
2016-01-07 14:12     ` Will Deacon
2016-01-07 14:21     ` Marc Zyngier
2016-01-07 14:21       ` Marc Zyngier

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