From: <tthayer@opensource.altera.com> To: <lee.jones@linaro.org>, <linus.walleij@linaro.org>, <gnurou@gmail.com>, <jdelvare@suse.com>, <linux@roeck-us.net>, <robh+dt@kernel.org>, <pawel.moll@arm.com>, <mark.rutland@arm.com>, <ijc+devicetree@hellion.org.uk>, <dinguyen@opensource.altera.com> Cc: <linux-gpio@vger.kernel.org>, <linux-hwmon@vger.kernel.org>, <devicetree@vger.kernel.org>, Thor Thayer <tthayer@opensource.altera.com> Subject: [PATCH 05/11] ARM: socfpga: dts: Add SPI Master1 for Arria10 System Resource chip Date: Fri, 22 Apr 2016 10:33:33 -0500 [thread overview] Message-ID: <1461339219-15255-6-git-send-email-tthayer@opensource.altera.com> (raw) In-Reply-To: <1461339219-15255-1-git-send-email-tthayer@opensource.altera.com> From: Thor Thayer <tthayer@opensource.altera.com> Add the Altera Arria10 SPI Master Node in preparation for the A10SR MFD node. Signed-off-by: Thor Thayer <tthayer@opensource.altera.com> --- arch/arm/boot/dts/socfpga_arria10.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi index 17e81dc..e7b6c4a 100644 --- a/arch/arm/boot/dts/socfpga_arria10.dtsi +++ b/arch/arm/boot/dts/socfpga_arria10.dtsi @@ -567,6 +567,21 @@ status = "disabled"; }; + spi1: spi@ffda5000 { + compatible = "snps,dw-apb-ssi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xffda5000 0x100>; + interrupts = <0 102 4>; + num-chipselect = <4>; + bus-num = <0>; + /*32bit_access;*/ + tx-dma-channel = <&pdma 16>; + rx-dma-channel = <&pdma 17>; + clocks = <&spi_m_clk>; + status = "disabled"; + }; + sdr: sdr@ffc25000 { compatible = "syscon"; reg = <0xffcfb100 0x80>; -- 1.7.9.5
WARNING: multiple messages have this Message-ID (diff)
From: <tthayer@opensource.altera.com> To: lee.jones@linaro.org, linus.walleij@linaro.org, gnurou@gmail.com, jdelvare@suse.com, linux@roeck-us.net, robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, dinguyen@opensource.altera.com Cc: linux-gpio@vger.kernel.org, linux-hwmon@vger.kernel.org, devicetree@vger.kernel.org, Thor Thayer <tthayer@opensource.altera.com> Subject: [PATCH 05/11] ARM: socfpga: dts: Add SPI Master1 for Arria10 System Resource chip Date: Fri, 22 Apr 2016 10:33:33 -0500 [thread overview] Message-ID: <1461339219-15255-6-git-send-email-tthayer@opensource.altera.com> (raw) In-Reply-To: <1461339219-15255-1-git-send-email-tthayer@opensource.altera.com> From: Thor Thayer <tthayer@opensource.altera.com> Add the Altera Arria10 SPI Master Node in preparation for the A10SR MFD node. Signed-off-by: Thor Thayer <tthayer@opensource.altera.com> --- arch/arm/boot/dts/socfpga_arria10.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi index 17e81dc..e7b6c4a 100644 --- a/arch/arm/boot/dts/socfpga_arria10.dtsi +++ b/arch/arm/boot/dts/socfpga_arria10.dtsi @@ -567,6 +567,21 @@ status = "disabled"; }; + spi1: spi@ffda5000 { + compatible = "snps,dw-apb-ssi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xffda5000 0x100>; + interrupts = <0 102 4>; + num-chipselect = <4>; + bus-num = <0>; + /*32bit_access;*/ + tx-dma-channel = <&pdma 16>; + rx-dma-channel = <&pdma 17>; + clocks = <&spi_m_clk>; + status = "disabled"; + }; + sdr: sdr@ffc25000 { compatible = "syscon"; reg = <0xffcfb100 0x80>; -- 1.7.9.5
next prev parent reply other threads:[~2016-04-22 15:33 UTC|newest] Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-04-22 15:33 [PATCH 00/11] Addition of Altera Arria10 System Resource Chip tthayer 2016-04-22 15:33 ` tthayer 2016-04-22 15:33 ` [PATCH 01/11] dt-bindings: mfd: Add Altera Arria10 System Resource Chip bindings tthayer 2016-04-22 15:33 ` tthayer 2016-04-25 12:55 ` Rob Herring 2016-04-25 12:55 ` Rob Herring 2016-04-25 15:01 ` Thor Thayer 2016-04-25 15:01 ` Thor Thayer 2016-04-26 12:33 ` Rob Herring 2016-04-26 12:34 ` Rob Herring 2016-04-22 15:33 ` [PATCH 02/11] MAINTAINERS: Add Altera Arria10 System Resource Chip tthayer 2016-04-22 15:33 ` tthayer 2016-05-09 15:36 ` Lee Jones 2016-05-09 15:37 ` Lee Jones 2016-04-22 15:33 ` [PATCH 03/11] mfd: altr_a10sr: Add Altera Arria10 DevKit " tthayer 2016-04-22 15:33 ` tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx 2016-05-09 16:02 ` Lee Jones 2016-05-09 16:02 ` Lee Jones 2016-04-22 15:33 ` [PATCH 04/11] gpio: altera-a10sr: Add A10 System Resource Chip GPIO support tthayer 2016-04-22 15:33 ` tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx 2016-04-29 9:29 ` Linus Walleij 2016-04-29 9:31 ` Linus Walleij 2016-04-22 15:33 ` tthayer [this message] 2016-04-22 15:33 ` [PATCH 05/11] ARM: socfpga: dts: Add SPI Master1 for Arria10 System Resource chip tthayer 2016-04-22 15:33 ` [PATCH 06/11] ARM: socfpga: dts: Add Devkit A10-SR fields for Arria10 tthayer 2016-04-22 15:33 ` tthayer 2016-04-22 15:33 ` [PATCH 07/11] ARM: socfpga: dts: Add LED framework to A10-SR GPIO tthayer 2016-04-22 15:33 ` tthayer 2016-04-22 15:33 ` [PATCH 08/11] dt-bindings: mfd: Add Altera A10-SR power supply alarm tthayer 2016-04-22 15:33 ` tthayer 2016-04-25 12:57 ` Rob Herring 2016-04-25 12:58 ` Rob Herring 2016-04-25 15:04 ` Thor Thayer 2016-04-25 15:04 ` Thor Thayer 2016-04-22 15:33 ` [PATCH 09/11] mfd: altr_a10sr: Add Altera A10-SR power supply alarms tthayer 2016-04-22 15:33 ` tthayer 2016-05-09 15:53 ` Lee Jones 2016-05-09 15:55 ` Lee Jones 2016-05-09 15:56 ` Lee Jones 2016-05-09 15:56 ` Lee Jones 2016-04-22 15:33 ` [PATCH 10/11] hwmon: " tthayer 2016-04-22 15:33 ` tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx 2016-04-22 22:24 ` Guenter Roeck 2016-04-22 22:24 ` Guenter Roeck 2016-04-25 14:41 ` Thor Thayer 2016-04-25 14:41 ` Thor Thayer 2016-04-25 14:58 ` Guenter Roeck 2016-04-25 15:18 ` Thor Thayer 2016-04-25 15:18 ` Thor Thayer 2016-04-22 15:33 ` [PATCH 11/11] ARM: socfpga: dts: Add A10-SR Devkit " tthayer 2016-04-22 15:33 ` tthayer 2016-04-26 13:51 ` [PATCH 01/11] dt-bindings: mfd: Add Altera Arria10 System Resource Chip bindings Thor Thayer 2016-04-26 13:54 ` Thor Thayer 2016-05-09 16:44 ` [PATCH 03/11] mfd: altr_a10sr: Add Altera Arria10 DevKit System Resource Chip Thor Thayer 2016-05-09 16:48 ` Thor Thayer
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