[PATCH 4/7] clk: gxbb: Document bindings for the GXBB clock controller

From: Michael Turquette <mturquette@baylibre.com>
To: linux-clk@vger.kernel.org
Cc: linux-amlogic@lists.infradead.org, khilman@baylibre.com,
	carlo@endlessm.com, victor.wan@amlogic.com,
	jerry.cao@amlogic.com, xing.xu@amlogic.com
Subject: [PATCH 4/7] clk: gxbb: Document bindings for the GXBB clock controller
Date: Thu,  9 Jun 2016 17:32:51 -0700	[thread overview]
Message-ID: <1465518774-26924-5-git-send-email-mturquette@baylibre.com> (raw)
In-Reply-To: <1465518774-26924-1-git-send-email-mturquette@baylibre.com>

Add documentations for the clock controller.

Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Cc: devicetree@vger.kernel.org
---
 .../bindings/clock/amlogic,gxbb-clkc.txt           | 36 ++++++++++++++++++++++
 1 file changed, 36 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt

diff --git a/Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt b/Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt
new file mode 100644
index 0000000..ce06435
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt
@@ -0,0 +1,36 @@
+* Amlogic GXBB Clock and Reset Unit
+
+The Amlogic GXBB clock controller generates and supplies clock to various
+controllers within the SoC.
+
+Required Properties:
+
+- compatible: should be "amlogic,gxbb-clkc"
+- reg: physical base address of the clock controller and length of memory
+       mapped region.
+
+- #clock-cells: should be 1.
+
+Each clock is assigned an identifier and client nodes can use this identifier
+to specify the clock which they consume. All available clocks are defined as
+preprocessor macros in the dt-bindings/clock/gxbb-clkc.h header and can be
+used in device tree sources.
+
+Example: Clock controller node:
+
+	clkc: clock-controller@c883c000 {
+		#clock-cells = <1>;
+		compatible = "amlogic,gxbb-clkc";
+		reg = <0x0 0xc883c000 0x0 0x3db>;
+	};
+
+Example: UART controller node that consumes the clock generated by the clock
+  controller:
+
+	uart_AO: serial@c81004c0 {
+		compatible = "amlogic,meson-uart";
+		reg = <0xc81004c0 0x14>;
+		interrupts = <0 90 1>;
+		clocks = <&clkc CLKID_CLK81>;
+		status = "disabled";
+	};
-- 
2.1.4
