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From: Ritesh Harjani <riteshh-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
To: ulf.hansson-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org,
	linux-mmc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	adrian.hunter-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org,
	sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
	andy.gross-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org
Cc: shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	david.brown-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org,
	linux-arm-msm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	georgi.djakov-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org,
	alex.lemberg-XdAiOPVOjttBDgjK7y7TUQ@public.gmane.org,
	mateusz.nowak-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org,
	Yuliy.Izrailov-XdAiOPVOjttBDgjK7y7TUQ@public.gmane.org,
	asutoshd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
	david.griego-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org,
	stummala-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
	venkatg-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
	rnayak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
	pramod.gurav-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org,
	jeremymc-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org,
	Ritesh Harjani <riteshh-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
Subject: [PATCH v8 12/16] arm64: dts: qcom: msm8916: Add ddr support to sdhc1
Date: Wed, 16 Nov 2016 21:30:48 +0530	[thread overview]
Message-ID: <1479312052-22396-13-git-send-email-riteshh@codeaurora.org> (raw)
In-Reply-To: <1479312052-22396-1-git-send-email-riteshh-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>

This adds mmc-ddr-1_8v support to DT for sdhc1 of msm8916.

Signed-off-by: Ritesh Harjani <riteshh-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
---
 arch/arm64/boot/dts/qcom/msm8916.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index 6265822..5bc187c 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -515,6 +515,7 @@
 				 <&gcc GCC_SDCC1_AHB_CLK>,
 				 <&xo_board 0>;
 			clock-names = "core", "iface", "xo_clock";
+			mmc-ddr-1_8v;
 			bus-width = <8>;
 			non-removable;
 			status = "disabled";
-- 
The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, 
a Linux Foundation Collaborative Project.

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WARNING: multiple messages have this Message-ID (diff)
From: Ritesh Harjani <riteshh@codeaurora.org>
To: ulf.hansson@linaro.org, linux-mmc@vger.kernel.org,
	adrian.hunter@intel.com, sboyd@codeaurora.org,
	andy.gross@linaro.org
Cc: shawn.lin@rock-chips.com, devicetree@vger.kernel.org,
	linux-clk@vger.kernel.org, david.brown@linaro.org,
	linux-arm-msm@vger.kernel.org, georgi.djakov@linaro.org,
	alex.lemberg@sandisk.com, mateusz.nowak@intel.com,
	Yuliy.Izrailov@sandisk.com, asutoshd@codeaurora.org,
	david.griego@linaro.org, stummala@codeaurora.org,
	venkatg@codeaurora.org, rnayak@codeaurora.org,
	pramod.gurav@linaro.org, jeremymc@redhat.com,
	Ritesh Harjani <riteshh@codeaurora.org>
Subject: [PATCH v8 12/16] arm64: dts: qcom: msm8916: Add ddr support to sdhc1
Date: Wed, 16 Nov 2016 21:30:48 +0530	[thread overview]
Message-ID: <1479312052-22396-13-git-send-email-riteshh@codeaurora.org> (raw)
In-Reply-To: <1479312052-22396-1-git-send-email-riteshh@codeaurora.org>

This adds mmc-ddr-1_8v support to DT for sdhc1 of msm8916.

Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
---
 arch/arm64/boot/dts/qcom/msm8916.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index 6265822..5bc187c 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -515,6 +515,7 @@
 				 <&gcc GCC_SDCC1_AHB_CLK>,
 				 <&xo_board 0>;
 			clock-names = "core", "iface", "xo_clock";
+			mmc-ddr-1_8v;
 			bus-width = <8>;
 			non-removable;
 			status = "disabled";
-- 
The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, 
a Linux Foundation Collaborative Project.


  parent reply	other threads:[~2016-11-16 16:00 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-11-16 16:00 [PATCH v8 00/16] mmc: sdhci-msm: Add clk-rates, DDR, HS400 support Ritesh Harjani
2016-11-16 16:00 ` [PATCH v8 01/16] clk: qcom: Add rcg ops to return floor value closest to the requested rate Ritesh Harjani
2016-11-16 16:00 ` [PATCH v8 03/16] mmc: sdhci-msm: Change poor style writel/readl of registers Ritesh Harjani
2016-11-16 16:00 ` [PATCH v8 04/16] ARM: dts: Add xo_clock to sdhc nodes on qcom platforms Ritesh Harjani
2016-11-17  0:43   ` [PATCH v8 04/16] ARM: dts: Add xo to sdhc clock node " Ritesh Harjani
2016-11-18  3:56     ` Andy Gross
2016-11-21  6:30       ` Ritesh Harjani
2016-11-16 16:00 ` [PATCH v8 05/16] dt-bindings: sdhci-msm: Add xo_clock property Ritesh Harjani
2016-11-16 19:13   ` Stephen Boyd
2016-11-17  0:41     ` Ritesh Harjani
2016-11-17  0:47     ` [PATCH v8 05/16] dt-bindings: sdhci-msm: Add xo property Ritesh Harjani
2016-11-17 23:03       ` Stephen Boyd
     [not found]         ` <20161117230352.GO25626-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-11-21  6:31           ` Ritesh Harjani
2016-11-21  6:31             ` Ritesh Harjani
     [not found]       ` <1479343623-31163-1-git-send-email-riteshh-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-11-18 14:17         ` Rob Herring
2016-11-18 14:17           ` Rob Herring
2016-11-16 16:00 ` [PATCH v8 07/16] mmc: sdhci-msm: Add get_min_clock() and get_max_clock() callback Ritesh Harjani
     [not found] ` <1479312052-22396-1-git-send-email-riteshh-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-11-16 16:00   ` [PATCH v8 02/16] clk: qcom: Move all sdcc rcgs to use clk_rcg2_floor_ops Ritesh Harjani
2016-11-16 16:00     ` Ritesh Harjani
2016-11-16 16:00   ` [PATCH v8 06/16] mmc: sdhci-msm: Update DLL reset sequence Ritesh Harjani
2016-11-16 16:00     ` Ritesh Harjani
     [not found]     ` <1479312052-22396-7-git-send-email-riteshh-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-11-17  0:50       ` Ritesh Harjani
2016-11-17  0:50         ` Ritesh Harjani
2016-11-16 16:00   ` [PATCH v8 08/16] mmc: sdhci-msm: Enable few quirks Ritesh Harjani
2016-11-16 16:00     ` Ritesh Harjani
2016-11-16 16:00   ` [PATCH v8 09/16] mmc: sdhci: Factor out sdhci_enable_clock Ritesh Harjani
2016-11-16 16:00     ` Ritesh Harjani
2016-11-18 13:56     ` Adrian Hunter
2016-11-21  6:31       ` Ritesh Harjani
2016-11-16 16:00   ` [PATCH v8 10/16] mmc: sdhci-msm: Implement set_clock callback for sdhci-msm Ritesh Harjani
2016-11-16 16:00     ` Ritesh Harjani
2016-11-18 14:14     ` Adrian Hunter
2016-11-16 16:00   ` Ritesh Harjani [this message]
2016-11-16 16:00     ` [PATCH v8 12/16] arm64: dts: qcom: msm8916: Add ddr support to sdhc1 Ritesh Harjani
2016-11-17  0:52     ` Ritesh Harjani
2016-11-16 16:00   ` [PATCH v8 13/16] mmc: sdhci-msm: Add HS400 platform support Ritesh Harjani
2016-11-16 16:00     ` Ritesh Harjani
2016-11-16 16:00   ` [PATCH v8 16/16] sdhci: sdhci-msm: update dll configuration Ritesh Harjani
2016-11-16 16:00     ` Ritesh Harjani
2016-11-16 16:00 ` [PATCH v8 11/16] mmc: sdhci-msm: Add clock changes for DDR mode Ritesh Harjani
2016-11-16 16:00 ` [PATCH v8 14/16] mmc: sdhci-msm: Save the calculated tuning phase Ritesh Harjani
2016-11-16 16:00 ` [PATCH v8 15/16] mmc: sdhci-msm: Add calibration tuning for CDCLP533 circuit Ritesh Harjani
2016-11-17  0:08 ` [PATCH v8 00/16] mmc: sdhci-msm: Add clk-rates, DDR, HS400 support Jeremy McNicoll

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