From: fabrizio.castro@bp.renesas.com (Fabrizio Castro)
To: cip-dev@lists.cip-project.org
Subject: [cip-dev] [PATCH/RFC 4.19.y-cip v2 09/51] pinctrl: sh-pfc: Absorb enum IDs in PINMUX_DATA_REG() macro
Date: Thu, 29 Aug 2019 18:02:14 +0100 [thread overview]
Message-ID: <1567098176-1242-10-git-send-email-fabrizio.castro@bp.renesas.com> (raw)
In-Reply-To: <1567098176-1242-1-git-send-email-fabrizio.castro@bp.renesas.com>
From: Geert Uytterhoeven <geert+renesas@glider.be>
commit 19b593a1cf068effeca496f5dc92e5ad43f91bb2 upstream.
Currently the PINMUX_DATA_REG() macro must be followed by initialization
data, specifying all enum IDs. Hence the macro itself does not know
anything about the enum IDs, preventing the macro from performing any
validation on it.
Make the macro accept the enum IDs as a parameter, and update all users.
Note that array data enclosed by curly braces cannot be passed to a
macro as a parameter, hence the enum IDs are wrapped using the GROUP()
macro.
No functional changes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
---
drivers/pinctrl/sh-pfc/pfc-r8a73a4.c | 44 +++++++--------
drivers/pinctrl/sh-pfc/pfc-r8a7740.c | 40 +++++++-------
drivers/pinctrl/sh-pfc/pfc-sh7203.c | 28 +++++-----
drivers/pinctrl/sh-pfc/pfc-sh7264.c | 48 ++++++++--------
drivers/pinctrl/sh-pfc/pfc-sh7269.c | 48 ++++++++--------
drivers/pinctrl/sh-pfc/pfc-sh73a0.c | 40 +++++++-------
drivers/pinctrl/sh-pfc/pfc-sh7720.c | 72 ++++++++++++------------
drivers/pinctrl/sh-pfc/pfc-sh7722.c | 92 +++++++++++++++----------------
drivers/pinctrl/sh-pfc/pfc-sh7723.c | 92 +++++++++++++++----------------
drivers/pinctrl/sh-pfc/pfc-sh7724.c | 92 +++++++++++++++----------------
drivers/pinctrl/sh-pfc/pfc-sh7734.c | 14 ++---
drivers/pinctrl/sh-pfc/pfc-sh7757.c | 104 +++++++++++++++++------------------
drivers/pinctrl/sh-pfc/pfc-sh7785.c | 64 ++++++++++-----------
drivers/pinctrl/sh-pfc/pfc-sh7786.c | 36 ++++++------
drivers/pinctrl/sh-pfc/pfc-shx3.c | 16 +++---
drivers/pinctrl/sh-pfc/sh_pfc.h | 10 ++--
16 files changed, 420 insertions(+), 420 deletions(-)
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c b/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c
index 92b3cdf..0b22fe5 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c
@@ -2477,7 +2477,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
static const struct pinmux_data_reg pinmux_data_regs[] = {
- { PINMUX_DATA_REG("PORTL031_000DR", 0xe6054000, 32) {
+ { PINMUX_DATA_REG("PORTL031_000DR", 0xe6054000, 32, GROUP(
0, PORT30_DATA, PORT29_DATA, PORT28_DATA,
PORT27_DATA, PORT26_DATA, PORT25_DATA, PORT24_DATA,
PORT23_DATA, PORT22_DATA, PORT21_DATA, PORT20_DATA,
@@ -2486,9 +2486,9 @@ static const struct pinmux_data_reg pinmux_data_regs[] = {
PORT11_DATA, PORT10_DATA, PORT9_DATA, PORT8_DATA,
PORT7_DATA, PORT6_DATA, PORT5_DATA, PORT4_DATA,
PORT3_DATA, PORT2_DATA, PORT1_DATA, PORT0_DATA,
- }
+ ))
},
- { PINMUX_DATA_REG("PORTD063_032DR", 0xe6055000, 32) {
+ { PINMUX_DATA_REG("PORTD063_032DR", 0xe6055000, 32, GROUP(
0, 0, 0, 0,
0, 0, 0, 0,
0, 0, 0, 0,
@@ -2497,9 +2497,9 @@ static const struct pinmux_data_reg pinmux_data_regs[] = {
0, 0, 0, PORT40_DATA,
PORT39_DATA, PORT38_DATA, PORT37_DATA, PORT36_DATA,
PORT35_DATA, PORT34_DATA, PORT33_DATA, PORT32_DATA,
- }
+ ))
},
- { PINMUX_DATA_REG("PORTL095_064DR", 0xe6054004, 32) {
+ { PINMUX_DATA_REG("PORTL095_064DR", 0xe6054004, 32, GROUP(
0, 0, 0, 0,
0, 0, 0, 0,
0, 0, PORT85_DATA, PORT84_DATA,
@@ -2508,9 +2508,9 @@ static const struct pinmux_data_reg pinmux_data_regs[] = {
PORT75_DATA, PORT74_DATA, PORT73_DATA, PORT72_DATA,
PORT71_DATA, PORT70_DATA, PORT69_DATA, PORT68_DATA,
PORT67_DATA, PORT66_DATA, PORT65_DATA, PORT64_DATA,
- }
+ ))
},
- { PINMUX_DATA_REG("PORTD127_096DR", 0xe6055004, 32) {
+ { PINMUX_DATA_REG("PORTD127_096DR", 0xe6055004, 32, GROUP(
0, PORT126_DATA, PORT125_DATA, PORT124_DATA,
PORT123_DATA, PORT122_DATA, PORT121_DATA, PORT120_DATA,
PORT119_DATA, PORT118_DATA, PORT117_DATA, PORT116_DATA,
@@ -2519,9 +2519,9 @@ static const struct pinmux_data_reg pinmux_data_regs[] = {
PORT107_DATA, PORT106_DATA, PORT105_DATA, PORT104_DATA,
PORT103_DATA, PORT102_DATA, PORT101_DATA, PORT100_DATA,
PORT99_DATA, PORT98_DATA, PORT97_DATA, PORT96_DATA,
- }
+ ))
},
- { PINMUX_DATA_REG("PORTD159_128DR", 0xe6055008, 32) {
+ { PINMUX_DATA_REG("PORTD159_128DR", 0xe6055008, 32, GROUP(
0, 0, 0, 0,
0, 0, 0, 0,
0, 0, 0, 0,
@@ -2530,9 +2530,9 @@ static const struct pinmux_data_reg pinmux_data_regs[] = {
0, 0, 0, 0,
0, PORT134_DATA, PORT133_DATA, PORT132_DATA,
PORT131_DATA, PORT130_DATA, PORT129_DATA, PORT128_DATA,
- }
+ ))
},
- { PINMUX_DATA_REG("PORTR191_160DR", 0xe6056000, 32) {
+ { PINMUX_DATA_REG("PORTR191_160DR", 0xe6056000, 32, GROUP(
0, 0, 0, 0,
0, 0, 0, 0,
0, 0, 0, 0,
@@ -2541,9 +2541,9 @@ static const struct pinmux_data_reg pinmux_data_regs[] = {
PORT171_DATA, PORT170_DATA, PORT169_DATA, PORT168_DATA,
PORT167_DATA, PORT166_DATA, PORT165_DATA, PORT164_DATA,
PORT163_DATA, PORT162_DATA, PORT161_DATA, PORT160_DATA,
- }
+ ))
},
- { PINMUX_DATA_REG("PORTR223_192DR", 0xe6056004, 32) {
+ { PINMUX_DATA_REG("PORTR223_192DR", 0xe6056004, 32, GROUP(
0, PORT222_DATA, PORT221_DATA, PORT220_DATA,
PORT219_DATA, PORT218_DATA, PORT217_DATA, PORT216_DATA,
PORT215_DATA, PORT214_DATA, PORT213_DATA, PORT212_DATA,
@@ -2552,9 +2552,9 @@ static const struct pinmux_data_reg pinmux_data_regs[] = {
PORT203_DATA, PORT202_DATA, PORT201_DATA, PORT200_DATA,
PORT199_DATA, PORT198_DATA, PORT197_DATA, PORT196_DATA,
PORT195_DATA, PORT194_DATA, PORT193_DATA, PORT192_DATA,
- }
+ ))
},
- { PINMUX_DATA_REG("PORTR255_224DR", 0xe6056008, 32) {
+ { PINMUX_DATA_REG("PORTR255_224DR", 0xe6056008, 32, GROUP(
0, 0, 0, 0,
0, PORT250_DATA, PORT249_DATA, PORT248_DATA,
PORT247_DATA, PORT246_DATA, PORT245_DATA, PORT244_DATA,
@@ -2563,9 +2563,9 @@ static const struct pinmux_data_reg pinmux_data_regs[] = {
PORT235_DATA, PORT234_DATA, PORT233_DATA, PORT232_DATA,
PORT231_DATA, PORT230_DATA, PORT229_DATA, PORT228_DATA,
PORT227_DATA, PORT226_DATA, PORT225_DATA, PORT224_DATA,
- }
+ ))
},
- { PINMUX_DATA_REG("PORTR287_256DR", 0xe605600C, 32) {
+ { PINMUX_DATA_REG("PORTR287_256DR", 0xe605600C, 32, GROUP(
0, 0, 0, 0,
PORT283_DATA, PORT282_DATA, PORT281_DATA, PORT280_DATA,
PORT279_DATA, PORT278_DATA, PORT277_DATA, PORT276_DATA,
@@ -2574,9 +2574,9 @@ static const struct pinmux_data_reg pinmux_data_regs[] = {
PORT267_DATA, PORT266_DATA, PORT265_DATA, PORT264_DATA,
PORT263_DATA, PORT262_DATA, PORT261_DATA, PORT260_DATA,
PORT259_DATA, PORT258_DATA, PORT257_DATA, PORT256_DATA,
- }
+ ))
},
- { PINMUX_DATA_REG("PORTU319_288DR", 0xe6057000, 32) {
+ { PINMUX_DATA_REG("PORTU319_288DR", 0xe6057000, 32, GROUP(
0, 0, 0, 0,
0, 0, 0, 0,
0, 0, 0, PORT308_DATA,
@@ -2585,9 +2585,9 @@ static const struct pinmux_data_reg pinmux_data_regs[] = {
PORT299_DATA, PORT298_DATA, PORT297_DATA, PORT296_DATA,
PORT295_DATA, PORT294_DATA, PORT293_DATA, PORT292_DATA,
PORT291_DATA, PORT290_DATA, PORT289_DATA, PORT288_DATA,
- }
+ ))
},
- { PINMUX_DATA_REG("PORTU351_320DR", 0xe6057004, 32) {
+ { PINMUX_DATA_REG("PORTU351_320DR", 0xe6057004, 32, GROUP(
0, 0, 0, 0,
0, 0, 0, 0,
0, 0, 0, 0,
@@ -2596,7 +2596,7 @@ static const struct pinmux_data_reg pinmux_data_regs[] = {
0, 0, PORT329_DATA, PORT328_DATA,
PORT327_DATA, PORT326_DATA, PORT325_DATA, PORT324_DATA,
PORT323_DATA, PORT322_DATA, PORT321_DATA, PORT320_DATA,
- }
+ ))
},
{ },
};
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
index 4a372860..43541b1 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
@@ -3546,7 +3546,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
};
static const struct pinmux_data_reg pinmux_data_regs[] = {
- { PINMUX_DATA_REG("PORTL031_000DR", 0xe6054800, 32) {
+ { PINMUX_DATA_REG("PORTL031_000DR", 0xe6054800, 32, GROUP(
PORT31_DATA, PORT30_DATA, PORT29_DATA, PORT28_DATA,
PORT27_DATA, PORT26_DATA, PORT25_DATA, PORT24_DATA,
PORT23_DATA, PORT22_DATA, PORT21_DATA, PORT20_DATA,
@@ -3554,9 +3554,9 @@ static const struct pinmux_data_reg pinmux_data_regs[] = {
PORT15_DATA, PORT14_DATA, PORT13_DATA, PORT12_DATA,
PORT11_DATA, PORT10_DATA, PORT9_DATA, PORT8_DATA,
PORT7_DATA, PORT6_DATA, PORT5_DATA, PORT4_DATA,
- PORT3_DATA, PORT2_DATA, PORT1_DATA, PORT0_DATA }
+ PORT3_DATA, PORT2_DATA, PORT1_DATA, PORT0_DATA ))
},
- { PINMUX_DATA_REG("PORTL063_032DR", 0xe6054804, 32) {
+ { PINMUX_DATA_REG("PORTL063_032DR", 0xe6054804, 32, GROUP(
PORT63_DATA, PORT62_DATA, PORT61_DATA, PORT60_DATA,
PORT59_DATA, PORT58_DATA, PORT57_DATA, PORT56_DATA,
PORT55_DATA, PORT54_DATA, PORT53_DATA, PORT52_DATA,
@@ -3564,9 +3564,9 @@ static const struct pinmux_data_reg pinmux_data_regs[] = {
PORT47_DATA, PORT46_DATA, PORT45_DATA, PORT44_DATA,
PORT43_DATA, PORT42_DATA, PORT41_DATA, PORT40_DATA,
PORT39_DATA, PORT38_DATA, PORT37_DATA, PORT36_DATA,
- PORT35_DATA, PORT34_DATA, PORT33_DATA, PORT32_DATA }
+ PORT35_DATA, PORT34_DATA, PORT33_DATA, PORT32_DATA ))
},
- { PINMUX_DATA_REG("PORTL095_064DR", 0xe6054808, 32) {
+ { PINMUX_DATA_REG("PORTL095_064DR", 0xe6054808, 32, GROUP(
0, 0, 0, 0,
0, 0, 0, 0,
0, 0, 0, 0,
@@ -3574,9 +3574,9 @@ static const struct pinmux_data_reg pinmux_data_regs[] = {
PORT79_DATA, PORT78_DATA, PORT77_DATA, PORT76_DATA,
PORT75_DATA, PORT74_DATA, PORT73_DATA, PORT72_DATA,
PORT71_DATA, PORT70_DATA, PORT69_DATA, PORT68_DATA,
- PORT67_DATA, PORT66_DATA, PORT65_DATA, PORT64_DATA }
+ PORT67_DATA, PORT66_DATA, PORT65_DATA, PORT64_DATA ))
},
- { PINMUX_DATA_REG("PORTD095_064DR", 0xe6055808, 32) {
+ { PINMUX_DATA_REG("PORTD095_064DR", 0xe6055808, 32, GROUP(
PORT95_DATA, PORT94_DATA, PORT93_DATA, PORT92_DATA,
PORT91_DATA, PORT90_DATA, PORT89_DATA, PORT88_DATA,
PORT87_DATA, PORT86_DATA, PORT85_DATA, PORT84_DATA,
@@ -3584,9 +3584,9 @@ static const struct pinmux_data_reg pinmux_data_regs[] = {
0, 0, 0, 0,
0, 0, 0, 0,
0, 0, 0, 0,
- 0, 0, 0, 0 }
+ 0, 0, 0, 0 ))
},
- { PINMUX_DATA_REG("PORTD127_096DR", 0xe605580c, 32) {
+ { PINMUX_DATA_REG("PORTD127_096DR", 0xe605580c, 32, GROUP(
0, 0, 0, 0,
0, 0, 0, 0,
0, 0, 0, 0,
@@ -3594,9 +3594,9 @@ static const struct pinmux_data_reg pinmux_data_regs[] = {
PORT111_DATA, PORT110_DATA, PORT109_DATA, PORT108_DATA,
PORT107_DATA, PORT106_DATA, PORT105_DATA, PORT104_DATA,
PORT103_DATA, PORT102_DATA, PORT101_DATA, PORT100_DATA,
- PORT99_DATA, PORT98_DATA, PORT97_DATA, PORT96_DATA }
+ PORT99_DATA, PORT98_DATA, PORT97_DATA, PORT96_DATA ))
},
- { PINMUX_DATA_REG("PORTR127_096DR", 0xe605680C, 32) {
+ { PINMUX_DATA_REG("PORTR127_096DR", 0xe605680C, 32, GROUP(
PORT127_DATA, PORT126_DATA, PORT125_DATA, PORT124_DATA,
PORT123_DATA, PORT122_DATA, PORT121_DATA, PORT120_DATA,
PORT119_DATA, PORT118_DATA, PORT117_DATA, PORT116_DATA,
@@ -3604,9 +3604,9 @@ static const struct pinmux_data_reg pinmux_data_regs[] = {
0, 0, 0, 0,
0, 0, 0, 0,
0, 0, 0, 0,
- 0, 0, 0, 0 }
+ 0, 0, 0, 0 ))
},
- { PINMUX_DATA_REG("PORTR159_128DR", 0xe6056810, 32) {
+ { PINMUX_DATA_REG("PORTR159_128DR", 0xe6056810, 32, GROUP(
PORT159_DATA, PORT158_DATA, PORT157_DATA, PORT156_DATA,
PORT155_DATA, PORT154_DATA, PORT153_DATA, PORT152_DATA,
PORT151_DATA, PORT150_DATA, PORT149_DATA, PORT148_DATA,
@@ -3614,9 +3614,9 @@ static const struct pinmux_data_reg pinmux_data_regs[] = {
PORT143_DATA, PORT142_DATA, PORT141_DATA, PORT140_DATA,
PORT139_DATA, PORT138_DATA, PORT137_DATA, PORT136_DATA,
PORT135_DATA, PORT134_DATA, PORT133_DATA, PORT132_DATA,
- PORT131_DATA, PORT130_DATA, PORT129_DATA, PORT128_DATA }
+ PORT131_DATA, PORT130_DATA, PORT129_DATA, PORT128_DATA ))
},
- { PINMUX_DATA_REG("PORTR191_160DR", 0xe6056814, 32) {
+ { PINMUX_DATA_REG("PORTR191_160DR", 0xe6056814, 32, GROUP(
PORT191_DATA, PORT190_DATA, PORT189_DATA, PORT188_DATA,
PORT187_DATA, PORT186_DATA, PORT185_DATA, PORT184_DATA,
PORT183_DATA, PORT182_DATA, PORT181_DATA, PORT180_DATA,
@@ -3624,9 +3624,9 @@ static const struct pinmux_data_reg pinmux_data_regs[] = {
PORT175_DATA, PORT174_DATA, PORT173_DATA, PORT172_DATA,
PORT171_DATA, PORT170_DATA, PORT169_DATA, PORT168_DATA,
PORT167_DATA, PORT166_DATA, PORT165_DATA, PORT164_DATA,
- PORT163_DATA, PORT162_DATA, PORT161_DATA, PORT160_DATA }
+ PORT163_DATA, PORT162_DATA, PORT161_DATA, PORT160_DATA ))
},
- { PINMUX_DATA_REG("PORTR223_192DR", 0xe6056818, 32) {
+ { PINMUX_DATA_REG("PORTR223_192DR", 0xe6056818, 32, GROUP(
0, 0, 0, 0,
0, 0, 0, 0,
0, 0, 0, 0,
@@ -3634,9 +3634,9 @@ static const struct pinmux_data_reg pinmux_data_regs[] = {
PORT207_DATA, PORT206_DATA, PORT205_DATA, PORT204_DATA,
PORT203_DATA, PORT202_DATA, PORT201_DATA, PORT200_DATA,
PORT199_DATA, PORT198_DATA, PORT197_DATA, PORT196_DATA,
- PORT195_DATA, PORT194_DATA, PORT193_DATA, PORT192_DATA }
+ PORT195_DATA, PORT194_DATA, PORT193_DATA, PORT192_DATA ))
},
- { PINMUX_DATA_REG("PORTU223_192DR", 0xe6057818, 32) {
+ { PINMUX_DATA_REG("PORTU223_192DR", 0xe6057818, 32, GROUP(
0, 0, 0, 0,
0, 0, 0, 0,
0, 0, 0, 0,
@@ -3644,7 +3644,7 @@ static const struct pinmux_data_reg pinmux_data_regs[] = {
0, 0, 0, 0,
0, 0, 0, 0,
0, 0, 0, 0,
- 0, 0, 0, 0 }
+ 0, 0, 0, 0 ))
},
{ },
};
diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7203.c b/drivers/pinctrl/sh-pfc/pfc-sh7203.c
index c64de8f..46347e9 100644
--- a/drivers/pinctrl/sh-pfc/pfc-sh7203.c
+++ b/drivers/pinctrl/sh-pfc/pfc-sh7203.c
@@ -1528,47 +1528,47 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
};
static const struct pinmux_data_reg pinmux_data_regs[] = {
- { PINMUX_DATA_REG("PADRL", 0xfffe3802, 16) {
+ { PINMUX_DATA_REG("PADRL", 0xfffe3802, 16, GROUP(
0, 0, 0, 0,
0, 0, 0, 0,
PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA,
- PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA }
+ PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA ))
},
- { PINMUX_DATA_REG("PBDRL", 0xfffe3882, 16) {
+ { PINMUX_DATA_REG("PBDRL", 0xfffe3882, 16, GROUP(
0, 0, 0, PB12_DATA,
PB11_DATA, PB10_DATA, PB9_DATA, PB8_DATA,
PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
- PB3_DATA, PB2_DATA, PB1_DATA, PB0_DATA }
+ PB3_DATA, PB2_DATA, PB1_DATA, PB0_DATA ))
},
- { PINMUX_DATA_REG("PCDRL", 0xfffe3902, 16) {
+ { PINMUX_DATA_REG("PCDRL", 0xfffe3902, 16, GROUP(
0, PC14_DATA, PC13_DATA, PC12_DATA,
PC11_DATA, PC10_DATA, PC9_DATA, PC8_DATA,
PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
- PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA }
+ PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA ))
},
- { PINMUX_DATA_REG("PDDRL", 0xfffe3982, 16) {
+ { PINMUX_DATA_REG("PDDRL", 0xfffe3982, 16, GROUP(
PD15_DATA, PD14_DATA, PD13_DATA, PD12_DATA,
PD11_DATA, PD10_DATA, PD9_DATA, PD8_DATA,
PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
- PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA }
+ PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA ))
},
- { PINMUX_DATA_REG("PEDRL", 0xfffe3a02, 16) {
+ { PINMUX_DATA_REG("PEDRL", 0xfffe3a02, 16, GROUP(
PE15_DATA, PE14_DATA, PE13_DATA, PE12_DATA,
PE11_DATA, PE10_DATA, PE9_DATA, PE8_DATA,
PE7_DATA, PE6_DATA, PE5_DATA, PE4_DATA,
- PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA }
+ PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA ))
},
- { PINMUX_DATA_REG("PFDRH", 0xfffe3a80, 16) {
+ { PINMUX_DATA_REG("PFDRH", 0xfffe3a80, 16, GROUP(
0, PF30_DATA, PF29_DATA, PF28_DATA,
PF27_DATA, PF26_DATA, PF25_DATA, PF24_DATA,
PF23_DATA, PF22_DATA, PF21_DATA, PF20_DATA,
- PF19_DATA, PF18_DATA, PF17_DATA, PF16_DATA }
+ PF19_DATA, PF18_DATA, PF17_DATA, PF16_DATA ))
},
- { PINMUX_DATA_REG("PFDRL", 0xfffe3a82, 16) {
+ { PINMUX_DATA_REG("PFDRL", 0xfffe3a82, 16, GROUP(
PF15_DATA, PF14_DATA, PF13_DATA, PF12_DATA,
PF11_DATA, PF10_DATA, PF9_DATA, PF8_DATA,
PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
- PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA }
+ PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA ))
},
{ },
};
diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7264.c b/drivers/pinctrl/sh-pfc/pfc-sh7264.c
index df952f6c..ccb3123 100644
--- a/drivers/pinctrl/sh-pfc/pfc-sh7264.c
+++ b/drivers/pinctrl/sh-pfc/pfc-sh7264.c
@@ -2035,79 +2035,79 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
};
static const struct pinmux_data_reg pinmux_data_regs[] = {
- { PINMUX_DATA_REG("PADR1", 0xfffe3814, 16) {
+ { PINMUX_DATA_REG("PADR1", 0xfffe3814, 16, GROUP(
0, 0, 0, 0, 0, 0, 0, PA3_DATA,
- 0, 0, 0, 0, 0, 0, 0, PA2_DATA }
+ 0, 0, 0, 0, 0, 0, 0, PA2_DATA ))
},
- { PINMUX_DATA_REG("PADR0", 0xfffe3816, 16) {
+ { PINMUX_DATA_REG("PADR0", 0xfffe3816, 16, GROUP(
0, 0, 0, 0, 0, 0, 0, PA1_DATA,
- 0, 0, 0, 0, 0, 0, 0, PA0_DATA }
+ 0, 0, 0, 0, 0, 0, 0, PA0_DATA ))
},
- { PINMUX_DATA_REG("PBDR1", 0xfffe3834, 16) {
+ { PINMUX_DATA_REG("PBDR1", 0xfffe3834, 16, GROUP(
0, 0, 0, 0, 0, 0, 0, 0,
0, PB22_DATA, PB21_DATA, PB20_DATA,
- PB19_DATA, PB18_DATA, PB17_DATA, PB16_DATA }
+ PB19_DATA, PB18_DATA, PB17_DATA, PB16_DATA ))
},
- { PINMUX_DATA_REG("PBDR0", 0xfffe3836, 16) {
+ { PINMUX_DATA_REG("PBDR0", 0xfffe3836, 16, GROUP(
PB15_DATA, PB14_DATA, PB13_DATA, PB12_DATA,
PB11_DATA, PB10_DATA, PB9_DATA, PB8_DATA,
PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
- PB3_DATA, PB2_DATA, PB1_DATA, 0 }
+ PB3_DATA, PB2_DATA, PB1_DATA, 0 ))
},
- { PINMUX_DATA_REG("PCDR0", 0xfffe3856, 16) {
+ { PINMUX_DATA_REG("PCDR0", 0xfffe3856, 16, GROUP(
0, 0, 0, 0,
0, PC10_DATA, PC9_DATA, PC8_DATA,
PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
- PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA }
+ PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA ))
},
- { PINMUX_DATA_REG("PDDR0", 0xfffe3876, 16) {
+ { PINMUX_DATA_REG("PDDR0", 0xfffe3876, 16, GROUP(
PD15_DATA, PD14_DATA, PD13_DATA, PD12_DATA,
PD11_DATA, PD10_DATA, PD9_DATA, PD8_DATA,
PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
- PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA }
+ PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA ))
},
- { PINMUX_DATA_REG("PEDR0", 0xfffe3896, 16) {
+ { PINMUX_DATA_REG("PEDR0", 0xfffe3896, 16, GROUP(
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, PE5_DATA, PE4_DATA,
- PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA }
+ PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA ))
},
- { PINMUX_DATA_REG("PFDR0", 0xfffe38b6, 16) {
+ { PINMUX_DATA_REG("PFDR0", 0xfffe38b6, 16, GROUP(
0, 0, 0, PF12_DATA,
PF11_DATA, PF10_DATA, PF9_DATA, PF8_DATA,
PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
- PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA }
+ PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA ))
},
- { PINMUX_DATA_REG("PGDR1", 0xfffe38d4, 16) {
+ { PINMUX_DATA_REG("PGDR1", 0xfffe38d4, 16, GROUP(
0, 0, 0, 0, 0, 0, 0, PG24_DATA,
PG23_DATA, PG22_DATA, PG21_DATA, PG20_DATA,
- PG19_DATA, PG18_DATA, PG17_DATA, PG16_DATA }
+ PG19_DATA, PG18_DATA, PG17_DATA, PG16_DATA ))
},
- { PINMUX_DATA_REG("PGDR0", 0xfffe38d6, 16) {
+ { PINMUX_DATA_REG("PGDR0", 0xfffe38d6, 16, GROUP(
PG15_DATA, PG14_DATA, PG13_DATA, PG12_DATA,
PG11_DATA, PG10_DATA, PG9_DATA, PG8_DATA,
PG7_DATA, PG6_DATA, PG5_DATA, PG4_DATA,
- PG3_DATA, PG2_DATA, PG1_DATA, PG0_DATA }
+ PG3_DATA, PG2_DATA, PG1_DATA, PG0_DATA ))
},
- { PINMUX_DATA_REG("PJDR0", 0xfffe3916, 16) {
+ { PINMUX_DATA_REG("PJDR0", 0xfffe3916, 16, GROUP(
0, 0, 0, PJ12_DATA,
PJ11_DATA, PJ10_DATA, PJ9_DATA, PJ8_DATA,
PJ7_DATA, PJ6_DATA, PJ5_DATA, PJ4_DATA,
- PJ3_DATA, PJ2_DATA, PJ1_DATA, PJ0_DATA }
+ PJ3_DATA, PJ2_DATA, PJ1_DATA, PJ0_DATA ))
},
- { PINMUX_DATA_REG("PKDR0", 0xfffe3936, 16) {
+ { PINMUX_DATA_REG("PKDR0", 0xfffe3936, 16, GROUP(
0, 0, 0, PK12_DATA,
PK11_DATA, PK10_DATA, PK9_DATA, PK8_DATA,
PK7_DATA, PK6_DATA, PK5_DATA, PK4_DATA,
- PK3_DATA, PK2_DATA, PK1_DATA, PK0_DATA }
+ PK3_DATA, PK2_DATA, PK1_DATA, PK0_DATA ))
},
{ }
};
diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7269.c b/drivers/pinctrl/sh-pfc/pfc-sh7269.c
index 69409c9..b3a8545 100644
--- a/drivers/pinctrl/sh-pfc/pfc-sh7269.c
+++ b/drivers/pinctrl/sh-pfc/pfc-sh7269.c
@@ -2738,79 +2738,79 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
};
static const struct pinmux_data_reg pinmux_data_regs[] = {
- { PINMUX_DATA_REG("PADR0", 0xfffe3816, 16) {
+ { PINMUX_DATA_REG("PADR0", 0xfffe3816, 16, GROUP(
0, 0, 0, 0, 0, 0, 0, PA1_DATA,
- 0, 0, 0, 0, 0, 0, 0, PA0_DATA }
+ 0, 0, 0, 0, 0, 0, 0, PA0_DATA ))
},
- { PINMUX_DATA_REG("PBDR1", 0xfffe3834, 16) {
+ { PINMUX_DATA_REG("PBDR1", 0xfffe3834, 16, GROUP(
0, 0, 0, 0, 0, 0, 0, 0,
0, PB22_DATA, PB21_DATA, PB20_DATA,
- PB19_DATA, PB18_DATA, PB17_DATA, PB16_DATA }
+ PB19_DATA, PB18_DATA, PB17_DATA, PB16_DATA ))
},
- { PINMUX_DATA_REG("PBDR0", 0xfffe3836, 16) {
+ { PINMUX_DATA_REG("PBDR0", 0xfffe3836, 16, GROUP(
PB15_DATA, PB14_DATA, PB13_DATA, PB12_DATA,
PB11_DATA, PB10_DATA, PB9_DATA, PB8_DATA,
PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
- PB3_DATA, PB2_DATA, PB1_DATA, 0 }
+ PB3_DATA, PB2_DATA, PB1_DATA, 0 ))
},
- { PINMUX_DATA_REG("PCDR0", 0xfffe3856, 16) {
+ { PINMUX_DATA_REG("PCDR0", 0xfffe3856, 16, GROUP(
0, 0, 0, 0,
0, 0, 0, PC8_DATA,
PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
- PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA }
+ PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA ))
},
- { PINMUX_DATA_REG("PDDR0", 0xfffe3876, 16) {
+ { PINMUX_DATA_REG("PDDR0", 0xfffe3876, 16, GROUP(
PD15_DATA, PD14_DATA, PD13_DATA, PD12_DATA,
PD11_DATA, PD10_DATA, PD9_DATA, PD8_DATA,
PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
- PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA }
+ PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA ))
},
- { PINMUX_DATA_REG("PEDR0", 0xfffe3896, 16) {
+ { PINMUX_DATA_REG("PEDR0", 0xfffe3896, 16, GROUP(
0, 0, 0, 0, 0, 0, 0, 0,
PE7_DATA, PE6_DATA, PE5_DATA, PE4_DATA,
- PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA }
+ PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA ))
},
- { PINMUX_DATA_REG("PFDR1", 0xfffe38b4, 16) {
+ { PINMUX_DATA_REG("PFDR1", 0xfffe38b4, 16, GROUP(
0, 0, 0, 0, 0, 0, 0, 0,
PF23_DATA, PF22_DATA, PF21_DATA, PF20_DATA,
- PF19_DATA, PF18_DATA, PF17_DATA, PF16_DATA }
+ PF19_DATA, PF18_DATA, PF17_DATA, PF16_DATA ))
},
- { PINMUX_DATA_REG("PFDR0", 0xfffe38b6, 16) {
+ { PINMUX_DATA_REG("PFDR0", 0xfffe38b6, 16, GROUP(
PF15_DATA, PF14_DATA, PF13_DATA, PF12_DATA,
PF11_DATA, PF10_DATA, PF9_DATA, PF8_DATA,
PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
- PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA }
+ PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA ))
},
- { PINMUX_DATA_REG("PGDR1", 0xfffe38d4, 16) {
+ { PINMUX_DATA_REG("PGDR1", 0xfffe38d4, 16, GROUP(
0, 0, 0, 0,
PG27_DATA, PG26_DATA, PG25_DATA, PG24_DATA,
PG23_DATA, PG22_DATA, PG21_DATA, PG20_DATA,
- PG19_DATA, PG18_DATA, PG17_DATA, PG16_DATA }
+ PG19_DATA, PG18_DATA, PG17_DATA, PG16_DATA ))
},
- { PINMUX_DATA_REG("PGDR0", 0xfffe38d6, 16) {
+ { PINMUX_DATA_REG("PGDR0", 0xfffe38d6, 16, GROUP(
PG15_DATA, PG14_DATA, PG13_DATA, PG12_DATA,
PG11_DATA, PG10_DATA, PG9_DATA, PG8_DATA,
PG7_DATA, PG6_DATA, PG5_DATA, PG4_DATA,
- PG3_DATA, PG2_DATA, PG1_DATA, PG0_DATA }
+ PG3_DATA, PG2_DATA, PG1_DATA, PG0_DATA ))
},
- { PINMUX_DATA_REG("PJDR1", 0xfffe3914, 16) {
+ { PINMUX_DATA_REG("PJDR1", 0xfffe3914, 16, GROUP(
PJ31_DATA, PJ30_DATA, PJ29_DATA, PJ28_DATA,
PJ27_DATA, PJ26_DATA, PJ25_DATA, PJ24_DATA,
PJ23_DATA, PJ22_DATA, PJ21_DATA, PJ20_DATA,
- PJ19_DATA, PJ18_DATA, PJ17_DATA, PJ16_DATA }
+ PJ19_DATA, PJ18_DATA, PJ17_DATA, PJ16_DATA ))
},
- { PINMUX_DATA_REG("PJDR0", 0xfffe3916, 16) {
+ { PINMUX_DATA_REG("PJDR0", 0xfffe3916, 16, GROUP(
PJ15_DATA, PJ14_DATA, PJ13_DATA, PJ12_DATA,
PJ11_DATA, PJ10_DATA, PJ9_DATA, PJ8_DATA,
PJ7_DATA, PJ6_DATA, PJ5_DATA, PJ4_DATA,
- PJ3_DATA, PJ2_DATA, PJ1_DATA, PJ0_DATA }
+ PJ3_DATA, PJ2_DATA, PJ1_DATA, PJ0_DATA ))
},
{ }
diff --git a/drivers/pinctrl/sh-pfc/pfc-sh73a0.c b/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
index 69da689..b3e1baf 100644
--- a/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
+++ b/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
@@ -4091,7 +4091,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
};
static const struct pinmux_data_reg pinmux_data_regs[] = {
- { PINMUX_DATA_REG("PORTL031_000DR", 0xe6054000, 32) {
+ { PINMUX_DATA_REG("PORTL031_000DR", 0xe6054000, 32, GROUP(
PORT31_DATA, PORT30_DATA, PORT29_DATA, PORT28_DATA,
PORT27_DATA, PORT26_DATA, PORT25_DATA, PORT24_DATA,
PORT23_DATA, PORT22_DATA, PORT21_DATA, PORT20_DATA,
@@ -4099,9 +4099,9 @@ static const struct pinmux_data_reg pinmux_data_regs[] = {
PORT15_DATA, PORT14_DATA, PORT13_DATA, PORT12_DATA,
PORT11_DATA, PORT10_DATA, PORT9_DATA, PORT8_DATA,
PORT7_DATA, PORT6_DATA, PORT5_DATA, PORT4_DATA,
- PORT3_DATA, PORT2_DATA, PORT1_DATA, PORT0_DATA }
+ PORT3_DATA, PORT2_DATA, PORT1_DATA, PORT0_DATA ))
},
- { PINMUX_DATA_REG("PORTD063_032DR", 0xe6055000, 32) {
+ { PINMUX_DATA_REG("PORTD063_032DR", 0xe6055000, 32, GROUP(
PORT63_DATA, PORT62_DATA, PORT61_DATA, PORT60_DATA,
PORT59_DATA, PORT58_DATA, PORT57_DATA, PORT56_DATA,
PORT55_DATA, PORT54_DATA, PORT53_DATA, PORT52_DATA,
@@ -4109,9 +4109,9 @@ static const struct pinmux_data_reg pinmux_data_regs[] = {
PORT47_DATA, PORT46_DATA, PORT45_DATA, PORT44_DATA,
PORT43_DATA, PORT42_DATA, PORT41_DATA, PORT40_DATA,
PORT39_DATA, PORT38_DATA, PORT37_DATA, PORT36_DATA,
- PORT35_DATA, PORT34_DATA, PORT33_DATA, PORT32_DATA }
+ PORT35_DATA, PORT34_DATA, PORT33_DATA, PORT32_DATA ))
},
- { PINMUX_DATA_REG("PORTD095_064DR", 0xe6055004, 32) {
+ { PINMUX_DATA_REG("PORTD095_064DR", 0xe6055004, 32, GROUP(
PORT95_DATA, PORT94_DATA, PORT93_DATA, PORT92_DATA,
PORT91_DATA, PORT90_DATA, PORT89_DATA, PORT88_DATA,
PORT87_DATA, PORT86_DATA, PORT85_DATA, PORT84_DATA,
@@ -4119,9 +4119,9 @@ static const struct pinmux_data_reg pinmux_data_regs[] = {
PORT79_DATA, PORT78_DATA, PORT77_DATA, PORT76_DATA,
PORT75_DATA, PORT74_DATA, PORT73_DATA, PORT72_DATA,
PORT71_DATA, PORT70_DATA, PORT69_DATA, PORT68_DATA,
- PORT67_DATA, PORT66_DATA, PORT65_DATA, PORT64_DATA }
+ PORT67_DATA, PORT66_DATA, PORT65_DATA, PORT64_DATA ))
},
- { PINMUX_DATA_REG("PORTR127_096DR", 0xe6056000, 32) {
+ { PINMUX_DATA_REG("PORTR127_096DR", 0xe6056000, 32, GROUP(
0, 0, 0, 0,
0, 0, 0, 0,
0, PORT118_DATA, PORT117_DATA, PORT116_DATA,
@@ -4129,9 +4129,9 @@ static const struct pinmux_data_reg pinmux_data_regs[] = {
PORT111_DATA, PORT110_DATA, PORT109_DATA, PORT108_DATA,
PORT107_DATA, PORT106_DATA, PORT105_DATA, PORT104_DATA,
PORT103_DATA, PORT102_DATA, PORT101_DATA, PORT100_DATA,
- PORT99_DATA, PORT98_DATA, PORT97_DATA, PORT96_DATA }
+ PORT99_DATA, PORT98_DATA, PORT97_DATA, PORT96_DATA ))
},
- { PINMUX_DATA_REG("PORTR159_128DR", 0xe6056004, 32) {
+ { PINMUX_DATA_REG("PORTR159_128DR", 0xe6056004, 32, GROUP(
PORT159_DATA, PORT158_DATA, PORT157_DATA, PORT156_DATA,
PORT155_DATA, PORT154_DATA, PORT153_DATA, PORT152_DATA,
PORT151_DATA, PORT150_DATA, PORT149_DATA, PORT148_DATA,
@@ -4139,9 +4139,9 @@ static const struct pinmux_data_reg pinmux_data_regs[] = {
PORT143_DATA, PORT142_DATA, PORT141_DATA, PORT140_DATA,
PORT139_DATA, PORT138_DATA, PORT137_DATA, PORT136_DATA,
PORT135_DATA, PORT134_DATA, PORT133_DATA, PORT132_DATA,
- PORT131_DATA, PORT130_DATA, PORT129_DATA, PORT128_DATA }
+ PORT131_DATA, PORT130_DATA, PORT129_DATA, PORT128_DATA ))
},
- { PINMUX_DATA_REG("PORTR191_160DR", 0xe6056008, 32) {
+ { PINMUX_DATA_REG("PORTR191_160DR", 0xe6056008, 32, GROUP(
0, 0, 0, 0,
0, 0, 0, 0,
0, 0, 0, 0,
@@ -4149,9 +4149,9 @@ static const struct pinmux_data_reg pinmux_data_regs[] = {
0, 0, 0, 0,
0, 0, 0, 0,
0, 0, 0, PORT164_DATA,
- PORT163_DATA, PORT162_DATA, PORT161_DATA, PORT160_DATA }
+ PORT163_DATA, PORT162_DATA, PORT161_DATA, PORT160_DATA ))
},
- { PINMUX_DATA_REG("PORTR223_192DR", 0xe605600C, 32) {
+ { PINMUX_DATA_REG("PORTR223_192DR", 0xe605600C, 32, GROUP(
PORT223_DATA, PORT222_DATA, PORT221_DATA, PORT220_DATA,
PORT219_DATA, PORT218_DATA, PORT217_DATA, PORT216_DATA,
PORT215_DATA, PORT214_DATA, PORT213_DATA, PORT212_DATA,
@@ -4159,9 +4159,9 @@ static const struct pinmux_data_reg pinmux_data_regs[] = {
PORT207_DATA, PORT206_DATA, PORT205_DATA, PORT204_DATA,
PORT203_DATA, PORT202_DATA, PORT201_DATA, PORT200_DATA,
PORT199_DATA, PORT198_DATA, PORT197_DATA, PORT196_DATA,
- PORT195_DATA, PORT194_DATA, PORT193_DATA, PORT192_DATA }
+ PORT195_DATA, PORT194_DATA, PORT193_DATA, PORT192_DATA ))
},
- { PINMUX_DATA_REG("PORTU255_224DR", 0xe6057000, 32) {
+ { PINMUX_DATA_REG("PORTU255_224DR", 0xe6057000, 32, GROUP(
PORT255_DATA, PORT254_DATA, PORT253_DATA, PORT252_DATA,
PORT251_DATA, PORT250_DATA, PORT249_DATA, PORT248_DATA,
PORT247_DATA, PORT246_DATA, PORT245_DATA, PORT244_DATA,
@@ -4169,9 +4169,9 @@ static const struct pinmux_data_reg pinmux_data_regs[] = {
PORT239_DATA, PORT238_DATA, PORT237_DATA, PORT236_DATA,
PORT235_DATA, PORT234_DATA, PORT233_DATA, PORT232_DATA,
PORT231_DATA, PORT230_DATA, PORT229_DATA, PORT228_DATA,
- PORT227_DATA, PORT226_DATA, PORT225_DATA, PORT224_DATA }
+ PORT227_DATA, PORT226_DATA, PORT225_DATA, PORT224_DATA ))
},
- { PINMUX_DATA_REG("PORTU287_256DR", 0xe6057004, 32) {
+ { PINMUX_DATA_REG("PORTU287_256DR", 0xe6057004, 32, GROUP(
0, 0, 0, 0,
0, PORT282_DATA, PORT281_DATA, PORT280_DATA,
PORT279_DATA, PORT278_DATA, PORT277_DATA, PORT276_DATA,
@@ -4179,9 +4179,9 @@ static const struct pinmux_data_reg pinmux_data_regs[] = {
PORT271_DATA, PORT270_DATA, PORT269_DATA, PORT268_DATA,
PORT267_DATA, PORT266_DATA, PORT265_DATA, PORT264_DATA,
PORT263_DATA, PORT262_DATA, PORT261_DATA, PORT260_DATA,
- PORT259_DATA, PORT258_DATA, PORT257_DATA, PORT256_DATA }
+ PORT259_DATA, PORT258_DATA, PORT257_DATA, PORT256_DATA ))
},
- { PINMUX_DATA_REG("PORTR319_288DR", 0xe6056010, 32) {
+ { PINMUX_DATA_REG("PORTR319_288DR", 0xe6056010, 32, GROUP(
0, 0, 0, 0,
0, 0, 0, 0,
0, 0, PORT309_DATA, PORT308_DATA,
@@ -4189,7 +4189,7 @@ static const struct pinmux_data_reg pinmux_data_regs[] = {
PORT303_DATA, PORT302_DATA, PORT301_DATA, PORT300_DATA,
PORT299_DATA, PORT298_DATA, PORT297_DATA, PORT296_DATA,
PORT295_DATA, PORT294_DATA, PORT293_DATA, PORT292_DATA,
- PORT291_DATA, PORT290_DATA, PORT289_DATA, PORT288_DATA }
+ PORT291_DATA, PORT290_DATA, PORT289_DATA, PORT288_DATA ))
},
{ },
};
diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7720.c b/drivers/pinctrl/sh-pfc/pfc-sh7720.c
index ce00198..43c1f54 100644
--- a/drivers/pinctrl/sh-pfc/pfc-sh7720.c
+++ b/drivers/pinctrl/sh-pfc/pfc-sh7720.c
@@ -1112,77 +1112,77 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
};
static const struct pinmux_data_reg pinmux_data_regs[] = {
- { PINMUX_DATA_REG("PADR", 0xa4050140, 8) {
+ { PINMUX_DATA_REG("PADR", 0xa4050140, 8, GROUP(
PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA,
- PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA }
+ PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA ))
},
- { PINMUX_DATA_REG("PBDR", 0xa4050142, 8) {
+ { PINMUX_DATA_REG("PBDR", 0xa4050142, 8, GROUP(
PTB7_DATA, PTB6_DATA, PTB5_DATA, PTB4_DATA,
- PTB3_DATA, PTB2_DATA, PTB1_DATA, PTB0_DATA }
+ PTB3_DATA, PTB2_DATA, PTB1_DATA, PTB0_DATA ))
},
- { PINMUX_DATA_REG("PCDR", 0xa4050144, 8) {
+ { PINMUX_DATA_REG("PCDR", 0xa4050144, 8, GROUP(
PTC7_DATA, PTC6_DATA, PTC5_DATA, PTC4_DATA,
- PTC3_DATA, PTC2_DATA, PTC1_DATA, PTC0_DATA }
+ PTC3_DATA, PTC2_DATA, PTC1_DATA, PTC0_DATA ))
},
- { PINMUX_DATA_REG("PDDR", 0xa4050126, 8) {
+ { PINMUX_DATA_REG("PDDR", 0xa4050126, 8, GROUP(
PTD7_DATA, PTD6_DATA, PTD5_DATA, PTD4_DATA,
- PTD3_DATA, PTD2_DATA, PTD1_DATA, PTD0_DATA }
+ PTD3_DATA, PTD2_DATA, PTD1_DATA, PTD0_DATA ))
},
- { PINMUX_DATA_REG("PEDR", 0xa4050148, 8) {
+ { PINMUX_DATA_REG("PEDR", 0xa4050148, 8, GROUP(
0, PTE6_DATA, PTE5_DATA, PTE4_DATA,
- PTE3_DATA, PTE2_DATA, PTE1_DATA, PTE0_DATA }
+ PTE3_DATA, PTE2_DATA, PTE1_DATA, PTE0_DATA ))
},
- { PINMUX_DATA_REG("PFDR", 0xa405014a, 8) {
+ { PINMUX_DATA_REG("PFDR", 0xa405014a, 8, GROUP(
0, PTF6_DATA, PTF5_DATA, PTF4_DATA,
- PTF3_DATA, PTF2_DATA, PTF1_DATA, PTF0_DATA }
+ PTF3_DATA, PTF2_DATA, PTF1_DATA, PTF0_DATA ))
},
- { PINMUX_DATA_REG("PGDR", 0xa405014c, 8) {
+ { PINMUX_DATA_REG("PGDR", 0xa405014c, 8, GROUP(
0, PTG6_DATA, PTG5_DATA, PTG4_DATA,
- PTG3_DATA, PTG2_DATA, PTG1_DATA, PTG0_DATA }
+ PTG3_DATA, PTG2_DATA, PTG1_DATA, PTG0_DATA ))
},
- { PINMUX_DATA_REG("PHDR", 0xa405014e, 8) {
+ { PINMUX_DATA_REG("PHDR", 0xa405014e, 8, GROUP(
0, PTH6_DATA, PTH5_DATA, PTH4_DATA,
- PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA }
+ PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA ))
},
- { PINMUX_DATA_REG("PJDR", 0xa4050150, 8) {
+ { PINMUX_DATA_REG("PJDR", 0xa4050150, 8, GROUP(
0, PTJ6_DATA, PTJ5_DATA, PTJ4_DATA,
- PTJ3_DATA, PTJ2_DATA, PTJ1_DATA, PTJ0_DATA }
+ PTJ3_DATA, PTJ2_DATA, PTJ1_DATA, PTJ0_DATA ))
},
- { PINMUX_DATA_REG("PKDR", 0xa4050152, 8) {
+ { PINMUX_DATA_REG("PKDR", 0xa4050152, 8, GROUP(
0, 0, 0, 0,
- PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA }
+ PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA ))
},
- { PINMUX_DATA_REG("PLDR", 0xa4050154, 8) {
+ { PINMUX_DATA_REG("PLDR", 0xa4050154, 8, GROUP(
PTL7_DATA, PTL6_DATA, PTL5_DATA, PTL4_DATA,
- PTL3_DATA, 0, 0, 0 }
+ PTL3_DATA, 0, 0, 0 ))
},
- { PINMUX_DATA_REG("PMDR", 0xa4050156, 8) {
+ { PINMUX_DATA_REG("PMDR", 0xa4050156, 8, GROUP(
PTM7_DATA, PTM6_DATA, PTM5_DATA, PTM4_DATA,
- PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA }
+ PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA ))
},
- { PINMUX_DATA_REG("PPDR", 0xa4050158, 8) {
+ { PINMUX_DATA_REG("PPDR", 0xa4050158, 8, GROUP(
0, 0, 0, PTP4_DATA,
- PTP3_DATA, PTP2_DATA, PTP1_DATA, PTP0_DATA }
+ PTP3_DATA, PTP2_DATA, PTP1_DATA, PTP0_DATA ))
},
- { PINMUX_DATA_REG("PRDR", 0xa405015a, 8) {
+ { PINMUX_DATA_REG("PRDR", 0xa405015a, 8, GROUP(
PTR7_DATA, PTR6_DATA, PTR5_DATA, PTR4_DATA,
- PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA }
+ PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA ))
},
- { PINMUX_DATA_REG("PSDR", 0xa405015c, 8) {
+ { PINMUX_DATA_REG("PSDR", 0xa405015c, 8, GROUP(
0, 0, 0, PTS4_DATA,
- PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA }
+ PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA ))
},
- { PINMUX_DATA_REG("PTDR", 0xa405015e, 8) {
+ { PINMUX_DATA_REG("PTDR", 0xa405015e, 8, GROUP(
0, 0, 0, PTT4_DATA,
- PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA }
+ PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA ))
},
- { PINMUX_DATA_REG("PUDR", 0xa4050160, 8) {
+ { PINMUX_DATA_REG("PUDR", 0xa4050160, 8, GROUP(
0, 0, 0, PTU4_DATA,
- PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA }
+ PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA ))
},
- { PINMUX_DATA_REG("PVDR", 0xa4050162, 8) {
+ { PINMUX_DATA_REG("PVDR", 0xa4050162, 8, GROUP(
0, 0, 0, PTV4_DATA,
- PTV3_DATA, PTV2_DATA, PTV1_DATA, PTV0_DATA }
+ PTV3_DATA, PTV2_DATA, PTV1_DATA, PTV0_DATA ))
},
{ },
};
diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7722.c b/drivers/pinctrl/sh-pfc/pfc-sh7722.c
index 7d5d614..95295be 100644
--- a/drivers/pinctrl/sh-pfc/pfc-sh7722.c
+++ b/drivers/pinctrl/sh-pfc/pfc-sh7722.c
@@ -1633,97 +1633,97 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
};
static const struct pinmux_data_reg pinmux_data_regs[] = {
- { PINMUX_DATA_REG("PADR", 0xa4050120, 8) {
+ { PINMUX_DATA_REG("PADR", 0xa4050120, 8, GROUP(
PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA,
- PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA }
+ PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA ))
},
- { PINMUX_DATA_REG("PBDR", 0xa4050122, 8) {
+ { PINMUX_DATA_REG("PBDR", 0xa4050122, 8, GROUP(
PTB7_DATA, PTB6_DATA, PTB5_DATA, PTB4_DATA,
- PTB3_DATA, PTB2_DATA, PTB1_DATA, PTB0_DATA }
+ PTB3_DATA, PTB2_DATA, PTB1_DATA, PTB0_DATA ))
},
- { PINMUX_DATA_REG("PCDR", 0xa4050124, 8) {
+ { PINMUX_DATA_REG("PCDR", 0xa4050124, 8, GROUP(
PTC7_DATA, 0, PTC5_DATA, PTC4_DATA,
- PTC3_DATA, PTC2_DATA, 0, PTC0_DATA }
+ PTC3_DATA, PTC2_DATA, 0, PTC0_DATA ))
},
- { PINMUX_DATA_REG("PDDR", 0xa4050126, 8) {
+ { PINMUX_DATA_REG("PDDR", 0xa4050126, 8, GROUP(
PTD7_DATA, PTD6_DATA, PTD5_DATA, PTD4_DATA,
- PTD3_DATA, PTD2_DATA, PTD1_DATA, PTD0_DATA }
+ PTD3_DATA, PTD2_DATA, PTD1_DATA, PTD0_DATA ))
},
- { PINMUX_DATA_REG("PEDR", 0xa4050128, 8) {
+ { PINMUX_DATA_REG("PEDR", 0xa4050128, 8, GROUP(
PTE7_DATA, PTE6_DATA, PTE5_DATA, PTE4_DATA,
- 0, 0, PTE1_DATA, PTE0_DATA }
+ 0, 0, PTE1_DATA, PTE0_DATA ))
},
- { PINMUX_DATA_REG("PFDR", 0xa405012a, 8) {
+ { PINMUX_DATA_REG("PFDR", 0xa405012a, 8, GROUP(
0, PTF6_DATA, PTF5_DATA, PTF4_DATA,
- PTF3_DATA, PTF2_DATA, PTF1_DATA, PTF0_DATA }
+ PTF3_DATA, PTF2_DATA, PTF1_DATA, PTF0_DATA ))
},
- { PINMUX_DATA_REG("PGDR", 0xa405012c, 8) {
+ { PINMUX_DATA_REG("PGDR", 0xa405012c, 8, GROUP(
0, 0, 0, PTG4_DATA,
- PTG3_DATA, PTG2_DATA, PTG1_DATA, PTG0_DATA }
+ PTG3_DATA, PTG2_DATA, PTG1_DATA, PTG0_DATA ))
},
- { PINMUX_DATA_REG("PHDR", 0xa405012e, 8) {
+ { PINMUX_DATA_REG("PHDR", 0xa405012e, 8, GROUP(
PTH7_DATA, PTH6_DATA, PTH5_DATA, PTH4_DATA,
- PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA }
+ PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA ))
},
- { PINMUX_DATA_REG("PJDR", 0xa4050130, 8) {
+ { PINMUX_DATA_REG("PJDR", 0xa4050130, 8, GROUP(
PTJ7_DATA, PTJ6_DATA, PTJ5_DATA, 0,
- 0, 0, PTJ1_DATA, PTJ0_DATA }
+ 0, 0, PTJ1_DATA, PTJ0_DATA ))
},
- { PINMUX_DATA_REG("PKDR", 0xa4050132, 8) {
+ { PINMUX_DATA_REG("PKDR", 0xa4050132, 8, GROUP(
0, PTK6_DATA, PTK5_DATA, PTK4_DATA,
- PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA }
+ PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA ))
},
- { PINMUX_DATA_REG("PLDR", 0xa4050134, 8) {
+ { PINMUX_DATA_REG("PLDR", 0xa4050134, 8, GROUP(
PTL7_DATA, PTL6_DATA, PTL5_DATA, PTL4_DATA,
- PTL3_DATA, PTL2_DATA, PTL1_DATA, PTL0_DATA }
+ PTL3_DATA, PTL2_DATA, PTL1_DATA, PTL0_DATA ))
},
- { PINMUX_DATA_REG("PMDR", 0xa4050136, 8) {
+ { PINMUX_DATA_REG("PMDR", 0xa4050136, 8, GROUP(
PTM7_DATA, PTM6_DATA, PTM5_DATA, PTM4_DATA,
- PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA }
+ PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA ))
},
- { PINMUX_DATA_REG("PNDR", 0xa4050138, 8) {
+ { PINMUX_DATA_REG("PNDR", 0xa4050138, 8, GROUP(
PTN7_DATA, PTN6_DATA, PTN5_DATA, PTN4_DATA,
- PTN3_DATA, PTN2_DATA, PTN1_DATA, PTN0_DATA }
+ PTN3_DATA, PTN2_DATA, PTN1_DATA, PTN0_DATA ))
},
- { PINMUX_DATA_REG("PQDR", 0xa405013a, 8) {
+ { PINMUX_DATA_REG("PQDR", 0xa405013a, 8, GROUP(
0, PTQ6_DATA, PTQ5_DATA, PTQ4_DATA,
- PTQ3_DATA, PTQ2_DATA, PTQ1_DATA, PTQ0_DATA }
+ PTQ3_DATA, PTQ2_DATA, PTQ1_DATA, PTQ0_DATA ))
},
- { PINMUX_DATA_REG("PRDR", 0xa405013c, 8) {
+ { PINMUX_DATA_REG("PRDR", 0xa405013c, 8, GROUP(
0, 0, 0, PTR4_DATA,
- PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA }
+ PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA ))
},
- { PINMUX_DATA_REG("PSDR", 0xa405013e, 8) {
+ { PINMUX_DATA_REG("PSDR", 0xa405013e, 8, GROUP(
0, 0, 0, PTS4_DATA,
- PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA }
+ PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA ))
},
- { PINMUX_DATA_REG("PTDR", 0xa4050160, 8) {
+ { PINMUX_DATA_REG("PTDR", 0xa4050160, 8, GROUP(
0, 0, 0, PTT4_DATA,
- PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA }
+ PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA ))
},
- { PINMUX_DATA_REG("PUDR", 0xa4050162, 8) {
+ { PINMUX_DATA_REG("PUDR", 0xa4050162, 8, GROUP(
0, 0, 0, PTU4_DATA,
- PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA }
+ PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA ))
},
- { PINMUX_DATA_REG("PVDR", 0xa4050164, 8) {
+ { PINMUX_DATA_REG("PVDR", 0xa4050164, 8, GROUP(
0, 0, 0, PTV4_DATA,
- PTV3_DATA, PTV2_DATA, PTV1_DATA, PTV0_DATA }
+ PTV3_DATA, PTV2_DATA, PTV1_DATA, PTV0_DATA ))
},
- { PINMUX_DATA_REG("PWDR", 0xa4050166, 8) {
+ { PINMUX_DATA_REG("PWDR", 0xa4050166, 8, GROUP(
0, PTW6_DATA, PTW5_DATA, PTW4_DATA,
- PTW3_DATA, PTW2_DATA, PTW1_DATA, PTW0_DATA }
+ PTW3_DATA, PTW2_DATA, PTW1_DATA, PTW0_DATA ))
},
- { PINMUX_DATA_REG("PXDR", 0xa4050168, 8) {
+ { PINMUX_DATA_REG("PXDR", 0xa4050168, 8, GROUP(
0, PTX6_DATA, PTX5_DATA, PTX4_DATA,
- PTX3_DATA, PTX2_DATA, PTX1_DATA, PTX0_DATA }
+ PTX3_DATA, PTX2_DATA, PTX1_DATA, PTX0_DATA ))
},
- { PINMUX_DATA_REG("PYDR", 0xa405016a, 8) {
+ { PINMUX_DATA_REG("PYDR", 0xa405016a, 8, GROUP(
0, PTY6_DATA, PTY5_DATA, PTY4_DATA,
- PTY3_DATA, PTY2_DATA, PTY1_DATA, PTY0_DATA }
+ PTY3_DATA, PTY2_DATA, PTY1_DATA, PTY0_DATA ))
},
- { PINMUX_DATA_REG("PZDR", 0xa405016c, 8) {
+ { PINMUX_DATA_REG("PZDR", 0xa405016c, 8, GROUP(
0, 0, PTZ5_DATA, PTZ4_DATA,
- PTZ3_DATA, PTZ2_DATA, PTZ1_DATA, PTZ0_DATA }
+ PTZ3_DATA, PTZ2_DATA, PTZ1_DATA, PTZ0_DATA ))
},
{ },
};
diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7723.c b/drivers/pinctrl/sh-pfc/pfc-sh7723.c
index 6d6b82b..eb2d584 100644
--- a/drivers/pinctrl/sh-pfc/pfc-sh7723.c
+++ b/drivers/pinctrl/sh-pfc/pfc-sh7723.c
@@ -1784,97 +1784,97 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
};
static const struct pinmux_data_reg pinmux_data_regs[] = {
- { PINMUX_DATA_REG("PADR", 0xa4050120, 8) {
+ { PINMUX_DATA_REG("PADR", 0xa4050120, 8, GROUP(
PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA,
- PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA }
+ PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA ))
},
- { PINMUX_DATA_REG("PBDR", 0xa4050122, 8) {
+ { PINMUX_DATA_REG("PBDR", 0xa4050122, 8, GROUP(
PTB7_DATA, PTB6_DATA, PTB5_DATA, PTB4_DATA,
- PTB3_DATA, PTB2_DATA, PTB1_DATA, PTB0_DATA }
+ PTB3_DATA, PTB2_DATA, PTB1_DATA, PTB0_DATA ))
},
- { PINMUX_DATA_REG("PCDR", 0xa4050124, 8) {
+ { PINMUX_DATA_REG("PCDR", 0xa4050124, 8, GROUP(
PTC7_DATA, PTC6_DATA, PTC5_DATA, PTC4_DATA,
- PTC3_DATA, PTC2_DATA, PTC1_DATA, PTC0_DATA }
+ PTC3_DATA, PTC2_DATA, PTC1_DATA, PTC0_DATA ))
},
- { PINMUX_DATA_REG("PDDR", 0xa4050126, 8) {
+ { PINMUX_DATA_REG("PDDR", 0xa4050126, 8, GROUP(
PTD7_DATA, PTD6_DATA, PTD5_DATA, PTD4_DATA,
- PTD3_DATA, PTD2_DATA, PTD1_DATA, PTD0_DATA }
+ PTD3_DATA, PTD2_DATA, PTD1_DATA, PTD0_DATA ))
},
- { PINMUX_DATA_REG("PEDR", 0xa4050128, 8) {
+ { PINMUX_DATA_REG("PEDR", 0xa4050128, 8, GROUP(
0, 0, PTE5_DATA, PTE4_DATA,
- PTE3_DATA, PTE2_DATA, PTE1_DATA, PTE0_DATA }
+ PTE3_DATA, PTE2_DATA, PTE1_DATA, PTE0_DATA ))
},
- { PINMUX_DATA_REG("PFDR", 0xa405012a, 8) {
+ { PINMUX_DATA_REG("PFDR", 0xa405012a, 8, GROUP(
PTF7_DATA, PTF6_DATA, PTF5_DATA, PTF4_DATA,
- PTF3_DATA, PTF2_DATA, PTF1_DATA, PTF0_DATA }
+ PTF3_DATA, PTF2_DATA, PTF1_DATA, PTF0_DATA ))
},
- { PINMUX_DATA_REG("PGDR", 0xa405012c, 8) {
+ { PINMUX_DATA_REG("PGDR", 0xa405012c, 8, GROUP(
0, 0, PTG5_DATA, PTG4_DATA,
- PTG3_DATA, PTG2_DATA, PTG1_DATA, PTG0_DATA }
+ PTG3_DATA, PTG2_DATA, PTG1_DATA, PTG0_DATA ))
},
- { PINMUX_DATA_REG("PHDR", 0xa405012e, 8) {
+ { PINMUX_DATA_REG("PHDR", 0xa405012e, 8, GROUP(
PTH7_DATA, PTH6_DATA, PTH5_DATA, PTH4_DATA,
- PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA }
+ PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA ))
},
- { PINMUX_DATA_REG("PJDR", 0xa4050130, 8) {
+ { PINMUX_DATA_REG("PJDR", 0xa4050130, 8, GROUP(
PTJ7_DATA, 0, PTJ5_DATA, 0,
- PTJ3_DATA, PTJ2_DATA, PTJ1_DATA, PTJ0_DATA }
+ PTJ3_DATA, PTJ2_DATA, PTJ1_DATA, PTJ0_DATA ))
},
- { PINMUX_DATA_REG("PKDR", 0xa4050132, 8) {
+ { PINMUX_DATA_REG("PKDR", 0xa4050132, 8, GROUP(
PTK7_DATA, PTK6_DATA, PTK5_DATA, PTK4_DATA,
- PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA }
+ PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA ))
},
- { PINMUX_DATA_REG("PLDR", 0xa4050134, 8) {
+ { PINMUX_DATA_REG("PLDR", 0xa4050134, 8, GROUP(
PTL7_DATA, PTL6_DATA, PTL5_DATA, PTL4_DATA,
- PTL3_DATA, PTL2_DATA, PTL1_DATA, PTL0_DATA }
+ PTL3_DATA, PTL2_DATA, PTL1_DATA, PTL0_DATA ))
},
- { PINMUX_DATA_REG("PMDR", 0xa4050136, 8) {
+ { PINMUX_DATA_REG("PMDR", 0xa4050136, 8, GROUP(
PTM7_DATA, PTM6_DATA, PTM5_DATA, PTM4_DATA,
- PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA }
+ PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA ))
},
- { PINMUX_DATA_REG("PNDR", 0xa4050138, 8) {
+ { PINMUX_DATA_REG("PNDR", 0xa4050138, 8, GROUP(
PTN7_DATA, PTN6_DATA, PTN5_DATA, PTN4_DATA,
- PTN3_DATA, PTN2_DATA, PTN1_DATA, PTN0_DATA }
+ PTN3_DATA, PTN2_DATA, PTN1_DATA, PTN0_DATA ))
},
- { PINMUX_DATA_REG("PQDR", 0xa405013a, 8) {
+ { PINMUX_DATA_REG("PQDR", 0xa405013a, 8, GROUP(
0, 0, 0, 0,
- PTQ3_DATA, PTQ2_DATA, PTQ1_DATA, PTQ0_DATA }
+ PTQ3_DATA, PTQ2_DATA, PTQ1_DATA, PTQ0_DATA ))
},
- { PINMUX_DATA_REG("PRDR", 0xa405013c, 8) {
+ { PINMUX_DATA_REG("PRDR", 0xa405013c, 8, GROUP(
PTR7_DATA, PTR6_DATA, PTR5_DATA, PTR4_DATA,
- PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA }
+ PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA ))
},
- { PINMUX_DATA_REG("PSDR", 0xa405013e, 8) {
+ { PINMUX_DATA_REG("PSDR", 0xa405013e, 8, GROUP(
PTS7_DATA, PTS6_DATA, PTS5_DATA, PTS4_DATA,
- PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA }
+ PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA ))
},
- { PINMUX_DATA_REG("PTDR", 0xa4050160, 8) {
+ { PINMUX_DATA_REG("PTDR", 0xa4050160, 8, GROUP(
0, 0, PTT5_DATA, PTT4_DATA,
- PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA }
+ PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA ))
},
- { PINMUX_DATA_REG("PUDR", 0xa4050162, 8) {
+ { PINMUX_DATA_REG("PUDR", 0xa4050162, 8, GROUP(
0, 0, PTU5_DATA, PTU4_DATA,
- PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA }
+ PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA ))
},
- { PINMUX_DATA_REG("PVDR", 0xa4050164, 8) {
+ { PINMUX_DATA_REG("PVDR", 0xa4050164, 8, GROUP(
PTV7_DATA, PTV6_DATA, PTV5_DATA, PTV4_DATA,
- PTV3_DATA, PTV2_DATA, PTV1_DATA, PTV0_DATA }
+ PTV3_DATA, PTV2_DATA, PTV1_DATA, PTV0_DATA ))
},
- { PINMUX_DATA_REG("PWDR", 0xa4050166, 8) {
+ { PINMUX_DATA_REG("PWDR", 0xa4050166, 8, GROUP(
PTW7_DATA, PTW6_DATA, PTW5_DATA, PTW4_DATA,
- PTW3_DATA, PTW2_DATA, PTW1_DATA, PTW0_DATA }
+ PTW3_DATA, PTW2_DATA, PTW1_DATA, PTW0_DATA ))
},
- { PINMUX_DATA_REG("PXDR", 0xa4050168, 8) {
+ { PINMUX_DATA_REG("PXDR", 0xa4050168, 8, GROUP(
PTX7_DATA, PTX6_DATA, PTX5_DATA, PTX4_DATA,
- PTX3_DATA, PTX2_DATA, PTX1_DATA, PTX0_DATA }
+ PTX3_DATA, PTX2_DATA, PTX1_DATA, PTX0_DATA ))
},
- { PINMUX_DATA_REG("PYDR", 0xa405016a, 8) {
+ { PINMUX_DATA_REG("PYDR", 0xa405016a, 8, GROUP(
PTY7_DATA, PTY6_DATA, PTY5_DATA, PTY4_DATA,
- PTY3_DATA, PTY2_DATA, PTY1_DATA, PTY0_DATA }
+ PTY3_DATA, PTY2_DATA, PTY1_DATA, PTY0_DATA ))
},
- { PINMUX_DATA_REG("PZDR", 0xa405016c, 8) {
+ { PINMUX_DATA_REG("PZDR", 0xa405016c, 8, GROUP(
PTZ7_DATA, PTZ6_DATA, PTZ5_DATA, PTZ4_DATA,
- PTZ3_DATA, PTZ2_DATA, PTZ1_DATA, PTZ0_DATA }
+ PTZ3_DATA, PTZ2_DATA, PTZ1_DATA, PTZ0_DATA ))
},
{ },
};
diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7724.c b/drivers/pinctrl/sh-pfc/pfc-sh7724.c
index e9e70d7..e3d6eab 100644
--- a/drivers/pinctrl/sh-pfc/pfc-sh7724.c
+++ b/drivers/pinctrl/sh-pfc/pfc-sh7724.c
@@ -2066,97 +2066,97 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
};
static const struct pinmux_data_reg pinmux_data_regs[] = {
- { PINMUX_DATA_REG("PADR", 0xa4050120, 8) {
+ { PINMUX_DATA_REG("PADR", 0xa4050120, 8, GROUP(
PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA,
- PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA }
+ PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA ))
},
- { PINMUX_DATA_REG("PBDR", 0xa4050122, 8) {
+ { PINMUX_DATA_REG("PBDR", 0xa4050122, 8, GROUP(
PTB7_DATA, PTB6_DATA, PTB5_DATA, PTB4_DATA,
- PTB3_DATA, PTB2_DATA, PTB1_DATA, PTB0_DATA }
+ PTB3_DATA, PTB2_DATA, PTB1_DATA, PTB0_DATA ))
},
- { PINMUX_DATA_REG("PCDR", 0xa4050124, 8) {
+ { PINMUX_DATA_REG("PCDR", 0xa4050124, 8, GROUP(
PTC7_DATA, PTC6_DATA, PTC5_DATA, PTC4_DATA,
- PTC3_DATA, PTC2_DATA, PTC1_DATA, PTC0_DATA }
+ PTC3_DATA, PTC2_DATA, PTC1_DATA, PTC0_DATA ))
},
- { PINMUX_DATA_REG("PDDR", 0xa4050126, 8) {
+ { PINMUX_DATA_REG("PDDR", 0xa4050126, 8, GROUP(
PTD7_DATA, PTD6_DATA, PTD5_DATA, PTD4_DATA,
- PTD3_DATA, PTD2_DATA, PTD1_DATA, PTD0_DATA }
+ PTD3_DATA, PTD2_DATA, PTD1_DATA, PTD0_DATA ))
},
- { PINMUX_DATA_REG("PEDR", 0xa4050128, 8) {
+ { PINMUX_DATA_REG("PEDR", 0xa4050128, 8, GROUP(
PTE7_DATA, PTE6_DATA, PTE5_DATA, PTE4_DATA,
- PTE3_DATA, PTE2_DATA, PTE1_DATA, PTE0_DATA }
+ PTE3_DATA, PTE2_DATA, PTE1_DATA, PTE0_DATA ))
},
- { PINMUX_DATA_REG("PFDR", 0xa405012a, 8) {
+ { PINMUX_DATA_REG("PFDR", 0xa405012a, 8, GROUP(
PTF7_DATA, PTF6_DATA, PTF5_DATA, PTF4_DATA,
- PTF3_DATA, PTF2_DATA, PTF1_DATA, PTF0_DATA }
+ PTF3_DATA, PTF2_DATA, PTF1_DATA, PTF0_DATA ))
},
- { PINMUX_DATA_REG("PGDR", 0xa405012c, 8) {
+ { PINMUX_DATA_REG("PGDR", 0xa405012c, 8, GROUP(
0, 0, PTG5_DATA, PTG4_DATA,
- PTG3_DATA, PTG2_DATA, PTG1_DATA, PTG0_DATA }
+ PTG3_DATA, PTG2_DATA, PTG1_DATA, PTG0_DATA ))
},
- { PINMUX_DATA_REG("PHDR", 0xa405012e, 8) {
+ { PINMUX_DATA_REG("PHDR", 0xa405012e, 8, GROUP(
PTH7_DATA, PTH6_DATA, PTH5_DATA, PTH4_DATA,
- PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA }
+ PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA ))
},
- { PINMUX_DATA_REG("PJDR", 0xa4050130, 8) {
+ { PINMUX_DATA_REG("PJDR", 0xa4050130, 8, GROUP(
PTJ7_DATA, PTJ6_DATA, PTJ5_DATA, 0,
- PTJ3_DATA, PTJ2_DATA, PTJ1_DATA, PTJ0_DATA }
+ PTJ3_DATA, PTJ2_DATA, PTJ1_DATA, PTJ0_DATA ))
},
- { PINMUX_DATA_REG("PKDR", 0xa4050132, 8) {
+ { PINMUX_DATA_REG("PKDR", 0xa4050132, 8, GROUP(
PTK7_DATA, PTK6_DATA, PTK5_DATA, PTK4_DATA,
- PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA }
+ PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA ))
},
- { PINMUX_DATA_REG("PLDR", 0xa4050134, 8) {
+ { PINMUX_DATA_REG("PLDR", 0xa4050134, 8, GROUP(
PTL7_DATA, PTL6_DATA, PTL5_DATA, PTL4_DATA,
- PTL3_DATA, PTL2_DATA, PTL1_DATA, PTL0_DATA }
+ PTL3_DATA, PTL2_DATA, PTL1_DATA, PTL0_DATA ))
},
- { PINMUX_DATA_REG("PMDR", 0xa4050136, 8) {
+ { PINMUX_DATA_REG("PMDR", 0xa4050136, 8, GROUP(
PTM7_DATA, PTM6_DATA, PTM5_DATA, PTM4_DATA,
- PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA }
+ PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA ))
},
- { PINMUX_DATA_REG("PNDR", 0xa4050138, 8) {
+ { PINMUX_DATA_REG("PNDR", 0xa4050138, 8, GROUP(
PTN7_DATA, PTN6_DATA, PTN5_DATA, PTN4_DATA,
- PTN3_DATA, PTN2_DATA, PTN1_DATA, PTN0_DATA }
+ PTN3_DATA, PTN2_DATA, PTN1_DATA, PTN0_DATA ))
},
- { PINMUX_DATA_REG("PQDR", 0xa405013a, 8) {
+ { PINMUX_DATA_REG("PQDR", 0xa405013a, 8, GROUP(
PTQ7_DATA, PTQ6_DATA, PTQ5_DATA, PTQ4_DATA,
- PTQ3_DATA, PTQ2_DATA, PTQ1_DATA, PTQ0_DATA }
+ PTQ3_DATA, PTQ2_DATA, PTQ1_DATA, PTQ0_DATA ))
},
- { PINMUX_DATA_REG("PRDR", 0xa405013c, 8) {
+ { PINMUX_DATA_REG("PRDR", 0xa405013c, 8, GROUP(
PTR7_DATA, PTR6_DATA, PTR5_DATA, PTR4_DATA,
- PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA }
+ PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA ))
},
- { PINMUX_DATA_REG("PSDR", 0xa405013e, 8) {
+ { PINMUX_DATA_REG("PSDR", 0xa405013e, 8, GROUP(
0, PTS6_DATA, PTS5_DATA, PTS4_DATA,
- PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA }
+ PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA ))
},
- { PINMUX_DATA_REG("PTDR", 0xa4050160, 8) {
+ { PINMUX_DATA_REG("PTDR", 0xa4050160, 8, GROUP(
PTT7_DATA, PTT6_DATA, PTT5_DATA, PTT4_DATA,
- PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA }
+ PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA ))
},
- { PINMUX_DATA_REG("PUDR", 0xa4050162, 8) {
+ { PINMUX_DATA_REG("PUDR", 0xa4050162, 8, GROUP(
PTU7_DATA, PTU6_DATA, PTU5_DATA, PTU4_DATA,
- PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA }
+ PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA ))
},
- { PINMUX_DATA_REG("PVDR", 0xa4050164, 8) {
+ { PINMUX_DATA_REG("PVDR", 0xa4050164, 8, GROUP(
PTV7_DATA, PTV6_DATA, PTV5_DATA, PTV4_DATA,
- PTV3_DATA, PTV2_DATA, PTV1_DATA, PTV0_DATA }
+ PTV3_DATA, PTV2_DATA, PTV1_DATA, PTV0_DATA ))
},
- { PINMUX_DATA_REG("PWDR", 0xa4050166, 8) {
+ { PINMUX_DATA_REG("PWDR", 0xa4050166, 8, GROUP(
PTW7_DATA, PTW6_DATA, PTW5_DATA, PTW4_DATA,
- PTW3_DATA, PTW2_DATA, PTW1_DATA, PTW0_DATA }
+ PTW3_DATA, PTW2_DATA, PTW1_DATA, PTW0_DATA ))
},
- { PINMUX_DATA_REG("PXDR", 0xa4050168, 8) {
+ { PINMUX_DATA_REG("PXDR", 0xa4050168, 8, GROUP(
PTX7_DATA, PTX6_DATA, PTX5_DATA, PTX4_DATA,
- PTX3_DATA, PTX2_DATA, PTX1_DATA, PTX0_DATA }
+ PTX3_DATA, PTX2_DATA, PTX1_DATA, PTX0_DATA ))
},
- { PINMUX_DATA_REG("PYDR", 0xa405016a, 8) {
+ { PINMUX_DATA_REG("PYDR", 0xa405016a, 8, GROUP(
PTY7_DATA, PTY6_DATA, PTY5_DATA, PTY4_DATA,
- PTY3_DATA, PTY2_DATA, PTY1_DATA, PTY0_DATA }
+ PTY3_DATA, PTY2_DATA, PTY1_DATA, PTY0_DATA ))
},
- { PINMUX_DATA_REG("PZDR", 0xa405016c, 8) {
+ { PINMUX_DATA_REG("PZDR", 0xa405016c, 8, GROUP(
PTZ7_DATA, PTZ6_DATA, PTZ5_DATA, PTZ4_DATA,
- PTZ3_DATA, PTZ2_DATA, PTZ1_DATA, PTZ0_DATA }
+ PTZ3_DATA, PTZ2_DATA, PTZ1_DATA, PTZ0_DATA ))
},
{ },
};
diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7734.c b/drivers/pinctrl/sh-pfc/pfc-sh7734.c
index 42c2234a..dd5c0f4 100644
--- a/drivers/pinctrl/sh-pfc/pfc-sh7734.c
+++ b/drivers/pinctrl/sh-pfc/pfc-sh7734.c
@@ -2428,17 +2428,17 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
static const struct pinmux_data_reg pinmux_data_regs[] = {
/* GPIO 0 - 5*/
- { PINMUX_DATA_REG("INDT0", 0xFFC4000C, 32) { GP_INDT(0) } },
- { PINMUX_DATA_REG("INDT1", 0xFFC4100C, 32) { GP_INDT(1) } },
- { PINMUX_DATA_REG("INDT2", 0xFFC4200C, 32) { GP_INDT(2) } },
- { PINMUX_DATA_REG("INDT3", 0xFFC4300C, 32) { GP_INDT(3) } },
- { PINMUX_DATA_REG("INDT4", 0xFFC4400C, 32) { GP_INDT(4) } },
- { PINMUX_DATA_REG("INDT5", 0xFFC4500C, 32) {
+ { PINMUX_DATA_REG("INDT0", 0xFFC4000C, 32, GROUP(GP_INDT(0))) },
+ { PINMUX_DATA_REG("INDT1", 0xFFC4100C, 32, GROUP(GP_INDT(1))) },
+ { PINMUX_DATA_REG("INDT2", 0xFFC4200C, 32, GROUP(GP_INDT(2))) },
+ { PINMUX_DATA_REG("INDT3", 0xFFC4300C, 32, GROUP(GP_INDT(3))) },
+ { PINMUX_DATA_REG("INDT4", 0xFFC4400C, 32, GROUP(GP_INDT(4))) },
+ { PINMUX_DATA_REG("INDT5", 0xFFC4500C, 32, GROUP(
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0,
GP_5_11_DATA, GP_5_10_DATA, GP_5_9_DATA, GP_5_8_DATA,
GP_5_7_DATA, GP_5_6_DATA, GP_5_5_DATA, GP_5_4_DATA,
- GP_5_3_DATA, GP_5_2_DATA, GP_5_1_DATA, GP_5_0_DATA }
+ GP_5_3_DATA, GP_5_2_DATA, GP_5_1_DATA, GP_5_0_DATA ))
},
{ },
};
diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7757.c b/drivers/pinctrl/sh-pfc/pfc-sh7757.c
index 075ee48..d9e38bc 100644
--- a/drivers/pinctrl/sh-pfc/pfc-sh7757.c
+++ b/drivers/pinctrl/sh-pfc/pfc-sh7757.c
@@ -2116,109 +2116,109 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
};
static const struct pinmux_data_reg pinmux_data_regs[] = {
- { PINMUX_DATA_REG("PADR", 0xffec0034, 8) {
+ { PINMUX_DATA_REG("PADR", 0xffec0034, 8, GROUP(
PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA,
- PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA }
+ PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA ))
},
- { PINMUX_DATA_REG("PBDR", 0xffec0036, 8) {
+ { PINMUX_DATA_REG("PBDR", 0xffec0036, 8, GROUP(
PTB7_DATA, PTB6_DATA, PTB5_DATA, PTB4_DATA,
- PTB3_DATA, PTB2_DATA, PTB1_DATA, PTB0_DATA }
+ PTB3_DATA, PTB2_DATA, PTB1_DATA, PTB0_DATA ))
},
- { PINMUX_DATA_REG("PCDR", 0xffec0038, 8) {
+ { PINMUX_DATA_REG("PCDR", 0xffec0038, 8, GROUP(
PTC7_DATA, PTC6_DATA, PTC5_DATA, PTC4_DATA,
- PTC3_DATA, PTC2_DATA, PTC1_DATA, PTC0_DATA }
+ PTC3_DATA, PTC2_DATA, PTC1_DATA, PTC0_DATA ))
},
- { PINMUX_DATA_REG("PDDR", 0xffec003a, 8) {
+ { PINMUX_DATA_REG("PDDR", 0xffec003a, 8, GROUP(
PTD7_DATA, PTD6_DATA, PTD5_DATA, PTD4_DATA,
- PTD3_DATA, PTD2_DATA, PTD1_DATA, PTD0_DATA }
+ PTD3_DATA, PTD2_DATA, PTD1_DATA, PTD0_DATA ))
},
- { PINMUX_DATA_REG("PEDR", 0xffec003c, 8) {
+ { PINMUX_DATA_REG("PEDR", 0xffec003c, 8, GROUP(
PTE7_DATA, PTE6_DATA, PTE5_DATA, PTE4_DATA,
- PTE3_DATA, PTE2_DATA, PTE1_DATA, PTE0_DATA }
+ PTE3_DATA, PTE2_DATA, PTE1_DATA, PTE0_DATA ))
},
- { PINMUX_DATA_REG("PFDR", 0xffec003e, 8) {
+ { PINMUX_DATA_REG("PFDR", 0xffec003e, 8, GROUP(
PTF7_DATA, PTF6_DATA, PTF5_DATA, PTF4_DATA,
- PTF3_DATA, PTF2_DATA, PTF1_DATA, PTF0_DATA }
+ PTF3_DATA, PTF2_DATA, PTF1_DATA, PTF0_DATA ))
},
- { PINMUX_DATA_REG("PGDR", 0xffec0040, 8) {
+ { PINMUX_DATA_REG("PGDR", 0xffec0040, 8, GROUP(
PTG7_DATA, PTG6_DATA, PTG5_DATA, PTG4_DATA,
- PTG3_DATA, PTG2_DATA, PTG1_DATA, PTG0_DATA }
+ PTG3_DATA, PTG2_DATA, PTG1_DATA, PTG0_DATA ))
},
- { PINMUX_DATA_REG("PHDR", 0xffec0042, 8) {
+ { PINMUX_DATA_REG("PHDR", 0xffec0042, 8, GROUP(
PTH7_DATA, PTH6_DATA, PTH5_DATA, PTH4_DATA,
- PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA }
+ PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA ))
},
- { PINMUX_DATA_REG("PIDR", 0xffec0044, 8) {
+ { PINMUX_DATA_REG("PIDR", 0xffec0044, 8, GROUP(
PTI7_DATA, PTI6_DATA, PTI5_DATA, PTI4_DATA,
- PTI3_DATA, PTI2_DATA, PTI1_DATA, PTI0_DATA }
+ PTI3_DATA, PTI2_DATA, PTI1_DATA, PTI0_DATA ))
},
- { PINMUX_DATA_REG("PJDR", 0xffec0046, 8) {
+ { PINMUX_DATA_REG("PJDR", 0xffec0046, 8, GROUP(
0, PTJ6_DATA, PTJ5_DATA, PTJ4_DATA,
- PTJ3_DATA, PTJ2_DATA, PTJ1_DATA, PTJ0_DATA }
+ PTJ3_DATA, PTJ2_DATA, PTJ1_DATA, PTJ0_DATA ))
},
- { PINMUX_DATA_REG("PKDR", 0xffec0048, 8) {
+ { PINMUX_DATA_REG("PKDR", 0xffec0048, 8, GROUP(
PTK7_DATA, PTK6_DATA, PTK5_DATA, PTK4_DATA,
- PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA }
+ PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA ))
},
- { PINMUX_DATA_REG("PLDR", 0xffec004a, 8) {
+ { PINMUX_DATA_REG("PLDR", 0xffec004a, 8, GROUP(
0, PTL6_DATA, PTL5_DATA, PTL4_DATA,
- PTL3_DATA, PTL2_DATA, PTL1_DATA, PTL0_DATA }
+ PTL3_DATA, PTL2_DATA, PTL1_DATA, PTL0_DATA ))
},
- { PINMUX_DATA_REG("PMDR", 0xffec004c, 8) {
+ { PINMUX_DATA_REG("PMDR", 0xffec004c, 8, GROUP(
PTM7_DATA, PTM6_DATA, PTM5_DATA, PTM4_DATA,
- PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA }
+ PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA ))
},
- { PINMUX_DATA_REG("PNDR", 0xffec004e, 8) {
+ { PINMUX_DATA_REG("PNDR", 0xffec004e, 8, GROUP(
0, PTN6_DATA, PTN5_DATA, PTN4_DATA,
- PTN3_DATA, PTN2_DATA, PTN1_DATA, PTN0_DATA }
+ PTN3_DATA, PTN2_DATA, PTN1_DATA, PTN0_DATA ))
},
- { PINMUX_DATA_REG("PODR", 0xffec0050, 8) {
+ { PINMUX_DATA_REG("PODR", 0xffec0050, 8, GROUP(
PTO7_DATA, PTO6_DATA, PTO5_DATA, PTO4_DATA,
- PTO3_DATA, PTO2_DATA, PTO1_DATA, PTO0_DATA }
+ PTO3_DATA, PTO2_DATA, PTO1_DATA, PTO0_DATA ))
},
- { PINMUX_DATA_REG("PPDR", 0xffec0052, 8) {
+ { PINMUX_DATA_REG("PPDR", 0xffec0052, 8, GROUP(
PTP7_DATA, PTP6_DATA, PTP5_DATA, PTP4_DATA,
- PTP3_DATA, PTP2_DATA, PTP1_DATA, PTP0_DATA }
+ PTP3_DATA, PTP2_DATA, PTP1_DATA, PTP0_DATA ))
},
- { PINMUX_DATA_REG("PQDR", 0xffec0054, 8) {
+ { PINMUX_DATA_REG("PQDR", 0xffec0054, 8, GROUP(
0, PTQ6_DATA, PTQ5_DATA, PTQ4_DATA,
- PTQ3_DATA, PTQ2_DATA, PTQ1_DATA, PTQ0_DATA }
+ PTQ3_DATA, PTQ2_DATA, PTQ1_DATA, PTQ0_DATA ))
},
- { PINMUX_DATA_REG("PRDR", 0xffec0056, 8) {
+ { PINMUX_DATA_REG("PRDR", 0xffec0056, 8, GROUP(
PTR7_DATA, PTR6_DATA, PTR5_DATA, PTR4_DATA,
- PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA }
+ PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA ))
},
- { PINMUX_DATA_REG("PSDR", 0xffec0058, 8) {
+ { PINMUX_DATA_REG("PSDR", 0xffec0058, 8, GROUP(
PTS7_DATA, PTS6_DATA, PTS5_DATA, PTS4_DATA,
- PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA }
+ PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA ))
},
- { PINMUX_DATA_REG("PTDR", 0xffec005a, 8) {
+ { PINMUX_DATA_REG("PTDR", 0xffec005a, 8, GROUP(
PTT7_DATA, PTT6_DATA, PTT5_DATA, PTT4_DATA,
- PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA }
+ PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA ))
},
- { PINMUX_DATA_REG("PUDR", 0xffec005c, 8) {
+ { PINMUX_DATA_REG("PUDR", 0xffec005c, 8, GROUP(
PTU7_DATA, PTU6_DATA, PTU5_DATA, PTU4_DATA,
- PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA }
+ PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA ))
},
- { PINMUX_DATA_REG("PVDR", 0xffec005e, 8) {
+ { PINMUX_DATA_REG("PVDR", 0xffec005e, 8, GROUP(
PTV7_DATA, PTV6_DATA, PTV5_DATA, PTV4_DATA,
- PTV3_DATA, PTV2_DATA, PTV1_DATA, PTV0_DATA }
+ PTV3_DATA, PTV2_DATA, PTV1_DATA, PTV0_DATA ))
},
- { PINMUX_DATA_REG("PWDR", 0xffec0060, 8) {
+ { PINMUX_DATA_REG("PWDR", 0xffec0060, 8, GROUP(
PTW7_DATA, PTW6_DATA, PTW5_DATA, PTW4_DATA,
- PTW3_DATA, PTW2_DATA, PTW1_DATA, PTW0_DATA }
+ PTW3_DATA, PTW2_DATA, PTW1_DATA, PTW0_DATA ))
},
- { PINMUX_DATA_REG("PXDR", 0xffec0062, 8) {
+ { PINMUX_DATA_REG("PXDR", 0xffec0062, 8, GROUP(
PTX7_DATA, PTX6_DATA, PTX5_DATA, PTX4_DATA,
- PTX3_DATA, PTX2_DATA, PTX1_DATA, PTX0_DATA }
+ PTX3_DATA, PTX2_DATA, PTX1_DATA, PTX0_DATA ))
},
- { PINMUX_DATA_REG("PYDR", 0xffec0064, 8) {
+ { PINMUX_DATA_REG("PYDR", 0xffec0064, 8, GROUP(
PTY7_DATA, PTY6_DATA, PTY5_DATA, PTY4_DATA,
- PTY3_DATA, PTY2_DATA, PTY1_DATA, PTY0_DATA }
+ PTY3_DATA, PTY2_DATA, PTY1_DATA, PTY0_DATA ))
},
- { PINMUX_DATA_REG("PZDR", 0xffec0066, 8) {
+ { PINMUX_DATA_REG("PZDR", 0xffec0066, 8, GROUP(
PTZ7_DATA, PTZ6_DATA, PTZ5_DATA, PTZ4_DATA,
- PTZ3_DATA, PTZ2_DATA, PTZ1_DATA, PTZ0_DATA }
+ PTZ3_DATA, PTZ2_DATA, PTZ1_DATA, PTZ0_DATA ))
},
{ },
};
diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7785.c b/drivers/pinctrl/sh-pfc/pfc-sh7785.c
index 73a30fd..3c88728 100644
--- a/drivers/pinctrl/sh-pfc/pfc-sh7785.c
+++ b/drivers/pinctrl/sh-pfc/pfc-sh7785.c
@@ -1188,69 +1188,69 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
};
static const struct pinmux_data_reg pinmux_data_regs[] = {
- { PINMUX_DATA_REG("PADR", 0xffe70020, 8) {
+ { PINMUX_DATA_REG("PADR", 0xffe70020, 8, GROUP(
PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA,
- PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA }
+ PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA ))
},
- { PINMUX_DATA_REG("PBDR", 0xffe70022, 8) {
+ { PINMUX_DATA_REG("PBDR", 0xffe70022, 8, GROUP(
PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
- PB3_DATA, PB2_DATA, PB1_DATA, PB0_DATA }
+ PB3_DATA, PB2_DATA, PB1_DATA, PB0_DATA ))
},
- { PINMUX_DATA_REG("PCDR", 0xffe70024, 8) {
+ { PINMUX_DATA_REG("PCDR", 0xffe70024, 8, GROUP(
PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
- PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA }
+ PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA ))
},
- { PINMUX_DATA_REG("PDDR", 0xffe70026, 8) {
+ { PINMUX_DATA_REG("PDDR", 0xffe70026, 8, GROUP(
PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
- PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA }
+ PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA ))
},
- { PINMUX_DATA_REG("PEDR", 0xffe70028, 8) {
+ { PINMUX_DATA_REG("PEDR", 0xffe70028, 8, GROUP(
0, 0, PE5_DATA, PE4_DATA,
- PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA }
+ PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA ))
},
- { PINMUX_DATA_REG("PFDR", 0xffe7002a, 8) {
+ { PINMUX_DATA_REG("PFDR", 0xffe7002a, 8, GROUP(
PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
- PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA }
+ PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA ))
},
- { PINMUX_DATA_REG("PGDR", 0xffe7002c, 8) {
+ { PINMUX_DATA_REG("PGDR", 0xffe7002c, 8, GROUP(
PG7_DATA, PG6_DATA, PG5_DATA, PG4_DATA,
- PG3_DATA, PG2_DATA, PG1_DATA, PG0_DATA }
+ PG3_DATA, PG2_DATA, PG1_DATA, PG0_DATA ))
},
- { PINMUX_DATA_REG("PHDR", 0xffe7002e, 8) {
+ { PINMUX_DATA_REG("PHDR", 0xffe7002e, 8, GROUP(
PH7_DATA, PH6_DATA, PH5_DATA, PH4_DATA,
- PH3_DATA, PH2_DATA, PH1_DATA, PH0_DATA }
+ PH3_DATA, PH2_DATA, PH1_DATA, PH0_DATA ))
},
- { PINMUX_DATA_REG("PJDR", 0xffe70030, 8) {
+ { PINMUX_DATA_REG("PJDR", 0xffe70030, 8, GROUP(
PJ7_DATA, PJ6_DATA, PJ5_DATA, PJ4_DATA,
- PJ3_DATA, PJ2_DATA, PJ1_DATA, PJ0_DATA }
+ PJ3_DATA, PJ2_DATA, PJ1_DATA, PJ0_DATA ))
},
- { PINMUX_DATA_REG("PKDR", 0xffe70032, 8) {
+ { PINMUX_DATA_REG("PKDR", 0xffe70032, 8, GROUP(
PK7_DATA, PK6_DATA, PK5_DATA, PK4_DATA,
- PK3_DATA, PK2_DATA, PK1_DATA, PK0_DATA }
+ PK3_DATA, PK2_DATA, PK1_DATA, PK0_DATA ))
},
- { PINMUX_DATA_REG("PLDR", 0xffe70034, 8) {
+ { PINMUX_DATA_REG("PLDR", 0xffe70034, 8, GROUP(
PL7_DATA, PL6_DATA, PL5_DATA, PL4_DATA,
- PL3_DATA, PL2_DATA, PL1_DATA, PL0_DATA }
+ PL3_DATA, PL2_DATA, PL1_DATA, PL0_DATA ))
},
- { PINMUX_DATA_REG("PMDR", 0xffe70036, 8) {
+ { PINMUX_DATA_REG("PMDR", 0xffe70036, 8, GROUP(
0, 0, 0, 0,
- 0, 0, PM1_DATA, PM0_DATA }
+ 0, 0, PM1_DATA, PM0_DATA ))
},
- { PINMUX_DATA_REG("PNDR", 0xffe70038, 8) {
+ { PINMUX_DATA_REG("PNDR", 0xffe70038, 8, GROUP(
PN7_DATA, PN6_DATA, PN5_DATA, PN4_DATA,
- PN3_DATA, PN2_DATA, PN1_DATA, PN0_DATA }
+ PN3_DATA, PN2_DATA, PN1_DATA, PN0_DATA ))
},
- { PINMUX_DATA_REG("PPDR", 0xffe7003a, 8) {
+ { PINMUX_DATA_REG("PPDR", 0xffe7003a, 8, GROUP(
0, 0, PP5_DATA, PP4_DATA,
- PP3_DATA, PP2_DATA, PP1_DATA, PP0_DATA }
+ PP3_DATA, PP2_DATA, PP1_DATA, PP0_DATA ))
},
- { PINMUX_DATA_REG("PQDR", 0xffe7003c, 8) {
+ { PINMUX_DATA_REG("PQDR", 0xffe7003c, 8, GROUP(
0, 0, 0, PQ4_DATA,
- PQ3_DATA, PQ2_DATA, PQ1_DATA, PQ0_DATA }
+ PQ3_DATA, PQ2_DATA, PQ1_DATA, PQ0_DATA ))
},
- { PINMUX_DATA_REG("PRDR", 0xffe7003e, 8) {
+ { PINMUX_DATA_REG("PRDR", 0xffe7003e, 8, GROUP(
0, 0, 0, 0,
- PR3_DATA, PR2_DATA, PR1_DATA, PR0_DATA }
+ PR3_DATA, PR2_DATA, PR1_DATA, PR0_DATA ))
},
{ },
};
diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7786.c b/drivers/pinctrl/sh-pfc/pfc-sh7786.c
index c91d245..22e54a3 100644
--- a/drivers/pinctrl/sh-pfc/pfc-sh7786.c
+++ b/drivers/pinctrl/sh-pfc/pfc-sh7786.c
@@ -760,41 +760,41 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
};
static const struct pinmux_data_reg pinmux_data_regs[] = {
- { PINMUX_DATA_REG("PADR", 0xffcc0020, 8) {
+ { PINMUX_DATA_REG("PADR", 0xffcc0020, 8, GROUP(
PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA,
- PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA }
+ PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA ))
},
- { PINMUX_DATA_REG("PBDR", 0xffcc0022, 8) {
+ { PINMUX_DATA_REG("PBDR", 0xffcc0022, 8, GROUP(
PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
- PB3_DATA, PB2_DATA, PB1_DATA, PB0_DATA }
+ PB3_DATA, PB2_DATA, PB1_DATA, PB0_DATA ))
},
- { PINMUX_DATA_REG("PCDR", 0xffcc0024, 8) {
+ { PINMUX_DATA_REG("PCDR", 0xffcc0024, 8, GROUP(
PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
- PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA }
+ PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA ))
},
- { PINMUX_DATA_REG("PDDR", 0xffcc0026, 8) {
+ { PINMUX_DATA_REG("PDDR", 0xffcc0026, 8, GROUP(
PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
- PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA }
+ PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA ))
},
- { PINMUX_DATA_REG("PEDR", 0xffcc0028, 8) {
+ { PINMUX_DATA_REG("PEDR", 0xffcc0028, 8, GROUP(
PE7_DATA, PE6_DATA,
- 0, 0, 0, 0, 0, 0 }
+ 0, 0, 0, 0, 0, 0 ))
},
- { PINMUX_DATA_REG("PFDR", 0xffcc002a, 8) {
+ { PINMUX_DATA_REG("PFDR", 0xffcc002a, 8, GROUP(
PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
- PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA }
+ PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA ))
},
- { PINMUX_DATA_REG("PGDR", 0xffcc002c, 8) {
+ { PINMUX_DATA_REG("PGDR", 0xffcc002c, 8, GROUP(
PG7_DATA, PG6_DATA, PG5_DATA, 0,
- 0, 0, 0, 0 }
+ 0, 0, 0, 0 ))
},
- { PINMUX_DATA_REG("PHDR", 0xffcc002e, 8) {
+ { PINMUX_DATA_REG("PHDR", 0xffcc002e, 8, GROUP(
PH7_DATA, PH6_DATA, PH5_DATA, PH4_DATA,
- PH3_DATA, PH2_DATA, PH1_DATA, PH0_DATA }
+ PH3_DATA, PH2_DATA, PH1_DATA, PH0_DATA ))
},
- { PINMUX_DATA_REG("PJDR", 0xffcc0030, 8) {
+ { PINMUX_DATA_REG("PJDR", 0xffcc0030, 8, GROUP(
PJ7_DATA, PJ6_DATA, PJ5_DATA, PJ4_DATA,
- PJ3_DATA, PJ2_DATA, PJ1_DATA, 0 }
+ PJ3_DATA, PJ2_DATA, PJ1_DATA, 0 ))
},
{ },
};
diff --git a/drivers/pinctrl/sh-pfc/pfc-shx3.c b/drivers/pinctrl/sh-pfc/pfc-shx3.c
index 7abe085..955cd9c 100644
--- a/drivers/pinctrl/sh-pfc/pfc-shx3.c
+++ b/drivers/pinctrl/sh-pfc/pfc-shx3.c
@@ -510,37 +510,37 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
};
static const struct pinmux_data_reg pinmux_data_regs[] = {
- { PINMUX_DATA_REG("PABDR", 0xffc70010, 32) {
+ { PINMUX_DATA_REG("PABDR", 0xffc70010, 32, GROUP(
0, 0, 0, 0, 0, 0, 0, 0,
PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA,
PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA,
0, 0, 0, 0, 0, 0, 0, 0,
PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
- PB3_DATA, PB2_DATA, PB1_DATA, PB0_DATA, },
+ PB3_DATA, PB2_DATA, PB1_DATA, PB0_DATA, ))
},
- { PINMUX_DATA_REG("PCDDR", 0xffc70014, 32) {
+ { PINMUX_DATA_REG("PCDDR", 0xffc70014, 32, GROUP(
0, 0, 0, 0, 0, 0, 0, 0,
PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA,
0, 0, 0, 0, 0, 0, 0, 0,
PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
- PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA, },
+ PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA, ))
},
- { PINMUX_DATA_REG("PEFDR", 0xffc70018, 32) {
+ { PINMUX_DATA_REG("PEFDR", 0xffc70018, 32, GROUP(
0, 0, 0, 0, 0, 0, 0, 0,
PE7_DATA, PE6_DATA, PE5_DATA, PE4_DATA,
PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA,
0, 0, 0, 0, 0, 0, 0, 0,
PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
- PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA, },
+ PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA, ))
},
- { PINMUX_DATA_REG("PGHDR", 0xffc7001c, 32) {
+ { PINMUX_DATA_REG("PGHDR", 0xffc7001c, 32, GROUP(
0, 0, 0, 0, 0, 0, 0, 0,
PG7_DATA, PG6_DATA, PG5_DATA, PG4_DATA,
PG3_DATA, PG2_DATA, PG1_DATA, PG0_DATA,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, PH5_DATA, PH4_DATA,
- PH3_DATA, PH2_DATA, PH1_DATA, PH0_DATA, },
+ PH3_DATA, PH2_DATA, PH1_DATA, PH0_DATA, ))
},
{ },
};
diff --git a/drivers/pinctrl/sh-pfc/sh_pfc.h b/drivers/pinctrl/sh-pfc/sh_pfc.h
index d775e1e..e97d0a4 100644
--- a/drivers/pinctrl/sh-pfc/sh_pfc.h
+++ b/drivers/pinctrl/sh-pfc/sh_pfc.h
@@ -195,12 +195,12 @@ struct pinmux_data_reg {
* - name: Register name (unused, for documentation purposes only)
* - r: Physical register address
* - r_width: Width of the register (in bits)
- * This macro must be followed by initialization data: For each register bit
- * (from left to right, i.e. MSB to LSB), one enum ID must be specified.
+ * - ids: For each register bit (from left to right, i.e. MSB to LSB), one
+ * enum ID must be specified, all wrapped using the GROUP() macro.
*/
-#define PINMUX_DATA_REG(name, r, r_width) \
- .reg = r, .reg_width = r_width, \
- .enum_ids = (const u16 [r_width]) \
+#define PINMUX_DATA_REG(name, r, r_width, ids) \
+ .reg = r, .reg_width = r_width, \
+ .enum_ids = (const u16 [r_width]) { ids }
struct pinmux_irq {
const short *gpios;
--
2.7.4
next prev parent reply other threads:[~2019-08-29 17:02 UTC|newest]
Thread overview: 53+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-29 17:02 [cip-dev] [PATCH/RFC 4.19.y-cip v2 00/51] Fast forward sh-pfc Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 01/51] pinctrl: sh-pfc: Print actual field width for variable-width fields Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 02/51] pinctrl: sh-pfc: Validate pinmux tables at runtime when debugging Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 03/51] pinctrl: sh-pfc: Add physical pin multiplexing helper macros Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 04/51] pinctrl: sh-pfc: Validate pins/marks in pin groups at build time Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 05/51] pinctrl: sh-pfc: Make pinmux_cfg_reg.var_field_width[] variable-length Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 06/51] pinctrl: sh-pfc: Validate fixed-size field widths at build time Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 07/51] pinctrl: sh-pfc: Absorb enum IDs in PINMUX_CFG_REG() macro Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 08/51] pinctrl: sh-pfc: Absorb enum IDs in PINMUX_CFG_REG_VAR() macro Fabrizio Castro
2019-08-29 17:02 ` Fabrizio Castro [this message]
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 10/51] pinctrl: sh-pfc: Validate enum IDs for regs with fixed-width fields Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 11/51] pinctrl: sh-pfc: Validate enum IDs for regs with variable-width fields Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 12/51] pinctrl: sh-pfc: Improve PINMUX_IPSR_PHYS() documentation Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 13/51] pinctrl: sh-pfc: Rename 2-parameter CPU_ALL_PORT() variant Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 14/51] pinctrl: sh-pfc: Add SH_PFC_PIN_CFG_PULL_UP_DOWN shorthand Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 15/51] pinctrl: sh-pfc: Add new non-GPIO helper macros Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 16/51] pinctrl: sh-pfc: Correct printk level of group reference warning Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 17/51] pinctrl: sh-pfc: Mark run-time debug code __init Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 18/51] pinctrl: sh-pfc: Add check for empty pinmux groups/functions Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 19/51] pinctrl: sh-pfc: Validate pin tables at runtime Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 20/51] pinctrl: sh-pfc: r8a7796: Fix VIN versioned groups Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 21/51] pinctrl: sh-pfc: r8a7796: Add I2C{0, 3, 5} pins, groups and functions Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 22/51] pinctrl: sh-pfc: r8a7796: Deduplicate VIN5 pin definitions Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 23/51] pinctrl: sh-pfc: r8a7796: Move CANFD pin groups and functions Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 24/51] pinctrl: sh-pfc: r8a77990: Rename IOCTRLx registers Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 25/51] pinctrl: sh-pfc: r8a77990: Move CANFD pin groups and functions Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 26/51] pinctrl: sh-pfc: rcar-gen3: Retain TDSELCTRL register across suspend/resume Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 27/51] pinctrl: sh-pfc: Add missing #include <linux/errno.h> Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 28/51] pinctrl: sh-pfc: rcar-gen3: Remove HDMI CEC pins, groups, and functions Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 29/51] pinctrl: sh-pfc: rcar-gen3: Remove CC5_OSCOUT pin Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 30/51] pinctrl: sh-pfc: rcar-gen3: Rename SEL_ADG_{A, B, C} to SEL_ADG{A, B, C} Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 31/51] pinctrl: sh-pfc: r8a77990: Fix MOD_SEL0 bit16 when using NFALE and NFRB_N Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 32/51] pinctrl: sh-pfc: r8a77990: Fix MOD_SEL1 bit31 when using SIM0_D Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 33/51] pinctrl: sh-pfc: r8a77990: Fix MOD_SEL1 bit30 when using SSI_SCK2 and SSI_WS2 Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 34/51] pinctrl: sh-pfc: rcar-gen3: Rename RTS{0, 1, 3, 4}# pin function definitions Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 35/51] pinctrl: sh-pfc: rcar-gen3: Rename SEL_NDFC to SEL_NDF Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 36/51] pinctrl: sh-pfc: Add PORT_GP_27 helper macro Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 37/51] pinctrl: sh-pfc: Move PIN_NONE to shared header file Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 38/51] pinctrl: sh-pfc: r8a77990: Use new macros for non-GPIO pins Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 39/51] pinctrl: sh-pfc: r8a7796: Add TPU pins, groups and functions Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 40/51] pinctrl: sh-pfc: r8a7796: Use new macros for non-GPIO pins Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 41/51] pinctrl: sh-pfc: r8a7796: Remove placeholder I2C pin data Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 42/51] pinctrl: sh-pfc: r8a77995: Remove unused PINMUX_IPSR_{MSEL2, PHYS}() Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 43/51] pinctrl: sh-pfc: r8a7740: Add missing REF125CK pin to gether_gmii group Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 44/51] pinctrl: sh-pfc: r8a7740: Add missing LCD0 marks to lcd0_data24_1 group Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 45/51] pinctrl: sh-pfc: r8a7791: Remove bogus ctrl marks from qspi_data4_b group Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 46/51] pinctrl: sh-pfc: r8a7791: Remove bogus marks from vin1_b_data18 group Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 47/51] pinctrl: sh-pfc: r8a7791: Fix VIN1 versioned groups Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 48/51] pinctrl: sh-pfc: r8a7791: Fix scifb2_data_c pin group Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 49/51] pinctrl: sh-pfc: sh73a0: Fix fsic_spdif pin groups Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 50/51] pinctrl: sh-pfc: sh73a0: Add missing TO pin to tpu4_to3 group Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 51/51] pinctrl: sh-pfc: sh73a0: Use new macros for non-GPIO pins Fabrizio Castro
2019-08-29 22:31 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 00/51] Fast forward sh-pfc Pavel Machek
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