From: fabrizio.castro@bp.renesas.com (Fabrizio Castro)
To: cip-dev@lists.cip-project.org
Subject: [cip-dev] [PATCH/RFC 4.19.y-cip v2 28/51] pinctrl: sh-pfc: rcar-gen3: Remove HDMI CEC pins, groups, and functions
Date: Thu, 29 Aug 2019 18:02:33 +0100 [thread overview]
Message-ID: <1567098176-1242-29-git-send-email-fabrizio.castro@bp.renesas.com> (raw)
In-Reply-To: <1567098176-1242-1-git-send-email-fabrizio.castro@bp.renesas.com>
From: Takeshi Kihara <takeshi.kihara.df@renesas.com>
commit 5671f8e0270ad5e33e3088e5f0fa71af67129630 upstream.
The HDMI CEC function is not supported by the R-Car Gen3 Hardware Manual
Rev 1.00. Therefore, delete the corresponding pin groups and functions,
and rename the HDMI[01]_CEC definitions to match their GPIO
functionality.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[geert: Squashed several commits]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
---
drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c | 44 ++++++--------------------------
drivers/pinctrl/sh-pfc/pfc-r8a7795.c | 44 ++++++--------------------------
drivers/pinctrl/sh-pfc/pfc-r8a7796.c | 27 +++++---------------
drivers/pinctrl/sh-pfc/pfc-r8a77965.c | 8 +++---
4 files changed, 26 insertions(+), 97 deletions(-)
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c b/drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c
index ab5a94e..157a8e9 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c
@@ -200,8 +200,8 @@
#define GPSR6_0 F_(SSI_SCK01239, IP13_23_20)
/* GPSR7 */
-#define GPSR7_3 FM(HDMI1_CEC)
-#define GPSR7_2 FM(HDMI0_CEC)
+#define GPSR7_3 FM(GP7_03)
+#define GPSR7_2 FM(GP7_02)
#define GPSR7_1 FM(AVS2)
#define GPSR7_0 FM(AVS1)
@@ -574,8 +574,8 @@ static const u16 pinmux_data[] = {
PINMUX_SINGLE(AVS1),
PINMUX_SINGLE(AVS2),
- PINMUX_SINGLE(HDMI0_CEC),
- PINMUX_SINGLE(HDMI1_CEC),
+ PINMUX_SINGLE(GP7_02),
+ PINMUX_SINGLE(GP7_03),
PINMUX_SINGLE(I2C_SEL_0_1),
PINMUX_SINGLE(I2C_SEL_3_1),
PINMUX_SINGLE(I2C_SEL_5_1),
@@ -2066,22 +2066,6 @@ static const unsigned int du_disp_pins[] = {
static const unsigned int du_disp_mux[] = {
DU_DISP_MARK,
};
-/* - HDMI ------------------------------------------------------------------- */
-static const unsigned int hdmi0_cec_pins[] = {
- /* HDMI0_CEC */
- RCAR_GP_PIN(7, 2),
-};
-static const unsigned int hdmi0_cec_mux[] = {
- HDMI0_CEC_MARK,
-};
-static const unsigned int hdmi1_cec_pins[] = {
- /* HDMI1_CEC */
- RCAR_GP_PIN(7, 3),
-};
-static const unsigned int hdmi1_cec_mux[] = {
- HDMI1_CEC_MARK,
-};
-
/* - HSCIF0 ----------------------------------------------------------------- */
static const unsigned int hscif0_data_pins[] = {
/* RX, TX */
@@ -3911,8 +3895,6 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
SH_PFC_PIN_GROUP(du_oddf),
SH_PFC_PIN_GROUP(du_cde),
SH_PFC_PIN_GROUP(du_disp),
- SH_PFC_PIN_GROUP(hdmi0_cec),
- SH_PFC_PIN_GROUP(hdmi1_cec),
SH_PFC_PIN_GROUP(hscif0_data),
SH_PFC_PIN_GROUP(hscif0_clk),
SH_PFC_PIN_GROUP(hscif0_ctrl),
@@ -4263,14 +4245,6 @@ static const char * const du_groups[] = {
"du_disp",
};
-static const char * const hdmi0_groups[] = {
- "hdmi0_cec",
-};
-
-static const char * const hdmi1_groups[] = {
- "hdmi1_cec",
-};
-
static const char * const hscif0_groups[] = {
"hscif0_data",
"hscif0_clk",
@@ -4646,8 +4620,6 @@ static const struct sh_pfc_function pinmux_functions[] = {
SH_PFC_FUNCTION(drif2),
SH_PFC_FUNCTION(drif3),
SH_PFC_FUNCTION(du),
- SH_PFC_FUNCTION(hdmi0),
- SH_PFC_FUNCTION(hdmi1),
SH_PFC_FUNCTION(hscif0),
SH_PFC_FUNCTION(hscif1),
SH_PFC_FUNCTION(hscif2),
@@ -5363,8 +5335,8 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = {
{ RCAR_GP_PIN(0, 15), 24, 3 }, /* D15 */
{ RCAR_GP_PIN(7, 0), 20, 3 }, /* AVS1 */
{ RCAR_GP_PIN(7, 1), 16, 3 }, /* AVS2 */
- { RCAR_GP_PIN(7, 2), 12, 3 }, /* HDMI0_CEC */
- { RCAR_GP_PIN(7, 3), 8, 3 }, /* HDMI1_CEC */
+ { RCAR_GP_PIN(7, 2), 12, 3 }, /* GP7_02 */
+ { RCAR_GP_PIN(7, 3), 8, 3 }, /* GP7_03 */
{ PIN_A_NUMBER('P', 7), 4, 2 }, /* DU_DOTCLKIN0 */
{ PIN_A_NUMBER('P', 8), 0, 2 }, /* DU_DOTCLKIN1 */
} },
@@ -5619,8 +5591,8 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = {
[25] = RCAR_GP_PIN(0, 15), /* D15 */
[26] = RCAR_GP_PIN(7, 0), /* AVS1 */
[27] = RCAR_GP_PIN(7, 1), /* AVS2 */
- [28] = RCAR_GP_PIN(7, 2), /* HDMI0_CEC */
- [29] = RCAR_GP_PIN(7, 3), /* HDMI1_CEC */
+ [28] = RCAR_GP_PIN(7, 2), /* GP7_02 */
+ [29] = RCAR_GP_PIN(7, 3), /* GP7_03 */
[30] = PIN_A_NUMBER('P', 7), /* DU_DOTCLKIN0 */
[31] = PIN_A_NUMBER('P', 8), /* DU_DOTCLKIN1 */
} },
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
index b1aa5c1..5e6df51 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
@@ -202,8 +202,8 @@
#define GPSR6_0 F_(SSI_SCK01239, IP14_23_20)
/* GPSR7 */
-#define GPSR7_3 FM(HDMI1_CEC)
-#define GPSR7_2 FM(HDMI0_CEC)
+#define GPSR7_3 FM(GP7_03)
+#define GPSR7_2 FM(GP7_02)
#define GPSR7_1 FM(AVS2)
#define GPSR7_0 FM(AVS1)
@@ -588,8 +588,8 @@ static const u16 pinmux_data[] = {
PINMUX_SINGLE(AVS1),
PINMUX_SINGLE(AVS2),
PINMUX_SINGLE(CLKOUT),
- PINMUX_SINGLE(HDMI0_CEC),
- PINMUX_SINGLE(HDMI1_CEC),
+ PINMUX_SINGLE(GP7_02),
+ PINMUX_SINGLE(GP7_03),
PINMUX_SINGLE(I2C_SEL_0_1),
PINMUX_SINGLE(I2C_SEL_3_1),
PINMUX_SINGLE(I2C_SEL_5_1),
@@ -2126,22 +2126,6 @@ static const unsigned int du_disp_mux[] = {
DU_DISP_MARK,
};
-/* - HDMI ------------------------------------------------------------------- */
-static const unsigned int hdmi0_cec_pins[] = {
- /* HDMI0_CEC */
- RCAR_GP_PIN(7, 2),
-};
-static const unsigned int hdmi0_cec_mux[] = {
- HDMI0_CEC_MARK,
-};
-static const unsigned int hdmi1_cec_pins[] = {
- /* HDMI1_CEC */
- RCAR_GP_PIN(7, 3),
-};
-static const unsigned int hdmi1_cec_mux[] = {
- HDMI1_CEC_MARK,
-};
-
/* - HSCIF0 ----------------------------------------------------------------- */
static const unsigned int hscif0_data_pins[] = {
/* RX, TX */
@@ -4230,8 +4214,6 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
SH_PFC_PIN_GROUP(du_oddf),
SH_PFC_PIN_GROUP(du_cde),
SH_PFC_PIN_GROUP(du_disp),
- SH_PFC_PIN_GROUP(hdmi0_cec),
- SH_PFC_PIN_GROUP(hdmi1_cec),
SH_PFC_PIN_GROUP(hscif0_data),
SH_PFC_PIN_GROUP(hscif0_clk),
SH_PFC_PIN_GROUP(hscif0_ctrl),
@@ -4613,14 +4595,6 @@ static const char * const du_groups[] = {
"du_disp",
};
-static const char * const hdmi0_groups[] = {
- "hdmi0_cec",
-};
-
-static const char * const hdmi1_groups[] = {
- "hdmi1_cec",
-};
-
static const char * const hscif0_groups[] = {
"hscif0_data",
"hscif0_clk",
@@ -5027,8 +5001,6 @@ static const struct sh_pfc_function pinmux_functions[] = {
SH_PFC_FUNCTION(drif2),
SH_PFC_FUNCTION(drif3),
SH_PFC_FUNCTION(du),
- SH_PFC_FUNCTION(hdmi0),
- SH_PFC_FUNCTION(hdmi1),
SH_PFC_FUNCTION(hscif0),
SH_PFC_FUNCTION(hscif1),
SH_PFC_FUNCTION(hscif2),
@@ -5752,8 +5724,8 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = {
{ RCAR_GP_PIN(0, 15), 24, 3 }, /* D15 */
{ RCAR_GP_PIN(7, 0), 20, 3 }, /* AVS1 */
{ RCAR_GP_PIN(7, 1), 16, 3 }, /* AVS2 */
- { RCAR_GP_PIN(7, 2), 12, 3 }, /* HDMI0_CEC */
- { RCAR_GP_PIN(7, 3), 8, 3 }, /* HDMI1_CEC */
+ { RCAR_GP_PIN(7, 2), 12, 3 }, /* GP7_02 */
+ { RCAR_GP_PIN(7, 3), 8, 3 }, /* GP7_03 */
{ PIN_A_NUMBER('P', 7), 4, 2 }, /* DU_DOTCLKIN0 */
{ PIN_A_NUMBER('P', 8), 0, 2 }, /* DU_DOTCLKIN1 */
} },
@@ -6007,8 +5979,8 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = {
[25] = RCAR_GP_PIN(0, 15), /* D15 */
[26] = RCAR_GP_PIN(7, 0), /* AVS1 */
[27] = RCAR_GP_PIN(7, 1), /* AVS2 */
- [28] = RCAR_GP_PIN(7, 2), /* HDMI0_CEC */
- [29] = RCAR_GP_PIN(7, 3), /* HDMI1_CEC */
+ [28] = RCAR_GP_PIN(7, 2), /* GP7_02 */
+ [29] = RCAR_GP_PIN(7, 3), /* GP7_03 */
[30] = PIN_A_NUMBER('P', 7), /* DU_DOTCLKIN0 */
[31] = PIN_A_NUMBER('P', 8), /* DU_DOTCLKIN1 */
} },
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
index aedb431..e3da9ba 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
@@ -208,7 +208,7 @@
/* GPSR7 */
#define GPSR7_3 FM(GP7_03)
-#define GPSR7_2 FM(HDMI0_CEC)
+#define GPSR7_2 FM(GP7_02)
#define GPSR7_1 FM(AVS2)
#define GPSR7_0 FM(AVS1)
@@ -599,7 +599,7 @@ static const u16 pinmux_data[] = {
PINMUX_SINGLE(AVS2),
PINMUX_SINGLE(CLKOUT),
PINMUX_SINGLE(GP7_03),
- PINMUX_SINGLE(HDMI0_CEC),
+ PINMUX_SINGLE(GP7_02),
PINMUX_SINGLE(MSIOF0_RXD),
PINMUX_SINGLE(MSIOF0_SCK),
PINMUX_SINGLE(MSIOF0_TXD),
@@ -2142,15 +2142,6 @@ static const unsigned int du_disp_mux[] = {
DU_DISP_MARK,
};
-/* - HDMI ------------------------------------------------------------------- */
-static const unsigned int hdmi0_cec_pins[] = {
- /* HDMI0_CEC */
- RCAR_GP_PIN(7, 2),
-};
-static const unsigned int hdmi0_cec_mux[] = {
- HDMI0_CEC_MARK,
-};
-
/* - HSCIF0 ----------------------------------------------------------------- */
static const unsigned int hscif0_data_pins[] = {
/* RX, TX */
@@ -4126,7 +4117,7 @@ static const unsigned int vin5_clk_mux[] = {
};
static const struct {
- struct sh_pfc_pin_group common[313];
+ struct sh_pfc_pin_group common[312];
struct sh_pfc_pin_group automotive[30];
} pinmux_groups = {
.common = {
@@ -4173,7 +4164,6 @@ static const struct {
SH_PFC_PIN_GROUP(du_oddf),
SH_PFC_PIN_GROUP(du_cde),
SH_PFC_PIN_GROUP(du_disp),
- SH_PFC_PIN_GROUP(hdmi0_cec),
SH_PFC_PIN_GROUP(hscif0_data),
SH_PFC_PIN_GROUP(hscif0_clk),
SH_PFC_PIN_GROUP(hscif0_ctrl),
@@ -4587,10 +4577,6 @@ static const char * const du_groups[] = {
"du_disp",
};
-static const char * const hdmi0_groups[] = {
- "hdmi0_cec",
-};
-
static const char * const hscif0_groups[] = {
"hscif0_data",
"hscif0_clk",
@@ -4984,7 +4970,7 @@ static const char * const vin5_groups[] = {
};
static const struct {
- struct sh_pfc_function common[50];
+ struct sh_pfc_function common[49];
struct sh_pfc_function automotive[4];
} pinmux_functions = {
.common = {
@@ -4996,7 +4982,6 @@ static const struct {
SH_PFC_FUNCTION(canfd0),
SH_PFC_FUNCTION(canfd1),
SH_PFC_FUNCTION(du),
- SH_PFC_FUNCTION(hdmi0),
SH_PFC_FUNCTION(hscif0),
SH_PFC_FUNCTION(hscif1),
SH_PFC_FUNCTION(hscif2),
@@ -5726,7 +5711,7 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = {
{ RCAR_GP_PIN(0, 15), 24, 3 }, /* D15 */
{ RCAR_GP_PIN(7, 0), 20, 3 }, /* AVS1 */
{ RCAR_GP_PIN(7, 1), 16, 3 }, /* AVS2 */
- { RCAR_GP_PIN(7, 2), 12, 3 }, /* HDMI0_CEC */
+ { RCAR_GP_PIN(7, 2), 12, 3 }, /* GP7_02 */
{ RCAR_GP_PIN(7, 3), 8, 3 }, /* GP7_03 */
{ PIN_A_NUMBER('P', 7), 4, 2 }, /* DU_DOTCLKIN0 */
{ PIN_A_NUMBER('P', 8), 0, 2 }, /* DU_DOTCLKIN1 */
@@ -5982,7 +5967,7 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = {
[25] = RCAR_GP_PIN(0, 15), /* D15 */
[26] = RCAR_GP_PIN(7, 0), /* AVS1 */
[27] = RCAR_GP_PIN(7, 1), /* AVS2 */
- [28] = RCAR_GP_PIN(7, 2), /* HDMI0_CEC */
+ [28] = RCAR_GP_PIN(7, 2), /* GP7_02 */
[29] = RCAR_GP_PIN(7, 3), /* GP7_03 */
[30] = PIN_A_NUMBER('P', 7), /* DU_DOTCLKIN0 */
[31] = PIN_A_NUMBER('P', 8), /* DU_DOTCLKIN1 */
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77965.c b/drivers/pinctrl/sh-pfc/pfc-r8a77965.c
index 3ebfd85..6f800de 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a77965.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a77965.c
@@ -206,7 +206,7 @@
/* GPSR7 */
#define GPSR7_3 FM(GP7_03)
-#define GPSR7_2 FM(HDMI0_CEC)
+#define GPSR7_2 FM(GP7_02)
#define GPSR7_1 FM(AVS2)
#define GPSR7_0 FM(AVS1)
@@ -593,7 +593,7 @@ static const u16 pinmux_data[] = {
PINMUX_SINGLE(AVS2),
PINMUX_SINGLE(CLKOUT),
PINMUX_SINGLE(GP7_03),
- PINMUX_SINGLE(HDMI0_CEC),
+ PINMUX_SINGLE(GP7_02),
PINMUX_SINGLE(MSIOF0_RXD),
PINMUX_SINGLE(MSIOF0_SCK),
PINMUX_SINGLE(MSIOF0_TXD),
@@ -4693,7 +4693,7 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = {
{ RCAR_GP_PIN(0, 15), 24, 3 }, /* D15 */
{ RCAR_GP_PIN(7, 0), 20, 3 }, /* AVS1 */
{ RCAR_GP_PIN(7, 1), 16, 3 }, /* AVS2 */
- { RCAR_GP_PIN(7, 2), 12, 3 }, /* HDMI0_CEC */
+ { RCAR_GP_PIN(7, 2), 12, 3 }, /* GP7_02 */
{ RCAR_GP_PIN(7, 3), 8, 3 }, /* GP7_03 */
{ PIN_A_NUMBER('P', 7), 4, 2 }, /* DU_DOTCLKIN0 */
{ PIN_A_NUMBER('P', 8), 0, 2 }, /* DU_DOTCLKIN1 */
@@ -4947,7 +4947,7 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = {
[25] = RCAR_GP_PIN(0, 15), /* D15 */
[26] = RCAR_GP_PIN(7, 0), /* AVS1 */
[27] = RCAR_GP_PIN(7, 1), /* AVS2 */
- [28] = RCAR_GP_PIN(7, 2), /* HDMI0_CEC */
+ [28] = RCAR_GP_PIN(7, 2), /* GP7_02 */
[29] = RCAR_GP_PIN(7, 3), /* GP7_03 */
[30] = PIN_A_NUMBER('P', 7), /* DU_DOTCLKIN0 */
[31] = PIN_A_NUMBER('P', 8), /* DU_DOTCLKIN1 */
--
2.7.4
next prev parent reply other threads:[~2019-08-29 17:02 UTC|newest]
Thread overview: 53+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-29 17:02 [cip-dev] [PATCH/RFC 4.19.y-cip v2 00/51] Fast forward sh-pfc Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 01/51] pinctrl: sh-pfc: Print actual field width for variable-width fields Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 02/51] pinctrl: sh-pfc: Validate pinmux tables at runtime when debugging Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 03/51] pinctrl: sh-pfc: Add physical pin multiplexing helper macros Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 04/51] pinctrl: sh-pfc: Validate pins/marks in pin groups at build time Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 05/51] pinctrl: sh-pfc: Make pinmux_cfg_reg.var_field_width[] variable-length Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 06/51] pinctrl: sh-pfc: Validate fixed-size field widths at build time Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 07/51] pinctrl: sh-pfc: Absorb enum IDs in PINMUX_CFG_REG() macro Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 08/51] pinctrl: sh-pfc: Absorb enum IDs in PINMUX_CFG_REG_VAR() macro Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 09/51] pinctrl: sh-pfc: Absorb enum IDs in PINMUX_DATA_REG() macro Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 10/51] pinctrl: sh-pfc: Validate enum IDs for regs with fixed-width fields Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 11/51] pinctrl: sh-pfc: Validate enum IDs for regs with variable-width fields Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 12/51] pinctrl: sh-pfc: Improve PINMUX_IPSR_PHYS() documentation Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 13/51] pinctrl: sh-pfc: Rename 2-parameter CPU_ALL_PORT() variant Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 14/51] pinctrl: sh-pfc: Add SH_PFC_PIN_CFG_PULL_UP_DOWN shorthand Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 15/51] pinctrl: sh-pfc: Add new non-GPIO helper macros Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 16/51] pinctrl: sh-pfc: Correct printk level of group reference warning Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 17/51] pinctrl: sh-pfc: Mark run-time debug code __init Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 18/51] pinctrl: sh-pfc: Add check for empty pinmux groups/functions Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 19/51] pinctrl: sh-pfc: Validate pin tables at runtime Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 20/51] pinctrl: sh-pfc: r8a7796: Fix VIN versioned groups Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 21/51] pinctrl: sh-pfc: r8a7796: Add I2C{0, 3, 5} pins, groups and functions Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 22/51] pinctrl: sh-pfc: r8a7796: Deduplicate VIN5 pin definitions Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 23/51] pinctrl: sh-pfc: r8a7796: Move CANFD pin groups and functions Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 24/51] pinctrl: sh-pfc: r8a77990: Rename IOCTRLx registers Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 25/51] pinctrl: sh-pfc: r8a77990: Move CANFD pin groups and functions Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 26/51] pinctrl: sh-pfc: rcar-gen3: Retain TDSELCTRL register across suspend/resume Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 27/51] pinctrl: sh-pfc: Add missing #include <linux/errno.h> Fabrizio Castro
2019-08-29 17:02 ` Fabrizio Castro [this message]
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 29/51] pinctrl: sh-pfc: rcar-gen3: Remove CC5_OSCOUT pin Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 30/51] pinctrl: sh-pfc: rcar-gen3: Rename SEL_ADG_{A, B, C} to SEL_ADG{A, B, C} Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 31/51] pinctrl: sh-pfc: r8a77990: Fix MOD_SEL0 bit16 when using NFALE and NFRB_N Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 32/51] pinctrl: sh-pfc: r8a77990: Fix MOD_SEL1 bit31 when using SIM0_D Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 33/51] pinctrl: sh-pfc: r8a77990: Fix MOD_SEL1 bit30 when using SSI_SCK2 and SSI_WS2 Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 34/51] pinctrl: sh-pfc: rcar-gen3: Rename RTS{0, 1, 3, 4}# pin function definitions Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 35/51] pinctrl: sh-pfc: rcar-gen3: Rename SEL_NDFC to SEL_NDF Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 36/51] pinctrl: sh-pfc: Add PORT_GP_27 helper macro Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 37/51] pinctrl: sh-pfc: Move PIN_NONE to shared header file Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 38/51] pinctrl: sh-pfc: r8a77990: Use new macros for non-GPIO pins Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 39/51] pinctrl: sh-pfc: r8a7796: Add TPU pins, groups and functions Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 40/51] pinctrl: sh-pfc: r8a7796: Use new macros for non-GPIO pins Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 41/51] pinctrl: sh-pfc: r8a7796: Remove placeholder I2C pin data Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 42/51] pinctrl: sh-pfc: r8a77995: Remove unused PINMUX_IPSR_{MSEL2, PHYS}() Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 43/51] pinctrl: sh-pfc: r8a7740: Add missing REF125CK pin to gether_gmii group Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 44/51] pinctrl: sh-pfc: r8a7740: Add missing LCD0 marks to lcd0_data24_1 group Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 45/51] pinctrl: sh-pfc: r8a7791: Remove bogus ctrl marks from qspi_data4_b group Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 46/51] pinctrl: sh-pfc: r8a7791: Remove bogus marks from vin1_b_data18 group Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 47/51] pinctrl: sh-pfc: r8a7791: Fix VIN1 versioned groups Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 48/51] pinctrl: sh-pfc: r8a7791: Fix scifb2_data_c pin group Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 49/51] pinctrl: sh-pfc: sh73a0: Fix fsic_spdif pin groups Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 50/51] pinctrl: sh-pfc: sh73a0: Add missing TO pin to tpu4_to3 group Fabrizio Castro
2019-08-29 17:02 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 51/51] pinctrl: sh-pfc: sh73a0: Use new macros for non-GPIO pins Fabrizio Castro
2019-08-29 22:31 ` [cip-dev] [PATCH/RFC 4.19.y-cip v2 00/51] Fast forward sh-pfc Pavel Machek
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