From: Robin Gong <yibin.gong@nxp.com> To: vkoul@kernel.org, robh+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, festevam@gmail.com, catalin.marinas@arm.com, will@kernel.org, dan.j.williams@intel.com, angelo@sysam.it Cc: kernel@pengutronix.de, linux-imx@nxp.com, dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 8/9] arm64: dts: imx8qxp: add edma2 Date: Wed, 15 Jul 2020 01:41:47 +0800 [thread overview] Message-ID: <1594748508-22179-9-git-send-email-yibin.gong@nxp.com> (raw) In-Reply-To: <1594748508-22179-1-git-send-email-yibin.gong@nxp.com> add edma2 on i.mx8qxp. Signed-off-by: Robin Gong <yibin.gong@nxp.com> --- arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 38 ++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi index e46faac..3f4fa59d 100644 --- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi @@ -300,6 +300,44 @@ status = "disabled"; }; + edma2: dma-controller@5a1f0000 { + compatible = "fsl,imx8qm-edma"; + reg = <0x5a280000 0x10000>, /* channel8 UART0 rx */ + <0x5a290000 0x10000>, /* channel9 UART0 tx */ + <0x5a2a0000 0x10000>, /* channel10 UART1 rx */ + <0x5a2b0000 0x10000>, /* channel11 UART1 tx */ + <0x5a2c0000 0x10000>, /* channel12 UART2 rx */ + <0x5a2d0000 0x10000>, /* channel13 UART2 tx */ + <0x5a2e0000 0x10000>, /* channel14 UART3 rx */ + <0x5a2f0000 0x10000>; /* channel15 UART3 tx */ + #dma-cells = <3>; + dma-channels = <8>; + interrupts = <GIC_SPI 434 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 435 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 436 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 437 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 438 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 439 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 440 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 441 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "edma2-chan8-rx", "edma2-chan9-tx", + "edma2-chan10-rx", "edma2-chan11-tx", + "edma2-chan12-rx", "edma2-chan13-tx", + "edma2-chan14-rx", "edma2-chan15-tx"; + power-domains = <&pd IMX_SC_R_DMA_2_CH8>, + <&pd IMX_SC_R_DMA_2_CH9>, + <&pd IMX_SC_R_DMA_2_CH10>, + <&pd IMX_SC_R_DMA_2_CH11>, + <&pd IMX_SC_R_DMA_2_CH12>, + <&pd IMX_SC_R_DMA_2_CH13>, + <&pd IMX_SC_R_DMA_2_CH14>, + <&pd IMX_SC_R_DMA_2_CH15>; + power-domain-names = "edma2-chan8", "edma2-chan9", + "edma2-chan10", "edma2-chan11", + "edma2-chan12", "edma2-chan13", + "edma2-chan14", "edma2-chan15"; + }; + adma_i2c0: i2c@5a800000 { compatible = "fsl,imx8qxp-lpi2c", "fsl,imx7ulp-lpi2c"; reg = <0x5a800000 0x4000>; -- 2.7.4
WARNING: multiple messages have this Message-ID (diff)
From: Robin Gong <yibin.gong@nxp.com> To: vkoul@kernel.org, robh+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, festevam@gmail.com, catalin.marinas@arm.com, will@kernel.org, dan.j.williams@intel.com, angelo@sysam.it Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-imx@nxp.com, kernel@pengutronix.de, dmaengine@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 8/9] arm64: dts: imx8qxp: add edma2 Date: Wed, 15 Jul 2020 01:41:47 +0800 [thread overview] Message-ID: <1594748508-22179-9-git-send-email-yibin.gong@nxp.com> (raw) In-Reply-To: <1594748508-22179-1-git-send-email-yibin.gong@nxp.com> add edma2 on i.mx8qxp. Signed-off-by: Robin Gong <yibin.gong@nxp.com> --- arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 38 ++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi index e46faac..3f4fa59d 100644 --- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi @@ -300,6 +300,44 @@ status = "disabled"; }; + edma2: dma-controller@5a1f0000 { + compatible = "fsl,imx8qm-edma"; + reg = <0x5a280000 0x10000>, /* channel8 UART0 rx */ + <0x5a290000 0x10000>, /* channel9 UART0 tx */ + <0x5a2a0000 0x10000>, /* channel10 UART1 rx */ + <0x5a2b0000 0x10000>, /* channel11 UART1 tx */ + <0x5a2c0000 0x10000>, /* channel12 UART2 rx */ + <0x5a2d0000 0x10000>, /* channel13 UART2 tx */ + <0x5a2e0000 0x10000>, /* channel14 UART3 rx */ + <0x5a2f0000 0x10000>; /* channel15 UART3 tx */ + #dma-cells = <3>; + dma-channels = <8>; + interrupts = <GIC_SPI 434 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 435 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 436 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 437 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 438 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 439 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 440 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 441 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "edma2-chan8-rx", "edma2-chan9-tx", + "edma2-chan10-rx", "edma2-chan11-tx", + "edma2-chan12-rx", "edma2-chan13-tx", + "edma2-chan14-rx", "edma2-chan15-tx"; + power-domains = <&pd IMX_SC_R_DMA_2_CH8>, + <&pd IMX_SC_R_DMA_2_CH9>, + <&pd IMX_SC_R_DMA_2_CH10>, + <&pd IMX_SC_R_DMA_2_CH11>, + <&pd IMX_SC_R_DMA_2_CH12>, + <&pd IMX_SC_R_DMA_2_CH13>, + <&pd IMX_SC_R_DMA_2_CH14>, + <&pd IMX_SC_R_DMA_2_CH15>; + power-domain-names = "edma2-chan8", "edma2-chan9", + "edma2-chan10", "edma2-chan11", + "edma2-chan12", "edma2-chan13", + "edma2-chan14", "edma2-chan15"; + }; + adma_i2c0: i2c@5a800000 { compatible = "fsl,imx8qxp-lpi2c", "fsl,imx7ulp-lpi2c"; reg = <0x5a800000 0x4000>; -- 2.7.4 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-07-14 9:28 UTC|newest] Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-07-14 17:41 [PATCH v2 0/9] add fsl-edma3 support Robin Gong 2020-07-14 17:41 ` Robin Gong 2020-07-14 17:41 ` [PATCH v2 1/9] dmaengine: fsl-edma: move edma_request functions into drvdata Robin Gong 2020-07-14 17:41 ` Robin Gong 2020-07-14 17:41 ` [PATCH v2 2/9] dmaengine: fsl-edma-common: add condition check for fsl_edma_chan_mux Robin Gong 2020-07-14 17:41 ` Robin Gong 2020-07-14 17:41 ` [PATCH v2 3/9] dmaengine: fsl-edma-common: add fsl_chan into fsl_edma_fill_tcd Robin Gong 2020-07-14 17:41 ` Robin Gong 2020-07-14 17:41 ` [PATCH v2 4/9] dmaengine: fsl-edma-common: export fsl_edma_set_tcd_regs Robin Gong 2020-07-14 17:41 ` Robin Gong 2020-07-14 17:41 ` [PATCH v2 5/9] dmaengine: fsl-edma3: add fsl-edma3 driver Robin Gong 2020-07-14 17:41 ` Robin Gong 2020-07-14 17:41 ` [PATCH v2 6/9] dt-bindings: dma: add fsl-edma3 yaml Robin Gong 2020-07-14 17:41 ` Robin Gong 2020-07-16 19:47 ` Rob Herring 2020-07-16 19:47 ` Rob Herring 2020-07-24 10:13 ` Robin Gong 2020-07-24 10:13 ` Robin Gong 2020-07-14 17:41 ` [PATCH v2 7/9] firmware: imx: scu-pd: correct dma resource Robin Gong 2020-07-14 17:41 ` Robin Gong 2020-07-14 17:41 ` Robin Gong [this message] 2020-07-14 17:41 ` [PATCH v2 8/9] arm64: dts: imx8qxp: add edma2 Robin Gong 2020-07-14 17:41 ` [PATCH v2 9/9] arm64: defconfig: add CONFIG_FSL_EDMA3 Robin Gong 2020-07-14 17:41 ` Robin Gong
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