[PATCH v2 28/59] drm/kmb: Changed MMIO size

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From: Anitha Chrisanthus <anitha.chrisanthus@intel.com>
To: dri-devel@lists.freedesktop.org, anitha.chrisanthus@intel.com,
	bob.j.paauwe@intel.com, edmund.j.dea@intel.com
Cc: daniel.vetter@intel.com, intel-gfx@lists.freedesktop.org,
	rodrigo.vivi@intel.com
Subject: [PATCH v2 28/59] drm/kmb: Changed MMIO size
Date: Tue, 14 Jul 2020 13:57:14 -0700	[thread overview]
Message-ID: <1594760265-11618-29-git-send-email-anitha.chrisanthus@intel.com> (raw)
In-Reply-To: <1594760265-11618-1-git-send-email-anitha.chrisanthus@intel.com>

Also added debug messages

Signed-off-by: Anitha Chrisanthus <anitha.chrisanthus@intel.com>
---
 drivers/gpu/drm/kmb/kmb_drv.c  | 16 ++++++++++++++--
 drivers/gpu/drm/kmb/kmb_regs.h |  6 +++---
 2 files changed, 17 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/kmb/kmb_drv.c b/drivers/gpu/drm/kmb/kmb_drv.c
index 4afdb9c..d13552a 100644
--- a/drivers/gpu/drm/kmb/kmb_drv.c
+++ b/drivers/gpu/drm/kmb/kmb_drv.c
@@ -29,6 +29,7 @@
 #include "kmb_plane.h"
 #include "kmb_regs.h"
 
+#define DEBUG
 /*IRQ handler*/
 static irqreturn_t kmb_isr(int irq, void *arg);
 
@@ -327,6 +328,7 @@ static int kmb_drm_bind(struct device *dev)
 	dev_set_drvdata(dev, drm);
 
 	kmb_setup_mode_config(drm);
+	DRM_DEBUG("kmb_bind : after kmb_setup_mode_config\n");
 	ret = kmb_load(drm, 0);
 	if (ret)
 		goto err_free;
@@ -439,17 +441,27 @@ static int kmb_probe(struct platform_device *pdev)
 {
 	struct device_node *port;
 	struct component_match *match = NULL;
+	int ret;
 
 	/* there is only one output port inside each device, find it */
+	DRM_DEBUG("%s : ENTER", __func__);
+
 	port = of_graph_get_remote_node(pdev->dev.of_node, 0, 0);
+	DRM_DEBUG("%s : port = 0x%pOF\n", __func__, port);
 	if (!port)
 		return -ENODEV;
 
+	DRM_DEBUG("%s : after get_remote", __func__);
+	DRM_DEBUG("Adding component %pOF\n", port);
 	drm_of_component_match_add(&pdev->dev, &match, compare_dev, port);
+	DRM_DEBUG("%s : after get_match", __func__);
 	of_node_put(port);
 
-	return component_master_add_with_match(&pdev->dev, &kmb_master_ops,
-					       match);
+	 ret = component_master_add_with_match(&pdev->dev, &kmb_master_ops,
+					match);
+
+	DRM_DEBUG("%s : EXIT ret=%d\n", __func__, ret);
+	return ret;
 }
 
 static int kmb_remove(struct platform_device *pdev)
diff --git a/drivers/gpu/drm/kmb/kmb_regs.h b/drivers/gpu/drm/kmb/kmb_regs.h
index 85b55cb..e98e144 100644
--- a/drivers/gpu/drm/kmb/kmb_regs.h
+++ b/drivers/gpu/drm/kmb/kmb_regs.h
@@ -13,9 +13,9 @@
 /*from Data Book section 12.11.6.1 page 4972 */
 #define LCD_BASE_ADDR                           (0x20930000)
 #define MSS_CAM_BASE_ADDR			(MIPI_BASE_ADDR + 0x10000)
-#define LCD_MMIO_SIZE				(0x10000)
-#define MIPI_MMIO_SIZE				(0x10000)
-#define MSS_CAM_MMIO_SIZE			(0x10000)
+#define LCD_MMIO_SIZE				(0x3000)
+#define MIPI_MMIO_SIZE				(0x4000)
+#define MSS_CAM_MMIO_SIZE			(0x10)
 
 /***************************************************************************
  *		   LCD controller control register defines
-- 
2.7.4

_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

WARNING: multiple messages have this Message-ID (diff)

From: Anitha Chrisanthus <anitha.chrisanthus@intel.com>
To: dri-devel@lists.freedesktop.org, anitha.chrisanthus@intel.com,
	bob.j.paauwe@intel.com, edmund.j.dea@intel.com
Cc: daniel.vetter@intel.com, intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v2 28/59] drm/kmb: Changed MMIO size
Date: Tue, 14 Jul 2020 13:57:14 -0700	[thread overview]
Message-ID: <1594760265-11618-29-git-send-email-anitha.chrisanthus@intel.com> (raw)
In-Reply-To: <1594760265-11618-1-git-send-email-anitha.chrisanthus@intel.com>

Also added debug messages

Signed-off-by: Anitha Chrisanthus <anitha.chrisanthus@intel.com>
---
 drivers/gpu/drm/kmb/kmb_drv.c  | 16 ++++++++++++++--
 drivers/gpu/drm/kmb/kmb_regs.h |  6 +++---
 2 files changed, 17 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/kmb/kmb_drv.c b/drivers/gpu/drm/kmb/kmb_drv.c
index 4afdb9c..d13552a 100644
--- a/drivers/gpu/drm/kmb/kmb_drv.c
+++ b/drivers/gpu/drm/kmb/kmb_drv.c
@@ -29,6 +29,7 @@
 #include "kmb_plane.h"
 #include "kmb_regs.h"
 
+#define DEBUG
 /*IRQ handler*/
 static irqreturn_t kmb_isr(int irq, void *arg);
 
@@ -327,6 +328,7 @@ static int kmb_drm_bind(struct device *dev)
 	dev_set_drvdata(dev, drm);
 
 	kmb_setup_mode_config(drm);
+	DRM_DEBUG("kmb_bind : after kmb_setup_mode_config\n");
 	ret = kmb_load(drm, 0);
 	if (ret)
 		goto err_free;
@@ -439,17 +441,27 @@ static int kmb_probe(struct platform_device *pdev)
 {
 	struct device_node *port;
 	struct component_match *match = NULL;
+	int ret;
 
 	/* there is only one output port inside each device, find it */
+	DRM_DEBUG("%s : ENTER", __func__);
+
 	port = of_graph_get_remote_node(pdev->dev.of_node, 0, 0);
+	DRM_DEBUG("%s : port = 0x%pOF\n", __func__, port);
 	if (!port)
 		return -ENODEV;
 
+	DRM_DEBUG("%s : after get_remote", __func__);
+	DRM_DEBUG("Adding component %pOF\n", port);
 	drm_of_component_match_add(&pdev->dev, &match, compare_dev, port);
+	DRM_DEBUG("%s : after get_match", __func__);
 	of_node_put(port);
 
-	return component_master_add_with_match(&pdev->dev, &kmb_master_ops,
-					       match);
+	 ret = component_master_add_with_match(&pdev->dev, &kmb_master_ops,
+					match);
+
+	DRM_DEBUG("%s : EXIT ret=%d\n", __func__, ret);
+	return ret;
 }
 
 static int kmb_remove(struct platform_device *pdev)
diff --git a/drivers/gpu/drm/kmb/kmb_regs.h b/drivers/gpu/drm/kmb/kmb_regs.h
index 85b55cb..e98e144 100644
--- a/drivers/gpu/drm/kmb/kmb_regs.h
+++ b/drivers/gpu/drm/kmb/kmb_regs.h
@@ -13,9 +13,9 @@
 /*from Data Book section 12.11.6.1 page 4972 */
 #define LCD_BASE_ADDR                           (0x20930000)
 #define MSS_CAM_BASE_ADDR			(MIPI_BASE_ADDR + 0x10000)
-#define LCD_MMIO_SIZE				(0x10000)
-#define MIPI_MMIO_SIZE				(0x10000)
-#define MSS_CAM_MMIO_SIZE			(0x10000)
+#define LCD_MMIO_SIZE				(0x3000)
+#define MIPI_MMIO_SIZE				(0x4000)
+#define MSS_CAM_MMIO_SIZE			(0x10)
 
 /***************************************************************************
  *		   LCD controller control register defines
-- 
2.7.4

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

next prev parent reply	other threads:[~2020-07-14 20:59 UTC|newest]

Thread overview: 133+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-14 20:56 [PATCH v2 00/59] Add support for KeemBay DRM driver Anitha Chrisanthus
2020-07-14 20:56 ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:56 ` [PATCH v2 01/59] drm/kmb: Add support for KeemBay Display Anitha Chrisanthus
2020-07-14 20:56   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:56 ` [PATCH v2 02/59] drm/kmb: Added id to kmb_plane Anitha Chrisanthus
2020-07-14 20:56   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:56 ` [PATCH v2 03/59] drm/kmb: Set correct values in the LAYERn_CFG register Anitha Chrisanthus
2020-07-14 20:56   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:56 ` [PATCH v2 04/59] drm/kmb: Use biwise operators for register definitions Anitha Chrisanthus
2020-07-14 20:56   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:56 ` [PATCH v2 05/59] drm/kmb: Updated kmb_plane_atomic_check Anitha Chrisanthus
2020-07-14 20:56   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:56 ` [PATCH v2 06/59] drm/kmb: Initial check-in for Mipi DSI Anitha Chrisanthus
2020-07-14 20:56   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:56 ` [PATCH v2 07/59] drm/kmb: Set OUT_FORMAT_CFG register Anitha Chrisanthus
2020-07-14 20:56   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:56 ` [PATCH v2 08/59] drm/kmb: Added mipi_dsi_host initialization Anitha Chrisanthus
2020-07-14 20:56   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:56 ` [PATCH v2 09/59] drm/kmb: Part 1 of Mipi Tx Initialization Anitha Chrisanthus
2020-07-14 20:56   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:56 ` [PATCH v2 10/59] drm/kmb: Part 2 " Anitha Chrisanthus
2020-07-14 20:56   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:56 ` [PATCH v2 11/59] drm/kmb: Use correct mmio offset from data book Anitha Chrisanthus
2020-07-14 20:56   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:56 ` [PATCH v2 12/59] drm/kmb: Part3 of Mipi Tx initialization Anitha Chrisanthus
2020-07-14 20:56   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:56 ` [PATCH v2 13/59] drm/kmb: Part4 of Mipi Tx Initialization Anitha Chrisanthus
2020-07-14 20:56   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 14/59] drm/kmb: Correct address offsets for mipi registers Anitha Chrisanthus
2020-07-14 20:57   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 15/59] drm/kmb: Part5 of Mipi Tx Intitialization Anitha Chrisanthus
2020-07-14 20:57   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 16/59] drm/kmb: Part6 of Mipi Tx Initialization Anitha Chrisanthus
2020-07-14 20:57   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 17/59] drm/kmb: Part7 " Anitha Chrisanthus
2020-07-14 20:57   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 18/59] drm/kmb: Part8 " Anitha Chrisanthus
2020-07-14 20:57   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 19/59] drm/kmb: Added ioremap/iounmap for register access Anitha Chrisanthus
2020-07-14 20:57   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 20/59] drm/kmb: Register IRQ for LCD Anitha Chrisanthus
2020-07-14 20:57   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 21/59] drm/kmb: IRQ handlers for LCD and mipi dsi Anitha Chrisanthus
2020-07-14 20:57   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 22/59] drm/kmb: Set hardcoded values to LCD_VSYNC_START Anitha Chrisanthus
2020-07-14 20:57   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 23/59] drm/kmb: Additional register programming to update_plane Anitha Chrisanthus
2020-07-14 20:57   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 24/59] drm/kmb: Add ADV7535 bridge Anitha Chrisanthus
2020-07-14 20:57   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 25/59] drm/kmb: Display clock enable/disable Anitha Chrisanthus
2020-07-14 20:57   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 26/59] drm/kmb: rebase to newer kernel version Anitha Chrisanthus
2020-07-14 20:57   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 27/59] drm/kmb: minor name change to match device tree Anitha Chrisanthus
2020-07-14 20:57   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:57 ` Anitha Chrisanthus [this message]
2020-07-14 20:57   ` [Intel-gfx] [PATCH v2 28/59] drm/kmb: Changed MMIO size Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 29/59] drm/kmb: Defer Probe Anitha Chrisanthus
2020-07-14 20:57   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 30/59] drm/kmb: call bridge init in the very beginning Anitha Chrisanthus
2020-07-14 20:57   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 31/59] drm/kmb: Cleanup probe functions Anitha Chrisanthus
2020-07-14 20:57   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 32/59] drm/kmb: Revert dsi_host back to a static variable Anitha Chrisanthus
2020-07-14 20:57   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 33/59] drm/kmb: Initialize clocks for clk_msscam, clk_mipi_ecfg, & clk_mipi_cfg Anitha Chrisanthus
2020-07-14 20:57   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 34/59] drm/kmb: Enable MSS_CAM_CLK_CTRL for LCD and MIPI Anitha Chrisanthus
2020-07-14 20:57   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 35/59] drm/kmb: Remove declaration of irq_lcd/irq_mipi Anitha Chrisanthus
2020-07-14 20:57   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 36/59] drm/kmb: Enable MIPI TX HS Test Pattern Generation Anitha Chrisanthus
2020-07-14 20:57   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 37/59] drm/kmb: Set MSS_CAM_RSTN_CTRL along with enable Anitha Chrisanthus
2020-07-14 20:57   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 38/59] drm/kmb: Mipi DPHY initialization changes Anitha Chrisanthus
2020-07-14 20:57   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 39/59] drm/kmb: Fixed driver unload Anitha Chrisanthus
2020-07-14 20:57   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 40/59] drm/kmb: Added LCD_TEST config Anitha Chrisanthus
2020-07-14 20:57   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 41/59] drm/kmb: Changes for LCD to Mipi Anitha Chrisanthus
2020-07-14 20:57   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 42/59] drm/kmb: Update LCD programming to match MIPI Anitha Chrisanthus
2020-07-14 20:57   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 43/59] drm/kmb: Changed name of driver to kmb-drm Anitha Chrisanthus
2020-07-14 20:57   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 44/59] drm/kmb: Mipi settings from input timings Anitha Chrisanthus
2020-07-14 20:57   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 45/59] drm/kmb: Enable LCD interrupts Anitha Chrisanthus
2020-07-14 20:57   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 46/59] drm/kmb: Enable LCD interrupts during modeset Anitha Chrisanthus
2020-07-14 20:57   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 47/59] drm/kmb: Don’t inadvertantly disable LCD controller Anitha Chrisanthus
2020-07-14 20:57   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 48/59] drm/kmb: SWAP R and B LCD Layer order Anitha Chrisanthus
2020-07-14 20:57   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 49/59] drm/kmb: Disable ping pong mode Anitha Chrisanthus
2020-07-14 20:57   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 50/59] drm/kmb: Do the layer initializations only once Anitha Chrisanthus
2020-07-14 20:57   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 51/59] drm/kmb: Write to LCD_LAYERn_CFG " Anitha Chrisanthus
2020-07-14 20:57   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 52/59] drm/kmb: Cleaned up code Anitha Chrisanthus
2020-07-14 20:57   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 53/59] drm/kmb: disable the LCD layer in EOF irq handler Anitha Chrisanthus
2020-07-14 20:57   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 54/59] drm/kmb: Initialize uninitialized variables Anitha Chrisanthus
2020-07-14 20:57   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 55/59] drm/kmb: Added useful messages in LCD ISR Anitha Chrisanthus
2020-07-14 20:57   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 56/59] kmb/drm: Prune unsupported modes Anitha Chrisanthus
2020-07-14 20:57   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 57/59] drm/kmb: workaround for dma undeflow issue Anitha Chrisanthus
2020-07-14 20:57   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 58/59] drm/kmb: Get System Clock from SCMI Anitha Chrisanthus
2020-07-14 20:57   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 20:57 ` [PATCH v2 59/59] drm/kmb: work around for planar formats Anitha Chrisanthus
2020-07-14 20:57   ` [Intel-gfx] " Anitha Chrisanthus
2020-07-14 21:41 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add support for KeemBay DRM driver Patchwork
2020-07-14 22:01 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-07-15  1:48 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2020-07-15 15:05 ` [Intel-gfx] [PATCH v2 00/59] " Daniel Vetter
2020-07-15 15:05   ` Daniel Vetter
2020-07-15 15:14   ` Daniel Vetter
2020-07-15 15:14     ` Daniel Vetter
2020-07-15 17:06   ` Sam Ravnborg
2020-07-15 17:06     ` Sam Ravnborg
2020-07-15 18:38     ` Chrisanthus, Anitha
2020-07-15 18:38       ` Chrisanthus, Anitha
2020-07-15 17:01 ` Sam Ravnborg
2020-07-15 17:01   ` [Intel-gfx] " Sam Ravnborg

find likely ancestor, descendant, or conflicting patches for this message:
dfblob:4afdb9c dfblob:85b55cb dfblob:4afdb9c dfblob:85b55cb
dfblob:d13552a dfblob:e98e144 dfblob:d13552a dfblob:e98e144
	(help)

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