From: Anshuman Khandual <anshuman.khandual@arm.com>
To: linux-arm-kernel@lists.infradead.org, coresight@lists.linaro.org
Cc: linux-kernel@vger.kernel.org,
Anshuman Khandual <anshuman.khandual@arm.com>,
Mathieu Poirier <mathieu.poirier@linaro.org>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Mike Leach <mike.leach@linaro.org>,
Linu Cherian <lcherian@marvell.com>
Subject: [PATCH 09/11] coresight: etm-perf: Truncate the perf record if handle has no space
Date: Wed, 23 Dec 2020 15:33:41 +0530 [thread overview]
Message-ID: <1608717823-18387-10-git-send-email-anshuman.khandual@arm.com> (raw)
In-Reply-To: <1608717823-18387-1-git-send-email-anshuman.khandual@arm.com>
While starting off the etm event, just abort and truncate the perf record
if the perf handle as no space left. This avoids configuring both source
and sink devices in case the data cannot be consumed in perf.
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
---
drivers/hwtracing/coresight/coresight-etm-perf.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c
index eb9e7e9..e776a07 100644
--- a/drivers/hwtracing/coresight/coresight-etm-perf.c
+++ b/drivers/hwtracing/coresight/coresight-etm-perf.c
@@ -347,6 +347,9 @@ static void etm_event_start(struct perf_event *event, int flags)
if (!event_data)
goto fail;
+ if (!handle->size)
+ goto fail_end_stop;
+
/*
* Check if this ETM is allowed to trace, as decided
* at etm_setup_aux(). This could be due to an unreachable
--
2.7.4
WARNING: multiple messages have this Message-ID (diff)
From: Anshuman Khandual <anshuman.khandual@arm.com>
To: linux-arm-kernel@lists.infradead.org, coresight@lists.linaro.org
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Anshuman Khandual <anshuman.khandual@arm.com>,
linux-kernel@vger.kernel.org, Linu Cherian <lcherian@marvell.com>,
Mike Leach <mike.leach@linaro.org>
Subject: [PATCH 09/11] coresight: etm-perf: Truncate the perf record if handle has no space
Date: Wed, 23 Dec 2020 15:33:41 +0530 [thread overview]
Message-ID: <1608717823-18387-10-git-send-email-anshuman.khandual@arm.com> (raw)
In-Reply-To: <1608717823-18387-1-git-send-email-anshuman.khandual@arm.com>
While starting off the etm event, just abort and truncate the perf record
if the perf handle as no space left. This avoids configuring both source
and sink devices in case the data cannot be consumed in perf.
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
---
drivers/hwtracing/coresight/coresight-etm-perf.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c
index eb9e7e9..e776a07 100644
--- a/drivers/hwtracing/coresight/coresight-etm-perf.c
+++ b/drivers/hwtracing/coresight/coresight-etm-perf.c
@@ -347,6 +347,9 @@ static void etm_event_start(struct perf_event *event, int flags)
if (!event_data)
goto fail;
+ if (!handle->size)
+ goto fail_end_stop;
+
/*
* Check if this ETM is allowed to trace, as decided
* at etm_setup_aux(). This could be due to an unreachable
--
2.7.4
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next prev parent reply other threads:[~2020-12-23 10:05 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-23 10:03 [PATCH 00/11] arm64: coresight: Enable ETE and TRBE Anshuman Khandual
2020-12-23 10:03 ` Anshuman Khandual
2020-12-23 10:03 ` [PATCH 01/11] coresight: etm-perf: Allow an event to use different sinks Anshuman Khandual
2020-12-23 10:03 ` Anshuman Khandual
2020-12-23 10:03 ` [PATCH 02/11] coresight: Do not scan for graph if none is present Anshuman Khandual
2020-12-23 10:03 ` Anshuman Khandual
2020-12-23 10:03 ` [PATCH 03/11] coresight: etm4x: Add support for PE OS lock Anshuman Khandual
2020-12-23 10:03 ` Anshuman Khandual
2020-12-23 10:03 ` [PATCH 04/11] coresight: ete: Add support for ETE sysreg access Anshuman Khandual
2020-12-23 10:03 ` Anshuman Khandual
2020-12-23 10:03 ` [PATCH 05/11] coresight: ete: Add support for ETE tracing Anshuman Khandual
2020-12-23 10:03 ` Anshuman Khandual
2020-12-23 10:03 ` [PATCH 06/11] dts: bindings: Document device tree bindings for ETE Anshuman Khandual
2020-12-23 10:03 ` Anshuman Khandual
2021-01-03 17:02 ` Rob Herring
2021-01-03 17:02 ` Rob Herring
2021-01-04 14:42 ` Suzuki K Poulose
2021-01-04 14:42 ` Suzuki K Poulose
2021-01-04 18:15 ` Mathieu Poirier
2021-01-04 18:15 ` Mathieu Poirier
2021-01-04 20:31 ` Rob Herring
2021-01-04 20:31 ` Rob Herring
2020-12-23 10:03 ` [PATCH 07/11] arm64: Add TRBE definitions Anshuman Khandual
2020-12-23 10:03 ` Anshuman Khandual
2020-12-23 10:03 ` [PATCH 08/11] coresight: core: Add support for dedicated percpu sinks Anshuman Khandual
2020-12-23 10:03 ` Anshuman Khandual
2020-12-23 10:03 ` Anshuman Khandual [this message]
2020-12-23 10:03 ` [PATCH 09/11] coresight: etm-perf: Truncate the perf record if handle has no space Anshuman Khandual
2020-12-23 10:03 ` [PATCH 10/11] coresight: sink: Add TRBE driver Anshuman Khandual
2020-12-23 10:03 ` Anshuman Khandual
2021-01-04 16:28 ` Suzuki K Poulose
2021-01-04 16:28 ` Suzuki K Poulose
2021-01-05 9:29 ` Anshuman Khandual
2021-01-05 9:29 ` Anshuman Khandual
2021-01-05 11:37 ` Suzuki K Poulose
2021-01-05 11:37 ` Suzuki K Poulose
2021-01-06 11:50 ` Anshuman Khandual
2021-01-06 11:50 ` Anshuman Khandual
2021-01-07 14:01 ` Suzuki K Poulose
2021-01-07 14:01 ` Suzuki K Poulose
2020-12-23 10:03 ` [PATCH 11/11] dts: bindings: Document device tree binding for Arm TRBE Anshuman Khandual
2020-12-23 10:03 ` Anshuman Khandual
2021-01-03 17:05 ` Rob Herring
2021-01-03 17:05 ` Rob Herring
2021-01-04 3:44 ` Anshuman Khandual
2021-01-04 3:44 ` Anshuman Khandual
2021-01-07 14:05 ` Suzuki K Poulose
2021-01-07 14:05 ` Suzuki K Poulose
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