From: Rob Herring <robh@kernel.org> To: Anshuman Khandual <anshuman.khandual@arm.com> Cc: linux-arm-kernel@lists.infradead.org, coresight@lists.linaro.org, linux-kernel@vger.kernel.org, Mathieu Poirier <mathieu.poirier@linaro.org>, Suzuki K Poulose <suzuki.poulose@arm.com>, Mike Leach <mike.leach@linaro.org>, Linu Cherian <lcherian@marvell.com>, devicetree@vger.kernel.org Subject: Re: [PATCH 06/11] dts: bindings: Document device tree bindings for ETE Date: Sun, 3 Jan 2021 10:02:16 -0700 [thread overview] Message-ID: <20210103170216.GA4048658@robh.at.kernel.org> (raw) In-Reply-To: <1608717823-18387-7-git-send-email-anshuman.khandual@arm.com> On Wed, Dec 23, 2020 at 03:33:38PM +0530, Anshuman Khandual wrote: > From: Suzuki K Poulose <suzuki.poulose@arm.com> > > Document the device tree bindings for Embedded Trace Extensions. > ETE can be connected to legacy coresight components and thus > could optionally contain a connection graph as described by > the CoreSight bindings. > > Cc: devicetree@vger.kernel.org > Cc: Mathieu Poirier <mathieu.poirier@linaro.org> > Cc: Mike Leach <mike.leach@linaro.org> > Cc: Rob Herring <robh@kernel.org> > Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> > Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com> > --- > Documentation/devicetree/bindings/arm/ete.txt | 41 +++++++++++++++++++++++++++ > 1 file changed, 41 insertions(+) > create mode 100644 Documentation/devicetree/bindings/arm/ete.txt Bindings are in schema format now, please convert this. > > diff --git a/Documentation/devicetree/bindings/arm/ete.txt b/Documentation/devicetree/bindings/arm/ete.txt > new file mode 100644 > index 0000000..b52b507 > --- /dev/null > +++ b/Documentation/devicetree/bindings/arm/ete.txt > @@ -0,0 +1,41 @@ > +Arm Embedded Trace Extensions > + > +Arm Embedded Trace Extensions (ETE) is a per CPU trace component that > +allows tracing the CPU execution. It overlaps with the CoreSight ETMv4 > +architecture and has extended support for future architecture changes. > +The trace generated by the ETE could be stored via legacy CoreSight > +components (e.g, TMC-ETR) or other means (e.g, using a per CPU buffer > +Arm Trace Buffer Extension (TRBE)). Since the ETE can be connected to > +legacy CoreSight components, a node must be listed per instance, along > +with any optional connection graph as per the coresight bindings. > +See bindings/arm/coresight.txt. > + > +** ETE Required properties: > + > +- compatible : should be one of: > + "arm,embedded-trace-extensions" > + > +- cpu : the CPU phandle this ETE belongs to. If this is 1:1 with CPUs, then perhaps it should be a child node of the CPU nodes. > + > +** Optional properties: > +- CoreSight connection graph, see bindings/arm/coresight.txt. > + > +** Example: > + > +ete_0 { > + compatible = "arm,embedded-trace-extension"; > + cpu = <&cpu_0>; > +}; > + > +ete_1 { > + compatible = "arm,embedded-trace-extension"; > + cpu = <&cpu_1>; > + > + out-ports { /* legacy CoreSight connection */ > + port { > + ete1_out_port: endpoint@0 { > + remote-endpoint = <&funnel_in_port0>; > + }; > + }; > + }; > +}; > -- > 2.7.4 >
WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org> To: Anshuman Khandual <anshuman.khandual@arm.com> Cc: devicetree@vger.kernel.org, Mathieu Poirier <mathieu.poirier@linaro.org>, Suzuki K Poulose <suzuki.poulose@arm.com>, coresight@lists.linaro.org, linux-kernel@vger.kernel.org, Linu Cherian <lcherian@marvell.com>, linux-arm-kernel@lists.infradead.org, Mike Leach <mike.leach@linaro.org> Subject: Re: [PATCH 06/11] dts: bindings: Document device tree bindings for ETE Date: Sun, 3 Jan 2021 10:02:16 -0700 [thread overview] Message-ID: <20210103170216.GA4048658@robh.at.kernel.org> (raw) In-Reply-To: <1608717823-18387-7-git-send-email-anshuman.khandual@arm.com> On Wed, Dec 23, 2020 at 03:33:38PM +0530, Anshuman Khandual wrote: > From: Suzuki K Poulose <suzuki.poulose@arm.com> > > Document the device tree bindings for Embedded Trace Extensions. > ETE can be connected to legacy coresight components and thus > could optionally contain a connection graph as described by > the CoreSight bindings. > > Cc: devicetree@vger.kernel.org > Cc: Mathieu Poirier <mathieu.poirier@linaro.org> > Cc: Mike Leach <mike.leach@linaro.org> > Cc: Rob Herring <robh@kernel.org> > Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> > Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com> > --- > Documentation/devicetree/bindings/arm/ete.txt | 41 +++++++++++++++++++++++++++ > 1 file changed, 41 insertions(+) > create mode 100644 Documentation/devicetree/bindings/arm/ete.txt Bindings are in schema format now, please convert this. > > diff --git a/Documentation/devicetree/bindings/arm/ete.txt b/Documentation/devicetree/bindings/arm/ete.txt > new file mode 100644 > index 0000000..b52b507 > --- /dev/null > +++ b/Documentation/devicetree/bindings/arm/ete.txt > @@ -0,0 +1,41 @@ > +Arm Embedded Trace Extensions > + > +Arm Embedded Trace Extensions (ETE) is a per CPU trace component that > +allows tracing the CPU execution. It overlaps with the CoreSight ETMv4 > +architecture and has extended support for future architecture changes. > +The trace generated by the ETE could be stored via legacy CoreSight > +components (e.g, TMC-ETR) or other means (e.g, using a per CPU buffer > +Arm Trace Buffer Extension (TRBE)). Since the ETE can be connected to > +legacy CoreSight components, a node must be listed per instance, along > +with any optional connection graph as per the coresight bindings. > +See bindings/arm/coresight.txt. > + > +** ETE Required properties: > + > +- compatible : should be one of: > + "arm,embedded-trace-extensions" > + > +- cpu : the CPU phandle this ETE belongs to. If this is 1:1 with CPUs, then perhaps it should be a child node of the CPU nodes. > + > +** Optional properties: > +- CoreSight connection graph, see bindings/arm/coresight.txt. > + > +** Example: > + > +ete_0 { > + compatible = "arm,embedded-trace-extension"; > + cpu = <&cpu_0>; > +}; > + > +ete_1 { > + compatible = "arm,embedded-trace-extension"; > + cpu = <&cpu_1>; > + > + out-ports { /* legacy CoreSight connection */ > + port { > + ete1_out_port: endpoint@0 { > + remote-endpoint = <&funnel_in_port0>; > + }; > + }; > + }; > +}; > -- > 2.7.4 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-01-03 17:03 UTC|newest] Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-12-23 10:03 [PATCH 00/11] arm64: coresight: Enable ETE and TRBE Anshuman Khandual 2020-12-23 10:03 ` Anshuman Khandual 2020-12-23 10:03 ` [PATCH 01/11] coresight: etm-perf: Allow an event to use different sinks Anshuman Khandual 2020-12-23 10:03 ` Anshuman Khandual 2020-12-23 10:03 ` [PATCH 02/11] coresight: Do not scan for graph if none is present Anshuman Khandual 2020-12-23 10:03 ` Anshuman Khandual 2020-12-23 10:03 ` [PATCH 03/11] coresight: etm4x: Add support for PE OS lock Anshuman Khandual 2020-12-23 10:03 ` Anshuman Khandual 2020-12-23 10:03 ` [PATCH 04/11] coresight: ete: Add support for ETE sysreg access Anshuman Khandual 2020-12-23 10:03 ` Anshuman Khandual 2020-12-23 10:03 ` [PATCH 05/11] coresight: ete: Add support for ETE tracing Anshuman Khandual 2020-12-23 10:03 ` Anshuman Khandual 2020-12-23 10:03 ` [PATCH 06/11] dts: bindings: Document device tree bindings for ETE Anshuman Khandual 2020-12-23 10:03 ` Anshuman Khandual 2021-01-03 17:02 ` Rob Herring [this message] 2021-01-03 17:02 ` Rob Herring 2021-01-04 14:42 ` Suzuki K Poulose 2021-01-04 14:42 ` Suzuki K Poulose 2021-01-04 18:15 ` Mathieu Poirier 2021-01-04 18:15 ` Mathieu Poirier 2021-01-04 20:31 ` Rob Herring 2021-01-04 20:31 ` Rob Herring 2020-12-23 10:03 ` [PATCH 07/11] arm64: Add TRBE definitions Anshuman Khandual 2020-12-23 10:03 ` Anshuman Khandual 2020-12-23 10:03 ` [PATCH 08/11] coresight: core: Add support for dedicated percpu sinks Anshuman Khandual 2020-12-23 10:03 ` Anshuman Khandual 2020-12-23 10:03 ` [PATCH 09/11] coresight: etm-perf: Truncate the perf record if handle has no space Anshuman Khandual 2020-12-23 10:03 ` Anshuman Khandual 2020-12-23 10:03 ` [PATCH 10/11] coresight: sink: Add TRBE driver Anshuman Khandual 2020-12-23 10:03 ` Anshuman Khandual 2021-01-04 16:28 ` Suzuki K Poulose 2021-01-04 16:28 ` Suzuki K Poulose 2021-01-05 9:29 ` Anshuman Khandual 2021-01-05 9:29 ` Anshuman Khandual 2021-01-05 11:37 ` Suzuki K Poulose 2021-01-05 11:37 ` Suzuki K Poulose 2021-01-06 11:50 ` Anshuman Khandual 2021-01-06 11:50 ` Anshuman Khandual 2021-01-07 14:01 ` Suzuki K Poulose 2021-01-07 14:01 ` Suzuki K Poulose 2020-12-23 10:03 ` [PATCH 11/11] dts: bindings: Document device tree binding for Arm TRBE Anshuman Khandual 2020-12-23 10:03 ` Anshuman Khandual 2021-01-03 17:05 ` Rob Herring 2021-01-03 17:05 ` Rob Herring 2021-01-04 3:44 ` Anshuman Khandual 2021-01-04 3:44 ` Anshuman Khandual 2021-01-07 14:05 ` Suzuki K Poulose 2021-01-07 14:05 ` Suzuki K Poulose
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