From: Will Deacon <will@kernel.org>
To: Mark Brown <broonie@kernel.org>,
Catalin Marinas <catalin.marinas@arm.com>
Cc: kernel-team@android.com, Will Deacon <will@kernel.org>,
Joey Gouly <joey.gouly@arm.com>,
linux-arm-kernel@lists.infradead.org,
Mark Rutland <mark.rutland@arm.com>
Subject: Re: [PATCH v7 00/28] arm64/sysreg: More system register generation
Date: Tue, 5 Jul 2022 14:31:25 +0100 [thread overview]
Message-ID: <165701794910.3452405.464335975600286102.b4-ty@kernel.org> (raw)
In-Reply-To: <20220704170302.2609529-1-broonie@kernel.org>
On Mon, 4 Jul 2022 18:02:34 +0100, Mark Brown wrote:
> This series continues on with the conversion of the system registers to
> automatic generation, together with a few cleanups and improvements that
> were identified as part of looking through all the register definitions
> and bringing them into line with the conventions we've been using.
>
> v7:
> - Rather than guarding macros in sysreg.h minimise the set of headers
> included in cache.h when used for assembly.
> - Fix more indentation in icache_policy_str().
> - Fix preexisting whitespace damage in idreg-override.c
> v6:
> - Fix indentation in icache_policy_str().
> - Assume aliasing for unknown cache type.
> v5:
> - Remove definition of AIVIVT cache type entirely, no longer
> referencing the constant.
> - Allow leading blanks on comments in the input file.
> v4:
> - Rebase onto v5.19-rc3.
> v3:
> - Fix value for ID_AA64ISAR2_EL1.WFxT IMP enumeration value.
> - Add conversions of LOR*_EL1, ID_AA64SMFR0_EL1 and ID_AA64ZFR0_EL1.
> - Rebase onto for-next/fixes due to the ID_AA64SMFR0_EL1 conversion.
> v2:
> - Rework handling of AIVIVT so we just update the define to reflect the
> naming but don't change the user visible decode, the type was removed
> from v8 rather than being added in v9.
>
> [...]
Applied to arm64 (for-next/sysregs), thanks!
NOTE: I'm holding off putting this into -next for the moment as I want
to see how badly it's going to collide with other trees (espec. the
kvm/arm64 tree) first.
[01/28] arm64/cpuinfo: Remove references to reserved cache type
https://git.kernel.org/arm64/c/dabb128debc4
[02/28] arm64/idreg: Fix tab/space damage
https://git.kernel.org/arm64/c/9105a295d6f5
[03/28] arm64/sysreg: Allow leading blanks on comments in sysreg file
https://git.kernel.org/arm64/c/f43ff286512e
[04/28] arm64/sysreg: Add SYS_FIELD_GET() helper
https://git.kernel.org/arm64/c/3a87d53853c5
[05/28] arm64/cache: Restrict which headers are included in __ASSEMBLY__
https://git.kernel.org/arm64/c/971f45928815
[06/28] arm64/sysreg: Standardise naming for CTR_EL0 fields
https://git.kernel.org/arm64/c/5b345e39d3eb
[07/28] arm64/sysreg: Standardise naming for DCZID_EL0 field names
https://git.kernel.org/arm64/c/bacf3085bf03
[08/28] arm64/mte: Standardise GMID field name definitions
https://git.kernel.org/arm64/c/e97575533a80
[09/28] arm64/sysreg: Align pointer auth enumeration defines with architecture
https://git.kernel.org/arm64/c/38e29671813b
[10/28] arm64/sysreg: Make BHB clear feature defines match the architecture
https://git.kernel.org/arm64/c/356137e68a9f
[11/28] arm64/sysreg: Standardise naming for WFxT defines
https://git.kernel.org/arm64/c/9a2f3290bb10
[12/28] arm64/sysreg: Standardise naming for ID_AA64SMFR0_EL1 enums
https://git.kernel.org/arm64/c/f13d54697bbe
[13/28] arm64/sysreg: Standardise naming for ID_AA64ZFR0_EL1 fields
https://git.kernel.org/arm64/c/8d8feb0eaee1
[14/28] arm64/sysreg: Remove defines for RPRES enumeration
https://git.kernel.org/arm64/c/b7e4a2d78753
[15/28] arm64/sysreg: Add _EL1 into ID_AA64ISAR1_EL1 definition names
https://git.kernel.org/arm64/c/aa50479b4f8a
[16/28] arm64/sysreg: Add _EL1 into ID_AA64ISAR2_EL1 definition names
https://git.kernel.org/arm64/c/b2d71f275d54
[17/28] arm64/sysreg: Convert CTR_EL0 to automatic generation
https://git.kernel.org/arm64/c/9a3634d02301
[18/28] arm64/sysreg: Convert DCZID_EL0 to automatic generation
https://git.kernel.org/arm64/c/5589083d802b
[19/28] arm64/sysreg: Convert GMID to automatic generation
https://git.kernel.org/arm64/c/d1b60bed639b
[20/28] arm64/sysreg: Convert ID_AA64ISAR1_EL1 to automatic generation
https://git.kernel.org/arm64/c/f7b5115cc39c
[21/28] arm64/sysreg: Convert ID_AA64ISAR2_EL1 to automatic generation
https://git.kernel.org/arm64/c/8fcc8285c0e3
[22/28] arm64/sysreg: Convert LORSA_EL1 to automatic generation
https://git.kernel.org/arm64/c/464ca8df6248
[23/28] arm64/sysreg: Convert LOREA_EL1 to automatic generation
https://git.kernel.org/arm64/c/0d879f7a32a8
[24/28] arm64/sysreg: Convert LORN_EL1 to automatic generation
https://git.kernel.org/arm64/c/cdf428f79b3c
[25/28] arm64/sysreg: Convert LORC_EL1 to automatic generation
https://git.kernel.org/arm64/c/41cc24e0c883
[26/28] arm64/sysreg: Convert LORID_EL1 to automatic generation
https://git.kernel.org/arm64/c/12c897b4ffec
[27/28] arm64/sysreg: Convert ID_AA64SMFR0_EL1 to automatic generation
https://git.kernel.org/arm64/c/2bc589bd645f
[28/28] arm64/sysreg: Convert ID_AA64ZFR0_EL1 to automatic generation
https://git.kernel.org/arm64/c/3bbeca99309f
Cheers,
--
Will
https://fixes.arm64.dev
https://next.arm64.dev
https://will.arm64.dev
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prev parent reply other threads:[~2022-07-05 13:32 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-04 17:02 [PATCH v7 00/28] arm64/sysreg: More system register generation Mark Brown
2022-07-04 17:02 ` [PATCH v7 01/28] arm64/cpuinfo: Remove references to reserved cache type Mark Brown
2022-07-04 17:02 ` [PATCH v7 02/28] arm64/idreg: Fix tab/space damage Mark Brown
2022-07-04 17:02 ` [PATCH v7 03/28] arm64/sysreg: Allow leading blanks on comments in sysreg file Mark Brown
2022-07-04 17:02 ` [PATCH v7 04/28] arm64/sysreg: Add SYS_FIELD_GET() helper Mark Brown
2022-07-04 17:02 ` [PATCH v7 05/28] arm64/cache: Restrict which headers are included in __ASSEMBLY__ Mark Brown
2022-07-04 17:02 ` [PATCH v7 06/28] arm64/sysreg: Standardise naming for CTR_EL0 fields Mark Brown
2022-07-04 17:02 ` [PATCH v7 07/28] arm64/sysreg: Standardise naming for DCZID_EL0 field names Mark Brown
2022-07-04 17:02 ` [PATCH v7 08/28] arm64/mte: Standardise GMID field name definitions Mark Brown
2022-07-04 17:02 ` [PATCH v7 09/28] arm64/sysreg: Align pointer auth enumeration defines with architecture Mark Brown
2022-07-04 17:02 ` [PATCH v7 10/28] arm64/sysreg: Make BHB clear feature defines match the architecture Mark Brown
2022-07-04 17:02 ` [PATCH v7 11/28] arm64/sysreg: Standardise naming for WFxT defines Mark Brown
2022-07-04 17:02 ` [PATCH v7 12/28] arm64/sysreg: Standardise naming for ID_AA64SMFR0_EL1 enums Mark Brown
2022-07-04 17:02 ` [PATCH v7 13/28] arm64/sysreg: Standardise naming for ID_AA64ZFR0_EL1 fields Mark Brown
2022-07-04 17:02 ` [PATCH v7 14/28] arm64/sysreg: Remove defines for RPRES enumeration Mark Brown
2022-07-04 17:02 ` [PATCH v7 15/28] arm64/sysreg: Add _EL1 into ID_AA64ISAR1_EL1 definition names Mark Brown
2022-07-04 17:02 ` [PATCH v7 16/28] arm64/sysreg: Add _EL1 into ID_AA64ISAR2_EL1 " Mark Brown
2022-07-04 17:02 ` [PATCH v7 17/28] arm64/sysreg: Convert CTR_EL0 to automatic generation Mark Brown
2022-07-04 17:02 ` [PATCH v7 18/28] arm64/sysreg: Convert DCZID_EL0 " Mark Brown
2022-07-04 17:02 ` [PATCH v7 19/28] arm64/sysreg: Convert GMID " Mark Brown
2022-07-04 17:02 ` [PATCH v7 20/28] arm64/sysreg: Convert ID_AA64ISAR1_EL1 " Mark Brown
2022-07-04 17:02 ` [PATCH v7 21/28] arm64/sysreg: Convert ID_AA64ISAR2_EL1 " Mark Brown
2022-07-04 17:02 ` [PATCH v7 22/28] arm64/sysreg: Convert LORSA_EL1 " Mark Brown
2022-07-04 17:02 ` [PATCH v7 23/28] arm64/sysreg: Convert LOREA_EL1 " Mark Brown
2022-07-04 17:02 ` [PATCH v7 24/28] arm64/sysreg: Convert LORN_EL1 " Mark Brown
2022-07-04 17:02 ` [PATCH v7 25/28] arm64/sysreg: Convert LORC_EL1 " Mark Brown
2022-07-04 17:03 ` [PATCH v7 26/28] arm64/sysreg: Convert LORID_EL1 " Mark Brown
2022-07-04 17:03 ` [PATCH v7 27/28] arm64/sysreg: Convert ID_AA64SMFR0_EL1 " Mark Brown
2022-07-04 17:03 ` [PATCH v7 28/28] arm64/sysreg: Convert ID_AA64ZFR0_EL1 " Mark Brown
2022-07-05 13:31 ` Will Deacon [this message]
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